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[AMDGPU][MC][GFX9] Added instructions *saveexec*, *wrexec* and *bitreplicate*
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Authored by dp on Apr 4 2018, 4:30 AM.

Details

Summary

See bug 36840: https://bugs.llvm.org/show_bug.cgi?id=36840

A list of added instructions:

s_andn1_saveexec_b64
s_orn1_saveexec_b64

s_andn1_wrexec_b64
s_andn2_wrexec_b64

s_bitreplicate_b64_b32

Diff Detail

Repository
rL LLVM

Event Timeline

dp created this revision.Apr 4 2018, 4:30 AM
artem.tamazov added inline comments.Apr 4 2018, 7:13 AM
test/MC/AMDGPU/sop1.s
52 ↗(On Diff #140933)

Is this being tested for GFX9?

dp added inline comments.Apr 4 2018, 7:22 AM
test/MC/AMDGPU/sop1.s
52 ↗(On Diff #140933)

I tried to minimize changes in tests, so VI means VI+ here.
Should I correct the file using our traditional notation?
I.e. 'VI' means VI only, etc?

dp updated this revision to Diff 140967.Apr 4 2018, 8:28 AM

Corrected asm tests to use traditional notation (GFX89 instead of VI)

In D45250#1056997, @dp wrote:

Corrected asm tests to use traditional notation (GFX89 instead of VI)

Thanks, I think that's cleaner for dummies like me))

This revision is now accepted and ready to land.Apr 4 2018, 11:54 AM
This revision was automatically updated to reflect the committed changes.