This is an archive of the discontinued LLVM Phabricator instance.

Differential D44021

AMDGPU/GlobalISel: Make some G_EXTRACTs legal
ClosedPublic

Authored by arsenm on Mar 2 2018, 8:59 AM.

Details

Reviewers
tstellar
rampitec
ab
t.p.northover
nhaehnle
Summary

As far as I can tell legalization of weird sizes for the
output type isn't implemented.

Diff Detail

Event Timeline

arsenm created this revision.Mar 2 2018, 8:59 AM
Herald added subscribers: t-tye, tpr, dstuttard and 6 others. · View Herald TranscriptMar 2 2018, 8:59 AM
nhaehnle accepted this revision.Mar 5 2018, 2:46 AM

LGTM

This revision is now accepted and ready to land.Mar 5 2018, 2:46 AM
arsenm closed this revision.Mar 5 2018, 8:30 AM

r326714

Revision Contents

PathSize
lib/
Target/
AMDGPU/
12 lines
test/
CodeGen/
AMDGPU/
GlobalISel/
105 lines

Diff 136766

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

Show First 20 Lines • Show All 100 Lines • ▼ Show 20 LinesAMDGPULegalizerInfo::AMDGPULegalizerInfo() {
// G_LOAD/G_STORE/G_GEP instruction with scalar types for their pointer // G_LOAD/G_STORE/G_GEP instruction with scalar types for their pointer
// operands. In assert builds, the instruction selector will assert // operands. In assert builds, the instruction selector will assert
// if it sees a generic instruction which isn't legal, so we need to // if it sees a generic instruction which isn't legal, so we need to
// tell it that scalar types are legal for pointer operands // tell it that scalar types are legal for pointer operands
setAction({G_GEP, S64}, Legal); setAction({G_GEP, S64}, Legal);
setAction({G_LOAD, 1, S64}, Legal); setAction({G_LOAD, 1, S64}, Legal);
setAction({G_STORE, 1, S64}, Legal); setAction({G_STORE, 1, S64}, Legal);
// FIXME: Doesn't handle extract of illegal sizes.
getActionDefinitionsBuilder(G_EXTRACT)
.unsupportedIf([=](const LegalityQuery &Query) {
return Query.Types[0].getSizeInBits() >= Query.Types[1].getSizeInBits();
})
.legalIf([=](const LegalityQuery &Query) {
const LLT &Ty0 = Query.Types[0];
const LLT &Ty1 = Query.Types[1];
return (Ty0.getSizeInBits() % 32 == 0) &&
(Ty1.getSizeInBits() % 32 == 0);
});
computeTables(); computeTables();
} }

test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir

  • This file was added.
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel %s -o - | FileCheck %s
---
name: test_extract_lo32_i64
body: |
bb.0.entry:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_extract_lo32_i64
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](s64), 0
; CHECK: S_ENDPGM implicit [[EXTRACT]](s32)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s32) = G_EXTRACT %0, 0
S_ENDPGM implicit %1
...
---
name: test_extract_hi32_i64
body: |
bb.0.entry:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_extract_hi32_i64
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](s64), 32
; CHECK: S_ENDPGM implicit [[EXTRACT]](s32)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s32) = G_EXTRACT %0, 32
S_ENDPGM implicit %1
...
---
name: test_extract_dword0_i128
body: |
bb.0.entry:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_extract_dword0_i128
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](s64), 0
; CHECK: S_ENDPGM implicit [[EXTRACT]](s32)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s32) = G_EXTRACT %0, 0
S_ENDPGM implicit %1
...
---
name: test_extract_dword1_i128
body: |
bb.0.entry:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK-LABEL: name: test_extract_dword1_i128
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](s128), 32
; CHECK: S_ENDPGM implicit [[EXTRACT]](s32)
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(s32) = G_EXTRACT %0, 32
S_ENDPGM implicit %1
...
---
name: test_extract_dword2_i128
body: |
bb.0.entry:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK-LABEL: name: test_extract_dword2_i128
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](s128), 64
; CHECK: S_ENDPGM implicit [[EXTRACT]](s32)
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(s32) = G_EXTRACT %0, 64
S_ENDPGM implicit %1
...
---
name: test_extract_dword3_i128
body: |
bb.0.entry:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK-LABEL: name: test_extract_dword3_i128
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](s128), 96
; CHECK: S_ENDPGM implicit [[EXTRACT]](s32)
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(s32) = G_EXTRACT %0, 96
S_ENDPGM implicit %1
...
---
name: test_extract_dword2_i96
body: |
bb.0.entry:
liveins: $vgpr0_vgpr1_vgpr2
; CHECK-LABEL: name: test_extract_dword2_i96
; CHECK: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2
; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](s96), 64
; CHECK: S_ENDPGM implicit [[EXTRACT]](s32)
%0:_(s96) = COPY $vgpr0_vgpr1_vgpr2
%1:_(s32) = G_EXTRACT %0, 64
S_ENDPGM implicit %1
...