[ARM] Use dwarf exception handling on MinGW

[mstorsjo]

Summary

Enabling and using dwarf exceptions seems like an easier path to take, than to make the COFF/ARM backend output EHABI directives. Previously, no EH model was enabled at all on this target.

There's no point in setting UseIntegratedAssembler to false since GNU binutils doesn't support Windows on ARM, and since we don't need to support external assembler, we don't need to use register numbers in cfi directives.

[compnerd]

We really do not want to use EHABI on Windows ARM. We should be emitting the Windows exception tables, which would allow zero cost exceptions that can work across the boundary. The information for that model is fully documented and decodable in the LLVM sources (I added all the necessary structures and the decoder for that a while ago). I haven't had a chance to implement the necessary assembler support to enable the generation of the .pdata and .xdata sections.

lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp

111

Why was this false? Please tell me I didn't screw that up.

[mstorsjo]

In D39532#914461, @compnerd wrote:

We really do not want to use EHABI on Windows ARM. We should be emitting the Windows exception tables, which would allow zero cost exceptions that can work across the boundary. The information for that model is fully documented and decodable in the LLVM sources (I added all the necessary structures and the decoder for that a while ago). I haven't had a chance to implement the necessary assembler support to enable the generation of the .pdata and .xdata sections.

That's probably the best target in general, yes. That also requires a matching personality function in libcxxabi (as discussed on irc some weeks ago), right? I chose trying to implement this with dwarf initially since it seemed to be very simple to get working, although it's probably not the intended permanent solution. But I can understand if you don't want such a non-final thing committed.

lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp

111

I have no idea why it was false, but apparently it hasn't caused any other issues so far. I only noticed when I wanted to change DwarfRegNumForCFI when I tried to add a testcase for this.

[mstorsjo]

So, what's your take on this one - go ahead with this (as you approved D39533 ) until we have WinEH support in libcxxabi and have finished emitting .pdata and .xdata for arm? Or hold off of that (and possibly just fix the UseIntegratedAssembler flag which is a little strange as is)?

[compnerd]

I just haven't had a chance to look through the test changes, the code changes seem reasonable. As much as I hate the dwarf unwinding approach, I can understand why you are using that. I don't think that I would be able to add the WinEH support quickly, so, I think that this is a pragmatic compromise.

lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp

ARMCOFFMCAsmInfoGNU::ARMCOFFMCAsmInfoGNU() {
 
   CommentString = "@";
   Code16Directive = ".code\t16";
   Code32Directive = ".code\t32";
   PrivateGlobalPrefix = ".L";
   PrivateLabelPrefix = ".L";
 
   SupportsDebugInformation = true;
-  ExceptionsType = ExceptionHandling::None;
+  ExceptionsType = ExceptionHandling::DwarfCFI;
   UseParensForSymbolVariant = true;
 
-  UseIntegratedAssembler = false;
-  DwarfRegNumForCFI = true;
+  UseIntegratedAssembler = true;
+  DwarfRegNumForCFI = false;
 }
 

lib/Target/ARM/MCTargetDesc/ARMWinCOFFStreamer.cpp

 class ARMWinCOFFStreamer : public MCWinCOFFStreamer {
 public:
   ARMWinCOFFStreamer(MCContext &C, std::unique_ptr<MCAsmBackend> AB,
                      std::unique_ptr<MCCodeEmitter> CE, raw_pwrite_stream &OS)
       : MCWinCOFFStreamer(C, std::move(AB), std::move(CE), OS) {}
 
   void EmitAssemblerFlag(MCAssemblerFlag Flag) override;
   void EmitThumbFunc(MCSymbol *Symbol) override;
+  void FinishImpl() override;
 };
 
 void ARMWinCOFFStreamer::EmitAssemblerFlag(MCAssemblerFlag Flag) {
   switch (Flag) {
   default: llvm_unreachable("not implemented");
   case MCAF_SyntaxUnified:
   case MCAF_Code16:
     break;
   }
 }
 
 void ARMWinCOFFStreamer::EmitThumbFunc(MCSymbol *Symbol) {
   getAssembler().setIsThumbFunc(Symbol);
 }
+
+void ARMWinCOFFStreamer::FinishImpl() {
+  EmitFrames(nullptr);
+
+  MCWinCOFFStreamer::FinishImpl();
+}
 }
 
 MCStreamer *llvm::createARMWinCOFFStreamer(
     MCContext &Context, std::unique_ptr<MCAsmBackend> &&MAB,
     raw_pwrite_stream &OS, std::unique_ptr<MCCodeEmitter> &&Emitter,
     bool RelaxAll, bool IncrementalLinkerCompatible) {
   auto *S =
       new ARMWinCOFFStreamer(Context, std::move(MAB), std::move(Emitter), OS);
   S->getAssembler().setIncrementalLinkerCompatible(IncrementalLinkerCompatible);
   return S;
 }
 

test/CodeGen/ARM/ehabi.ll

 ; RUN: llc -mtriple armv7-unknown-netbsd-eabi \
 ; RUN:     -disable-fp-elim -filetype=asm -o - %s \
 ; RUN:   | FileCheck %s --check-prefix=DWARF-V7-FP
 
 ; RUN: llc -mtriple armv7-unknown-netbsd-eabi \
 ; RUN:     -filetype=asm -o - %s \
 ; RUN:   | FileCheck %s --check-prefix=DWARF-V7-FP-ELIM
 
+; RUN: llc -mtriple thumbv7-windows-gnu \
+; RUN:     -filetype=asm -o - %s \
+; RUN:   | FileCheck %s --check-prefix=DWARF-WIN-FP-ELIM
+
 ;-------------------------------------------------------------------------------
 ; Test 1
 ;-------------------------------------------------------------------------------
 ; This is the LLVM assembly generated from following C++ code:
 ;
 ;   extern void print(int, int, int, int, int);
 ;   extern void print(double, double, double, double, double);
 ;

 ; DWARF-V7-FP-ELIM:    .cfi_offset d9, -40
 ; DWARF-V7-FP-ELIM:    sub sp, sp, #24
 ; DWARF-V7-FP-ELIM:    .cfi_def_cfa_offset 72
 ; DWARF-V7-FP-ELIM:    add sp, sp, #24
 ; DWARF-V7-FP-ELIM:    vpop {d8, d9, d10, d11, d12}
 ; DWARF-V7-FP-ELIM:    pop {r4, pc}
 ; DWARF-V7-FP-ELIM:    .cfi_endproc
 
+; DWARF-WIN-FP-ELIM-LABEL: _Z4testiiiiiddddd:
+; DWARF-WIN-FP-ELIM:    .cfi_startproc
+; DWARF-WIN-FP-ELIM:    .cfi_personality 0, __gxx_personality_v0
+; DWARF-WIN-FP-ELIM:    .cfi_lsda 0, .Lexception0
+; DWARF-WIN-FP-ELIM:    push {r4, lr}
+; DWARF-WIN-FP-ELIM:    .cfi_def_cfa_offset 8
+; DWARF-WIN-FP-ELIM:    .cfi_offset lr, -4
+; DWARF-WIN-FP-ELIM:    .cfi_offset r4, -8
+; DWARF-WIN-FP-ELIM:    vpush {d8, d9, d10, d11, d12}
+; DWARF-WIN-FP-ELIM:    .cfi_offset d12, -16
+; DWARF-WIN-FP-ELIM:    .cfi_offset d11, -24
+; DWARF-WIN-FP-ELIM:    .cfi_offset d10, -32
+; DWARF-WIN-FP-ELIM:    .cfi_offset d9, -40
+; DWARF-WIN-FP-ELIM:    sub sp, #8
+; DWARF-WIN-FP-ELIM:    .cfi_def_cfa_offset 56
+; DWARF-WIN-FP-ELIM:    add sp, #8
+; DWARF-WIN-FP-ELIM:    vpop {d8, d9, d10, d11, d12}
+; DWARF-WIN-FP-ELIM:    pop {r4, pc}
+; DWARF-WIN-FP-ELIM:    .cfi_endproc
+
 ;-------------------------------------------------------------------------------
 ; Test 2
 ;-------------------------------------------------------------------------------
 
 declare void @throw_exception_2()
 
 define void @test2() {
 entry:

 ; DWARF-V7-FP-ELIM:    .cfi_startproc
 ; DWARF-V7-FP-ELIM:    push {r11, lr}
 ; DWARF-V7-FP-ELIM:    .cfi_def_cfa_offset 8
 ; DWARF-V7-FP-ELIM:    .cfi_offset lr, -4
 ; DWARF-V7-FP-ELIM:    .cfi_offset r11, -8
 ; DWARF-V7-FP-ELIM:    pop  {r11, pc}
 ; DWARF-V7-FP-ELIM:    .cfi_endproc
 
+; DWARF-WIN-FP-ELIM-LABEL: test2:
+; DWARF-WIN-FP-ELIM:    .cfi_startproc
+; DWARF-WIN-FP-ELIM:    push.w {r11, lr}
+; DWARF-WIN-FP-ELIM:    .cfi_def_cfa_offset 8
+; DWARF-WIN-FP-ELIM:    .cfi_offset lr, -4
+; DWARF-WIN-FP-ELIM:    .cfi_offset r11, -8
+; DWARF-WIN-FP-ELIM:    pop.w  {r11, pc}
+; DWARF-WIN-FP-ELIM:    .cfi_endproc
+
 
 ;-------------------------------------------------------------------------------
 ; Test 3
 ;-------------------------------------------------------------------------------
 
 declare void @throw_exception_3(i32)
 
 define i32 @test3(i32 %a, i32 %b, i32 %c, i32 %d,

 ; DWARF-V7-FP-ELIM:    .cfi_def_cfa_offset 16
 ; DWARF-V7-FP-ELIM:    .cfi_offset lr, -4
 ; DWARF-V7-FP-ELIM:    .cfi_offset r11, -8
 ; DWARF-V7-FP-ELIM:    .cfi_offset r5, -12
 ; DWARF-V7-FP-ELIM:    .cfi_offset r4, -16
 ; DWARF-V7-FP-ELIM:    pop  {r4, r5, r11, pc}
 ; DWARF-V7-FP-ELIM:    .cfi_endproc
 
+; DWARF-WIN-FP-ELIM-LABEL: test3:
+; DWARF-WIN-FP-ELIM:    .cfi_startproc
+; DWARF-WIN-FP-ELIM:    push.w {r4, r5, r11, lr}
+; DWARF-WIN-FP-ELIM:    .cfi_def_cfa_offset 16
+; DWARF-WIN-FP-ELIM:    .cfi_offset lr, -4
+; DWARF-WIN-FP-ELIM:    .cfi_offset r11, -8
+; DWARF-WIN-FP-ELIM:    .cfi_offset r5, -12
+; DWARF-WIN-FP-ELIM:    .cfi_offset r4, -16
+; DWARF-WIN-FP-ELIM:    pop.w  {r4, r5, r11, pc}
+; DWARF-WIN-FP-ELIM:    .cfi_endproc
+
 
 ;-------------------------------------------------------------------------------
 ; Test 4
 ;-------------------------------------------------------------------------------
 
 define void @test4() nounwind {
 entry:
   ret void

 ; DWARF-V7-FP-NOT: .cfi_endproc
 ; DWARF-V7-FP:    .size test4,
 
 ; DWARF-V7-FP-ELIM-LABEL: test4:
 ; DWARF-V7-FP-ELIM-NOT: .cfi_startproc
 ; DWARF-V7-FP-ELIM:     bx lr
 ; DWARF-V7-FP-ELIM-NOT: .cfi_endproc
 ; DWARF-V7-FP-ELIM:     .size test4,
+
+; DWARF-WIN-FP-ELIM-LABEL: test4:
+; DWARF-WIN-FP-ELIM-NOT: .cfi_startproc
+; DWARF-WIN-FP-ELIM:     bx lr
+; DWARF-WIN-FP-ELIM-NOT: .cfi_endproc