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Differential D34961

[AArch64] Use 16 bytes as preferred function alignment on Cortex-A72.
ClosedPublic

Authored by fhahn on Jul 3 2017, 12:15 PM.

Details

Reviewers
t.p.northover
kristof.beyls
rengolin
sbaranga
javed.absar
mcrosier
Commits
rGe3666ec9d6fc: [AArch64] Use 16 bytes as preferred function alignment on Cortex-A72.
rL307380: [AArch64] Use 16 bytes as preferred function alignment on Cortex-A72.
Summary

This change gives a 0.34% speed on execution time, a 0.61% improvement
in benchmark scores and a 0.57% increase in binary size on a Cortex-A72.
These numbers are the geomean results on a wide range of benchmarks from
the test-suite, SPEC2000, SPEC2006 and a range of proprietary suites.

The software optimization guide for the Cortex-A72 recommends 16 byte
branch alignment.

Diff Detail

Event Timeline

fhahn created this revision.Jul 3 2017, 12:15 PM
Herald added a subscriber: aemerson. · View Herald TranscriptJul 3 2017, 12:15 PM
fhahn added a parent revision: D34951: [AArch64] Add test case for preferred function alignment (NFC). .Jul 3 2017, 12:16 PM
mcrosier resigned from this revision.Jul 6 2017, 10:17 AM

From a coding standpoint this all LGTM. However, I'm going to defer to a A72 code owner for final approval.

kristof.beyls edited edge metadata.Jul 7 2017, 12:28 AM
In D34961#800945, @mcrosier wrote:

From a coding standpoint this all LGTM. However, I'm going to defer to a A72 code owner for final approval.

LGTM from a Cortex-A72 point-of-view: this patch is generating code in line with the optimization guide recommendations and the benchmark numbers quoted look good.

kristof.beyls accepted this revision.Jul 7 2017, 12:29 AM
This revision is now accepted and ready to land.Jul 7 2017, 12:29 AM
fhahn updated this revision to Diff 105608.Jul 7 2017, 3:09 AM

rebased

fhahn closed this revision.Jul 7 2017, 3:16 AM
fhahn mentioned this in D35493: [AArch64] Use 16 bytes as preferred function alignment on Cortex-A73..Jul 17 2017, 9:54 AM
fhahn mentioned this in rL308283: [AArch64] Use 16 bytes as preferred function alignment on Cortex-A73..Jul 18 2017, 2:31 AM

Revision Contents

PathSize
lib/
Target/
AArch64/
4 lines
test/
CodeGen/
AArch64/
2 lines

Diff 105608

lib/Target/AArch64/AArch64Subtarget.cpp

Show First 20 Lines • Show All 124 Lines • ▼ Show 20 Lines case ThunderXT83:
CacheLineSize = 128; CacheLineSize = 128;
PrefFunctionAlignment = 3; PrefFunctionAlignment = 3;
PrefLoopAlignment = 2; PrefLoopAlignment = 2;
// FIXME: remove this to enable 64-bit SLP if performance looks good. // FIXME: remove this to enable 64-bit SLP if performance looks good.
MinVectorRegisterBitWidth = 128; MinVectorRegisterBitWidth = 128;
break; break;
case CortexA35: break; case CortexA35: break;
case CortexA53: break; case CortexA53: break;
case CortexA72: break; case CortexA72:
PrefFunctionAlignment = 4;
break;
case CortexA73: break; case CortexA73: break;
case Others: break; case Others: break;
} }
} }
#ifdef LLVM_BUILD_GLOBAL_ISEL #ifdef LLVM_BUILD_GLOBAL_ISEL
namespace { namespace {
▲ Show 20 Lines • Show All 158 Lines • Show Last 20 Lines

test/CodeGen/AArch64/preferred-function-alignment.ll

; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=generic < %s | FileCheck --check-prefix=ALIGN2 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=generic < %s | FileCheck --check-prefix=ALIGN2 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=cortex-a35 < %s | FileCheck --check-prefix=ALIGN2 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=cortex-a35 < %s | FileCheck --check-prefix=ALIGN2 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=cortex-a53 < %s | FileCheck --check-prefix=ALIGN2 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=cortex-a53 < %s | FileCheck --check-prefix=ALIGN2 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=cortex-a57 < %s | FileCheck --check-prefix=ALIGN2 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=cortex-a57 < %s | FileCheck --check-prefix=ALIGN2 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=cortex-a72 < %s | FileCheck --check-prefix=ALIGN2 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=cortex-a73 < %s | FileCheck --check-prefix=ALIGN2 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=cortex-a73 < %s | FileCheck --check-prefix=ALIGN2 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=cyclone < %s | FileCheck --check-prefix=ALIGN2 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=cyclone < %s | FileCheck --check-prefix=ALIGN2 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=falkor < %s | FileCheck --check-prefix=ALIGN2 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=falkor < %s | FileCheck --check-prefix=ALIGN2 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=kryo < %s | FileCheck --check-prefix=ALIGN2 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=kryo < %s | FileCheck --check-prefix=ALIGN2 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=thunderx < %s | FileCheck --check-prefix=ALIGN3 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=thunderx < %s | FileCheck --check-prefix=ALIGN3 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=thunderxt81 < %s | FileCheck --check-prefix=ALIGN3 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=thunderxt81 < %s | FileCheck --check-prefix=ALIGN3 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=thunderxt83 < %s | FileCheck --check-prefix=ALIGN3 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=thunderxt83 < %s | FileCheck --check-prefix=ALIGN3 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=thunderxt88 < %s | FileCheck --check-prefix=ALIGN3 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=thunderxt88 < %s | FileCheck --check-prefix=ALIGN3 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=thunderx2t99 < %s | FileCheck --check-prefix=ALIGN3 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=thunderx2t99 < %s | FileCheck --check-prefix=ALIGN3 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=cortex-a72 < %s | FileCheck --check-prefix=ALIGN4 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=exynos-m1 < %s | FileCheck --check-prefix=ALIGN4 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=exynos-m1 < %s | FileCheck --check-prefix=ALIGN4 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=exynos-m2 < %s | FileCheck --check-prefix=ALIGN4 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=exynos-m2 < %s | FileCheck --check-prefix=ALIGN4 %s
; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=exynos-m3 < %s | FileCheck --check-prefix=ALIGN4 %s ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=exynos-m3 < %s | FileCheck --check-prefix=ALIGN4 %s
define void @test() { define void @test() {
ret void ret void
} }
; CHECK-LABEL: test ; CHECK-LABEL: test
; ALIGN2: .p2align 2 ; ALIGN2: .p2align 2
; ALIGN3: .p2align 3 ; ALIGN3: .p2align 3
; ALIGN4: .p2align 4 ; ALIGN4: .p2align 4