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Add scheduler classes to integer/float horizontal operations
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Authored by avt77 on May 15 2017, 9:23 AM.

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avt77 created this revision.May 15 2017, 9:23 AM
RKSimon edited edge metadata.

This needs to be done in general, not just for Jaguar. Please can you add WriteFHAdd and WriteVecHAdd defs in X86Schedule.td, and then tag the relevant instructions in X86InstrSSE.td and X86InstrAVX512.td. Then in ScheduleBtVer2.td you need to add instances of the 2 defs and special case the ymm versions. Either add TODOs for the other x86 models or add them if you want to dig through Agner's tables.

avt77 updated this revision to Diff 100683.May 30 2017, 3:42 AM

I redesigned the implementation accordingly to Simon requirements. Now it's done in general way and every X86 should support horizontal operations modeling. I did not check the numbers for SB and SLM: I simply kept the current ones. And I separated Ymm version from Xmm version to be able to model the corresponding throughput difference for Jaguar.

Adding some Intel guys to look at the SLM/SB/HW model changes.

lib/Target/X86/X86InstrSSE.td
5194 ↗(On Diff #100683)

Move on to previous line and re-add ReadAfterLd

lib/Target/X86/X86SchedSandyBridge.td
164 ↗(On Diff #100683)

Isn't this comment out of date? You're modelling the horizontal operations below.

lib/Target/X86/X86Schedule.td
82 ↗(On Diff #100683)

I'm not sure we should be introducing size specific versions - we don't do this for any other cases. Merge back into WriteHAdd?

lib/Target/X86/X86ScheduleBtVer2.td
68 ↗(On Diff #100683)

You shouldn't need this - just use JFPU01

lib/Target/X86/X86ScheduleSLM.td
144 ↗(On Diff #100683)

Isn't this comment out of date? You're modelling the horizontal operations below.

avt77 added inline comments.Jun 1 2017, 5:43 AM
lib/Target/X86/X86Schedule.td
82 ↗(On Diff #100683)

I did it specially because Jaguar has different numbers for Ymm and Xmm and we can't model such difference without the special SchedWrite. Is it OK?

avt77 added inline comments.Jun 1 2017, 5:47 AM
lib/Target/X86/X86ScheduleSLM.td
144 ↗(On Diff #100683)

In fact we did not model SLM here. I simply kept the current numbers: they could be wrong.

javed.absar added inline comments.
lib/Target/X86/X86SchedSandyBridge.td
169 ↗(On Diff #100683)

This isn't needed I think as 'ResourceCycles = [1]' is default anyways.

avt77 updated this revision to Diff 101036.Jun 1 2017, 9:01 AM

I fixed all Simon's notes.

avt77 updated this revision to Diff 101039.Jun 1 2017, 9:14 AM

I removed default values defined for SB model (required by javed.absar).

RKSimon added inline comments.Jun 1 2017, 9:45 AM
lib/Target/X86/X86Schedule.td
82 ↗(On Diff #100683)

Please can you use the instregex approach like you did in D33099?

lib/Target/X86/X86ScheduleSLM.td
144 ↗(On Diff #100683)

That's fine, thanks.

gadi.haber added inline comments.Jun 6 2017, 2:12 AM
lib/Target/X86/X86SchedHaswell.td
1530 ↗(On Diff #101039)

Please see the accurate modeling I added for these instrs in https://reviews.llvm.org/D33897

1538 ↗(On Diff #101039)

Please see the accurate modeling I added for these instrs in https://reviews.llvm.org/D33897

1901 ↗(On Diff #101039)

Please see the accurate modeling I added for these instrs in https://reviews.llvm.org/D33897

1903 ↗(On Diff #101039)

Please see the accurate modeling I added for these instrs in https://reviews.llvm.org/D33897

lsaba added a subscriber: lsaba.Jun 6 2017, 2:32 AM
avt77 updated this revision to Diff 101678.Jun 7 2017, 2:46 AM

I re-implemented all things mentioned by Simon and Gadi.

javed.absar added inline comments.Jun 7 2017, 3:10 AM
lib/Target/X86/X86ScheduleBtVer2.td
333 ↗(On Diff #101678)

The 'let ResourceCycles = [1,1] ' is default and so redundant. You could shorten your patch by removing it if you like.

Almost there I think - couple of minors

lib/Target/X86/X86Schedule.td
80 ↗(On Diff #101678)
// Horizontal Add/Sub (float and integer)
81 ↗(On Diff #101678)

Rename this WriteFHAdd?

avt77 updated this revision to Diff 101879.Jun 8 2017, 3:48 AM

Some renames and other minor updates.

RKSimon accepted this revision.Jun 8 2017, 4:06 AM

LGTM

This revision is now accepted and ready to land.Jun 8 2017, 4:06 AM
This revision was automatically updated to reflect the committed changes.