avt77 (Andrew V. Tischenko)
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User Since
Apr 11 2016, 3:46 AM (97 w, 4 d)

Recent Activity

Today

avt77 added a comment to D42728: Add more warnings for implict conversions (e.g. double truncation to float)..

The diagnostic text for this warning is misleading at best when the conversion is actually a truncation of the result of a compound assignment.

Fri, Feb 23, 3:19 AM
avt77 added a comment to D43578: -ftime-report switch support in Clang.
  • Just a warning: I'm a bit skeptical timers will work reliable for things that happen in well under a millisecond (did you do some sanity checking? i.e. do all the timer roughly add up to the time spent in the frontend?)
  • In the same vain I wonder if you add overhead by adding timers to functions that are likely called hundreds of times for a typical source file. Have you measured a release build with and without your patch.
Fri, Feb 23, 2:33 AM

Yesterday

avt77 updated the diff for D40602: [X86] Add MC level selection support for SHLD (64-bit only).

I fixed all issues raised by Gerolf except 3 questions: I put my answers/comments on them.

Thu, Feb 22, 6:33 AM
avt77 added a comment to D42728: Add more warnings for implict conversions (e.g. double truncation to float)..

I think the right solution is to tell CheckImplicitConversion that it's not just a straight-up conversion, it's a conversion done as part of a compound assignment, and then CheckImplicitConversion can choose to suppress or use different diagnostics based on that information. This will also more reliably avoid duplicate diagnostics.

Thu, Feb 22, 3:43 AM
avt77 added inline comments to D40602: [X86] Add MC level selection support for SHLD (64-bit only).
Thu, Feb 22, 3:10 AM

Wed, Feb 21

avt77 updated the diff for D40602: [X86] Add MC level selection support for SHLD (64-bit only).

I re-based the sources and added a new test to demonstarte new debug output.

Wed, Feb 21, 8:06 AM
avt77 created D43578: -ftime-report switch support in Clang.
Wed, Feb 21, 8:03 AM

Tue, Feb 20

avt77 added a comment to D41278: [MachineCombiner] Improve debug output (NFC).

I was going to commit it as a part of D40602 because the isue raised there. Is it OK?

Tue, Feb 20, 11:20 PM

Wed, Feb 14

avt77 committed rL325217: (NFC)[MachineCombiner] Improve debug output..
(NFC)[MachineCombiner] Improve debug output.
Wed, Feb 14, 11:57 PM
avt77 added a comment to D41278: [MachineCombiner] Improve debug output (NFC).

MachineCombiner part LGTM now. I still would prefer if you submit it without the change in lib/CodeGen/MachineInstr.cpp and do that in a separate change.

Wed, Feb 14, 11:51 PM
avt77 added inline comments to D36492: [time-report] Add preprocessor timer.
Wed, Feb 14, 5:40 AM
avt77 updated the diff for D41278: [MachineCombiner] Improve debug output (NFC).
  1. The issue with "\n" was fixed.
  2. About pattern ID in output: in theory there could be several patterns for one Root and every pattern could have several alternative sequences, right? I think in this case the pattern ID will help to distinguish all these removed/substituted sequences from each other. Am I right or it's better to remove the IDs?
Wed, Feb 14, 3:26 AM

Tue, Feb 13

avt77 updated the diff for D42728: Add more warnings for implict conversions (e.g. double truncation to float)..

I removed the ambiguity with changes in CheckImplicitConversion (required by rksimon): now it's absolutely clear what was changed.
And I minimized changes in diagnostics(required by rjmccall): the only float-double truncation was changed. As result only two tests were changed. Later we could easily extend the diagnostic updates if it will be necessary (but inside another patch).

Tue, Feb 13, 7:40 AM
avt77 committed rC325011: An updated test to show the current warnings produced for implicit conversions….
An updated test to show the current warnings produced for implicit conversions…
Tue, Feb 13, 7:23 AM
avt77 committed rL325011: An updated test to show the current warnings produced for implicit conversions….
An updated test to show the current warnings produced for implicit conversions…
Tue, Feb 13, 7:23 AM

Mon, Feb 12

avt77 closed D42530: Clang permits assignment to vector/extvector elements in a const method.

Fixed by 324721.

Mon, Feb 12, 4:39 AM
avt77 accepted D42530: Clang permits assignment to vector/extvector elements in a const method.
Mon, Feb 12, 4:36 AM
avt77 added a comment to D41278: [MachineCombiner] Improve debug output (NFC).

fhahn, do you have any questions here?

Mon, Feb 12, 2:38 AM

Fri, Feb 9

avt77 added a comment to D42530: Clang permits assignment to vector/extvector elements in a const method.

Committed revision 324721.
BTW, could you review D42728: it's rather similar to this one and rather small as well.

Fri, Feb 9, 1:38 AM
avt77 added a reviewer for D42728: Add more warnings for implict conversions (e.g. double truncation to float).: rjmccall.
Fri, Feb 9, 1:38 AM
avt77 committed rL324721: Fif for an issue when Clang permits assignment to vector/extvector elements in….
Fif for an issue when Clang permits assignment to vector/extvector elements in…
Fri, Feb 9, 1:33 AM
avt77 committed rC324721: Fif for an issue when Clang permits assignment to vector/extvector elements in….
Fif for an issue when Clang permits assignment to vector/extvector elements in…
Fri, Feb 9, 1:33 AM

Thu, Feb 8

avt77 updated the diff for D42530: Clang permits assignment to vector/extvector elements in a const method.

I propagated qualifiers accordingly to rjmccall's suggestion. But I changed the diagnostic: now it's more realistic from my point of view.

Thu, Feb 8, 5:37 AM

Tue, Feb 6

avt77 added a comment to D41278: [MachineCombiner] Improve debug output (NFC).

Ping.

Tue, Feb 6, 11:29 PM
avt77 added a comment to D42728: Add more warnings for implict conversions (e.g. double truncation to float)..

Ping.

Tue, Feb 6, 11:28 PM

Fri, Feb 2

avt77 updated the diff for D42530: Clang permits assignment to vector/extvector elements in a const method.

I re-implemented the patch. Now it works properly with const methods in CXX classes.

Fri, Feb 2, 8:45 AM
avt77 added a comment to D42530: Clang permits assignment to vector/extvector elements in a const method.

That's still just const-propagation. The const qualifier on the pointee type of this should propagate to the l-value resulting from the member access, and the vector-specific projection logic should continue to propagate const to the type of the element l-value.

Fri, Feb 2, 12:21 AM

Thu, Feb 1

avt77 added a comment to D42530: Clang permits assignment to vector/extvector elements in a const method.

In fact we have here another problem: it is not an attempt to assign to const variable but it is an attempt to use the field assingment inside const method: I'm working on it.

Thu, Feb 1, 9:17 AM

Wed, Jan 31

avt77 updated the diff for D41278: [MachineCombiner] Improve debug output (NFC).

I removed incorrect output about possibly removed instr: instead I added an output about Patterns used in combiner.

Wed, Jan 31, 2:54 AM
avt77 created D42728: Add more warnings for implict conversions (e.g. double truncation to float)..
Wed, Jan 31, 2:47 AM

Fri, Jan 26

avt77 added inline comments to D42530: Clang permits assignment to vector/extvector elements in a const method.
Fri, Jan 26, 1:46 AM
avt77 added inline comments to D41278: [MachineCombiner] Improve debug output (NFC).
Fri, Jan 26, 1:45 AM
avt77 added inline comments to D41278: [MachineCombiner] Improve debug output (NFC).
Fri, Jan 26, 1:43 AM

Thu, Jan 25

avt77 created D42530: Clang permits assignment to vector/extvector elements in a const method.
Thu, Jan 25, 5:14 AM

Jan 19 2018

avt77 updated the diff for D40602: [X86] Add MC level selection support for SHLD (64-bit only).

I removed the issue with BDVER1 tests. Now we have one diff for GENERIC CPU but I'm sure it's OK.

Jan 19 2018, 5:27 AM

Jan 18 2018

avt77 updated the diff for D40602: [X86] Add MC level selection support for SHLD (64-bit only).

I added special switch "mc-shld-enabled" to allow the job of this patch. As result we have only one changed test specially added by me previously. And now the whole patch is rather small.

Jan 18 2018, 7:00 AM
avt77 committed rL322828: A new test to demostrate the current SHLD/SHRD code generation..
A new test to demostrate the current SHLD/SHRD code generation.
Jan 18 2018, 2:42 AM
avt77 added a comment to D40602: [X86] Add MC level selection support for SHLD (64-bit only).

I bootstrapped the compiler with this patch but unfortunatley there was not any machine-combiner activity. It means we need special test(s) to validate the given substitution.

Jan 18 2018, 12:38 AM

Jan 17 2018

avt77 committed rL322623: Allow usage of X86-prefixes as separate instrs..
Allow usage of X86-prefixes as separate instrs.
Jan 17 2018, 2:13 AM
avt77 closed D42102: [X86] Allow usage of prefixes as a separate instr.
Jan 17 2018, 2:13 AM

Jan 16 2018

avt77 created D42102: [X86] Allow usage of prefixes as a separate instr.
Jan 16 2018, 6:49 AM
avt77 updated the summary of D40602: [X86] Add MC level selection support for SHLD (64-bit only).
Jan 16 2018, 3:29 AM
avt77 added a dependent revision for D41278: [MachineCombiner] Improve debug output (NFC): D40602: [X86] Add MC level selection support for SHLD (64-bit only).
Jan 16 2018, 3:29 AM

Jan 15 2018

avt77 committed rL322485: Update BTVER2 sched numbers for some AVX instructions (xmm version)..
Update BTVER2 sched numbers for some AVX instructions (xmm version).
Jan 15 2018, 6:22 AM
avt77 closed D40067: [X86] Update BTVER2 sched numbers for some AVX instructions (xmm version).
Jan 15 2018, 6:22 AM

Jan 12 2018

avt77 updated the diff for D40067: [X86] Update BTVER2 sched numbers for some AVX instructions (xmm version).

I removed WriteVecLoad as RKSimon required: it did not have any influence on cost numbers.

Jan 12 2018, 9:36 AM
avt77 updated the diff for D40602: [X86] Add MC level selection support for SHLD (64-bit only).

I removed all changes related to debug logging: they are published as D41278. In addition I completely implemented the possible substitutions for SHLD64mri8, SHLD64rrCL and SHLDrri8. I did not implement the same for SHLDmrCL because from my point of view the alternative code sequence is too long. Maybe I'm wrong?

Jan 12 2018, 8:48 AM
avt77 updated the diff for D41278: [MachineCombiner] Improve debug output (NFC).

The name of the new switch was changed.

Jan 12 2018, 3:30 AM

Jan 11 2018

avt77 committed rL322267: Implementation of X86Operand::print..
Implementation of X86Operand::print.
Jan 11 2018, 2:32 AM
avt77 closed D41610: [X86] Implementation of X86Operand::print.
Jan 11 2018, 2:32 AM

Jan 10 2018

avt77 added a comment to D40067: [X86] Update BTVER2 sched numbers for some AVX instructions (xmm version).

RKSimon, do you like to see here anything more?

Jan 10 2018, 6:34 AM
avt77 updated the diff for D41278: [MachineCombiner] Improve debug output (NFC).

Following requirements I got rid of class attribute MF and replaced it with STI. In addition I added special hidden switch to allow dump of substituted instructions.

Jan 10 2018, 6:32 AM
avt77 updated the diff for D41610: [X86] Implementation of X86Operand::print.

I removed usage of MRI thanking to Craig's suggest.

Jan 10 2018, 3:51 AM

Jan 9 2018

avt77 updated the diff for D41610: [X86] Implementation of X86Operand::print.

I renamed the feature and replaced the assertion with dyn_cast.

Jan 9 2018, 9:40 AM
avt77 added inline comments to D41610: [X86] Implementation of X86Operand::print.
Jan 9 2018, 8:30 AM
avt77 added inline comments to D41278: [MachineCombiner] Improve debug output (NFC).
Jan 9 2018, 7:02 AM
avt77 updated the diff for D41610: [X86] Implementation of X86Operand::print.

The implemetation was switched to lambda function.

Jan 9 2018, 5:35 AM

Dec 29 2017

avt77 committed rL321549: Fix incorrect operand sizes for some MMX instructions: punpcklwd, punpcklbw and….
Fix incorrect operand sizes for some MMX instructions: punpcklwd, punpcklbw and…
Dec 29 2017, 12:32 AM
avt77 closed D41595: Incorrect operand sizes for some MMX instructions: punpcklwd, punpcklbw and punpckldq.
Dec 29 2017, 12:32 AM

Dec 28 2017

avt77 updated the diff for D41595: Incorrect operand sizes for some MMX instructions: punpcklwd, punpcklbw and punpckldq.

I changed the implementation accodingly Craig's requiremetns: now it's shorter and more effective.

Dec 28 2017, 8:24 AM
avt77 created D41610: [X86] Implementation of X86Operand::print.
Dec 28 2017, 12:45 AM

Dec 27 2017

avt77 committed rL321497: A special test to demonstrate debug logging for asm matcher..
A special test to demonstrate debug logging for asm matcher.
Dec 27 2017, 11:26 AM
avt77 created D41595: Incorrect operand sizes for some MMX instructions: punpcklwd, punpcklbw and punpckldq.
Dec 27 2017, 6:05 AM

Dec 26 2017

avt77 committed rL321459: It's a fix for Bug 35741 - can't use comments after x86 prefixes..
It's a fix for Bug 35741 - can't use comments after x86 prefixes.
Dec 26 2017, 10:31 AM
avt77 closed D41579: [X86] A fix for pr35741 - can't use comments with instr prefixes.
Dec 26 2017, 10:30 AM
avt77 created D41579: [X86] A fix for pr35741 - can't use comments with instr prefixes.
Dec 26 2017, 2:57 AM

Dec 25 2017

avt77 updated the diff for D40067: [X86] Update BTVER2 sched numbers for some AVX instructions (xmm version).

I changed lattency for MOVSS/MOVSD and MOVAPS/MOVAPD and MOVDQA/MOVDQU.

Dec 25 2017, 3:30 AM
avt77 updated the diff for D41278: [MachineCombiner] Improve debug output (NFC).

I fixed the comments raised by fhahn except the one: I can't show the new output format just now because we don't have real Machine Combiner Patterns tests at the moment. When I commit D40602 I'll be able to prepare such tests.

Dec 25 2017, 1:22 AM

Dec 21 2017

avt77 updated the diff for D40067: [X86] Update BTVER2 sched numbers for some AVX instructions (xmm version).

I removed everything related to WriteVecMove and WriteVecStore.

Dec 21 2017, 6:31 AM

Dec 17 2017

avt77 updated the diff for D40067: [X86] Update BTVER2 sched numbers for some AVX instructions (xmm version).

I removed all changes related to Atom.

Dec 17 2017, 11:30 PM

Dec 15 2017

avt77 committed rL320837: Fix for bug PR35549 - Repeated schedule comments..
Fix for bug PR35549 - Repeated schedule comments.
Dec 15 2017, 10:13 AM
avt77 closed D40960: Fix for bug PR35549 - [X86] Repeated schedule comments.
Dec 15 2017, 10:13 AM
avt77 updated the diff for D41278: [MachineCombiner] Improve debug output (NFC).

The typo was fixed.

Dec 15 2017, 3:55 AM
avt77 created D41278: [MachineCombiner] Improve debug output (NFC).
Dec 15 2017, 2:02 AM

Dec 14 2017

avt77 updated the diff for D40960: Fix for bug PR35549 - [X86] Repeated schedule comments.

The latest Simon's comments were implemented.

Dec 14 2017, 9:10 AM
avt77 updated the diff for D40067: [X86] Update BTVER2 sched numbers for some AVX instructions (xmm version).

It seems all requirements from Simon were satisfied.

Dec 14 2017, 7:36 AM
avt77 committed rL320693: Any Target Asm comments should start from MachineInstr::TAsmComments value..
Any Target Asm comments should start from MachineInstr::TAsmComments value.
Dec 14 2017, 4:08 AM

Dec 12 2017

avt77 updated the diff for D40960: Fix for bug PR35549 - [X86] Repeated schedule comments.

All comments from Simon were resolved. There was a real bug and it's fixed in this new patch - tnx, Simon.

Dec 12 2017, 4:38 AM
avt77 added inline comments to D40960: Fix for bug PR35549 - [X86] Repeated schedule comments.
Dec 12 2017, 12:58 AM

Dec 11 2017

avt77 added inline comments to D40960: Fix for bug PR35549 - [X86] Repeated schedule comments.
Dec 11 2017, 1:45 AM

Dec 7 2017

avt77 created D40960: Fix for bug PR35549 - [X86] Repeated schedule comments.
Dec 7 2017, 8:33 AM
avt77 committed rL320034: Add proper BTVER2 sched support for MOV instr..
Add proper BTVER2 sched support for MOV instr.
Dec 7 2017, 3:20 AM
avt77 closed D40345: [X86] Add proper BTVER2 sched support for MOV by committing rL320034: Add proper BTVER2 sched support for MOV instr..
Dec 7 2017, 3:20 AM
avt77 abandoned D27618: Failure to vectorize __builtin_sqrt/__builtin_sqrtf.

As spatel wrote : "PR27435 was closed with D39642 / rL317519. The steps needed to fix the general problem with errno are listed in D28335."

Dec 7 2017, 12:53 AM

Dec 6 2017

avt77 retitled D40067: [X86] Update BTVER2 sched numbers for some AVX instructions (xmm version) from [X86] Update BTVER2 sched numbers for some AVX instructions (mmx version) to [X86] Update BTVER2 sched numbers for some AVX instructions (xmm version).
Dec 6 2017, 10:40 PM

Nov 29 2017

avt77 created D40602: [X86] Add MC level selection support for SHLD (64-bit only).
Nov 29 2017, 6:52 AM

Nov 28 2017

avt77 added a comment to D37461: [X86][AsmParser] re-introduce 'offset' operator.

@coby, is it possible to commit this patch? I'd like to fix https://bugs.llvm.org/show_bug.cgi?id=35115 based on this source.

Nov 28 2017, 11:31 PM
avt77 added a comment to D40067: [X86] Update BTVER2 sched numbers for some AVX instructions (xmm version).

We're adding a lot of instregex exntries just to get around the poor quality of the sched classes in X86Schedule.td - better to fix them?

Nov 28 2017, 11:13 PM

Nov 27 2017

avt77 updated the diff for D40067: [X86] Update BTVER2 sched numbers for some AVX instructions (xmm version).

I fixed all Simon's notes/comments/requirements.

Nov 27 2017, 5:16 AM
avt77 committed rL319013: Update BTVER2 sched numbers for SSE42 string instructions..
Update BTVER2 sched numbers for SSE42 string instructions.
Nov 27 2017, 1:59 AM
avt77 closed D39846: [X86] Update BTVER2 sched numbers for SSE42 string instructions. by committing rL319013: Update BTVER2 sched numbers for SSE42 string instructions..
Nov 27 2017, 1:59 AM

Nov 25 2017

avt77 committed rL318977: Add BTVER2 sched support for SHLD/SHRD..
Add BTVER2 sched support for SHLD/SHRD.
Nov 25 2017, 2:47 AM
avt77 closed D40124: [X86] Add BTVER2 sched support for SHLD/SHRD by committing rL318977: Add BTVER2 sched support for SHLD/SHRD..
Nov 25 2017, 2:47 AM

Nov 23 2017

avt77 retitled D39846: [X86] Update BTVER2 sched numbers for SSE42 string instructions. from Update of sched numbers for SSE42 string instructions on btver2 to [X86] Update BTVER2 sched numbers for SSE42 string instructions..
Nov 23 2017, 1:57 AM
avt77 retitled D40067: [X86] Update BTVER2 sched numbers for some AVX instructions (xmm version) from Update of sched numbers for some mmx version of AVX instructions on btver2 to [X86] Update BTVER2 sched numbers for some AVX instructions (mmx version).
Nov 23 2017, 1:56 AM
avt77 retitled D40345: [X86] Add proper BTVER2 sched support for MOV from A new sched model for mov instruction on btver2 to [X86] Add proper BTVER2 sched support for MOV.
Nov 23 2017, 1:54 AM
avt77 updated the diff for D40124: [X86] Add BTVER2 sched support for SHLD/SHRD.

Last Simon's comments were fixed.

Nov 23 2017, 1:51 AM

Nov 22 2017

avt77 created D40345: [X86] Add proper BTVER2 sched support for MOV.
Nov 22 2017, 4:43 AM
avt77 updated the diff for D40124: [X86] Add BTVER2 sched support for SHLD/SHRD.

I removed schedule-x86-64-shld.ll.

Nov 22 2017, 1:52 AM

Nov 21 2017

avt77 added a comment to D40067: [X86] Update BTVER2 sched numbers for some AVX instructions (xmm version).

Ping.

Nov 21 2017, 11:42 PM