- User Since
- Apr 11 2016, 3:46 AM (84 w, 1 d)
Fri, Nov 17
Only SHLD/SHRD related changes were left inside the patch.
Thu, Nov 16
Wed, Nov 15
Thu, Nov 9
All andreadb's were fixed.
I made updates required by andreadb except the question about JFPU01: if we need perf experiments please help me with perf test(s). If we agree to use the current implementation then I could commit the patch if you get me LGTM.
Wed, Nov 8
Tue, Nov 7
Fri, Nov 3
Thu, Nov 2
Wed, Nov 1
This patch was splitted on 4 related patches which will be committed instead of this one.
I fixed the bug with vcvttp*.
Tue, Oct 31
I re-based the required test.
I removed the faked AVX instr.
Mon, Oct 30
Some numbers were changed, some new instructions were added, some model changes were done accordingly to Simon requirements.
New required instructions were added.
Fri, Oct 27
All issues raised by Simon were fixed.
The patch was re-based to show the change in the test.
Thu, Oct 26
Wed, Oct 25
I fixed MOVNT* issue raised by Simon.
The fix was refactored accordingly to Simon's suggest.
Could somebody give me LGTM?
Commented out code was removed.
Tue, Oct 24
I rebased the sources and made changes shorter: now we're dealing with 3 changed instrs only.
I'm not shure about WriteCVT3St lattency: is it really 3?
I rebased f16c-schedule.ll.
Mon, Oct 23
All numbers are from AMD docs now.
Postpone review of this patch until D39046 is committed: I should re-base it after that time.
Now all numbers are from AMD docs instead of agner ones.
Craig implemented this issue in another way (see r316285)
What is r316285? Could you give the review link? I'd like to understand how you did it.
Oct 20 2017
I added VDPPSY instructions scheduling.
I did changes accordingly to Craig's requirement: now it works (it seems there were problems with trunk updating).
Oct 19 2017
To rename as
I fixed issues raised by Simon
The patch was committed as rL315899.
Oct 18 2017
Oct 17 2017
I removed unnecessary attribute usage.
Oct 16 2017
Oct 13 2017
Safe implementation for std::unique_ptr usage was done (raised by Craig).
Oct 12 2017
I added tests covering PR21640. Now this patch covers PR7709, PR17697, PR19251, PR32809 and PR21640.
I added usage of isPrefix() accordingly to Craig requirement.
Oct 11 2017
I added a test to cover PR32809.
Guys, could you speed up the review? In fact you already reviewed everything except X86-ASM changes: I did it to have one path for both assembler and disassembler as we agreed in our previuos discussions.
I made changes related to SSE4.1 and F16C instructions in Jaguar.
Oct 6 2017
Oct 5 2017
All updates required by Simon were done.
Oct 3 2017
I re-implemented assembler in case of working with X86-prefixes. Now both X86-assembler and X86-disassembler use the new Flags field from MCInst. As result now it's possible to track several prefixes for one instr and now one prefix is not a separate instruction but only is the parameter of the one. I tried to keep the current tests unchanged where it's possible. And I did not extend/change any diagnostic related to prefixes: it should be done in the follow up patches.
Oct 2 2017
I re-based avx-schedule.ll test.
Sep 28 2017
Alternatively, I could add a new X86Operand type (e.g. Prefix): as result I will not change any signature but it will be X86-specific only. What's better from your point of view?
After of some investigation of AsmParser I realised that assembler modification to support Flags for proper prefixes elaboration will require signature change of at least 2 virtual functions: ParseInstruction and MatchAndEmitInstruction. The reason of such change is very simple: ParseInstruction does real parsing (and as result could track prefixes) but does not deal with MCInst while MatchAndEmitInstruction create MCInst. This signature modifications will force massive changes in the sources that's why it will be difficult to review.
Sep 27 2017
There was a email thread about the issues in this patch. To keep track of those emails I'm putting them here:
Sep 26 2017
I fixed tests mentioned by Craig. And about extension of MCInst: this opaque data (not simple flag) could be really useful for other components (not only for disassembler).
I fixed an issue raised by Simon.
Sep 25 2017
Simon, finaly I'm able to create ClothAvx test executable with clang. And I created it with this patch and without it. And I got the following results on AMD laptop (CPU AMD A10-8700P Radeon R6, 10 Compute Cores 4C+6G 1.80 GHz):
You reviewed https://reviews.llvm.org/D36788 which was the first step of fixing issues with prefixes: could you review this new patch as well? In fact it's simply an extended version of D36788 and covers issues raised by echristo.
Sep 21 2017
Sep 20 2017
Sep 19 2017
I fixed issues raised by Craig and Simon.
It seems nobody wants to change the default value of the switch.
I re-implemented the fix accordingly to Craig suggest.