avt77 (Andrew V. Tischenko)
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User Since
Apr 11 2016, 3:46 AM (84 w, 1 d)

Recent Activity

Fri, Nov 17

avt77 added a comment to D40124: A new sched model for SHLD/SHRD.

schedule-x86-64-shld.ll is superfluous - please remove it

Fri, Nov 17, 3:01 AM
avt77 updated the diff for D40124: A new sched model for SHLD/SHRD.

Only SHLD/SHRD related changes were left inside the patch.

Fri, Nov 17, 1:42 AM

Thu, Nov 16

avt77 created D40124: A new sched model for SHLD/SHRD.
Thu, Nov 16, 5:26 AM

Wed, Nov 15

avt77 created D40067: Update of sched numbers for some mmx version of AVX instructions on btver2.
Wed, Nov 15, 1:49 AM

Thu, Nov 9

avt77 created D39846: Update of sched numbers for SSE42 string instructions on btver2.
Thu, Nov 9, 7:58 AM
avt77 committed rL317785: Sched model improving on btver2: JFPU01 resource, vtestp* for xmm..
Sched model improving on btver2: JFPU01 resource, vtestp* for xmm.
Thu, Nov 9, 6:20 AM
avt77 closed D39802: Sched model improving on btver2: JFPU01 resource, vtestp* for xmm. by committing rL317785: Sched model improving on btver2: JFPU01 resource, vtestp* for xmm..
Thu, Nov 9, 6:20 AM
avt77 committed rL317782: Add -print-schedule scheduling comments to inline asm..
Add -print-schedule scheduling comments to inline asm.
Thu, Nov 9, 4:46 AM
avt77 closed D39728: Add -print-schedule scheduling comments to inline asm by committing rL317782: Add -print-schedule scheduling comments to inline asm..
Thu, Nov 9, 4:45 AM
avt77 updated the diff for D39728: Add -print-schedule scheduling comments to inline asm.

All andreadb's were fixed.

Thu, Nov 9, 3:34 AM
avt77 updated the diff for D39802: Sched model improving on btver2: JFPU01 resource, vtestp* for xmm..

I made updates required by andreadb except the question about JFPU01: if we need perf experiments please help me with perf test(s). If we agree to use the current implementation then I could commit the patch if you get me LGTM.

Thu, Nov 9, 3:03 AM
avt77 added inline comments to D39802: Sched model improving on btver2: JFPU01 resource, vtestp* for xmm..
Thu, Nov 9, 12:20 AM

Wed, Nov 8

avt77 created D39802: Sched model improving on btver2: JFPU01 resource, vtestp* for xmm..
Wed, Nov 8, 7:26 AM

Tue, Nov 7

avt77 created D39728: Add -print-schedule scheduling comments to inline asm.
Tue, Nov 7, 4:22 AM

Fri, Nov 3

avt77 committed rL317330: Fix for Bug 34475 - LOCK/REP/REPNE prefixes emitted as instruction on their own..
Fix for Bug 34475 - LOCK/REP/REPNE prefixes emitted as instruction on their own.
Fri, Nov 3, 8:26 AM
avt77 closed D39546: Fix for Bug 34475 - LOCK/REP/REPNE prefixes emitted as instruction on their own by committing rL317330: Fix for Bug 34475 - LOCK/REP/REPNE prefixes emitted as instruction on their own..
Fri, Nov 3, 8:25 AM

Thu, Nov 2

avt77 created D39546: Fix for Bug 34475 - LOCK/REP/REPNE prefixes emitted as instruction on their own.
Thu, Nov 2, 5:14 AM
avt77 committed rL317196: The patch updates sched numbers for YMM AVX instrs such as VMOVx, VORx, VXOR….
The patch updates sched numbers for YMM AVX instrs such as VMOVx, VORx, VXOR…
Thu, Nov 2, 3:34 AM
avt77 closed D39227: [X86][AVX] Update YMM version of instructions scheduling on btver2 by committing rL317196: The patch updates sched numbers for YMM AVX instrs such as VMOVx, VORx, VXOR….
Thu, Nov 2, 3:34 AM

Wed, Nov 1

avt77 abandoned D33099: [X86] Model 256-bit AVX instructions in the AMD Jaguar scheduler (PR28573).

This patch was splitted on 4 related patches which will be committed instead of this one.

Wed, Nov 1, 9:13 AM
avt77 committed rL317101: Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2..
Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2.
Wed, Nov 1, 9:10 AM
avt77 closed D39059: [X86][AVX] Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2 by committing rL317101: Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2..
Wed, Nov 1, 9:10 AM
avt77 updated the diff for D39059: [X86][AVX] Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2.

I fixed the bug with vcvttp*.

Wed, Nov 1, 3:35 AM

Tue, Oct 31

avt77 updated the diff for D39059: [X86][AVX] Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2.

I re-based the required test.

Tue, Oct 31, 7:46 AM
avt77 updated the diff for D39227: [X86][AVX] Update YMM version of instructions scheduling on btver2.

I removed the faked AVX instr.

Tue, Oct 31, 7:12 AM
avt77 added inline comments to D39227: [X86][AVX] Update YMM version of instructions scheduling on btver2.
Tue, Oct 31, 5:49 AM

Mon, Oct 30

avt77 updated the diff for D39227: [X86][AVX] Update YMM version of instructions scheduling on btver2.

Some numbers were changed, some new instructions were added, some model changes were done accordingly to Simon requirements.

Mon, Oct 30, 7:41 AM
avt77 updated the diff for D39059: [X86][AVX] Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2.

New required instructions were added.

Mon, Oct 30, 6:18 AM
avt77 committed rL316898: Invalid used of 'w' suffix on push and pop using 64-bit register..
Invalid used of 'w' suffix on push and pop using 64-bit register.
Mon, Oct 30, 5:02 AM
avt77 closed D38626: Invalid used of 'w' suffix on push and pop using 64-bit register by committing rL316898: Invalid used of 'w' suffix on push and pop using 64-bit register..
Mon, Oct 30, 5:02 AM

Fri, Oct 27

avt77 updated the diff for D39059: [X86][AVX] Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2.

All issues raised by Simon were fixed.

Fri, Oct 27, 8:07 AM
avt77 updated the diff for D38626: Invalid used of 'w' suffix on push and pop using 64-bit register.

The patch was re-based to show the change in the test.

Fri, Oct 27, 3:30 AM

Thu, Oct 26

avt77 committed rL316655: It's a test to demonstrate wrong disassembler with 0x67 prefix.
It's a test to demonstrate wrong disassembler with 0x67 prefix
Thu, Oct 26, 4:15 AM

Wed, Oct 25

avt77 updated the diff for D39059: [X86][AVX] Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2.

I fixed MOVNT* issue raised by Simon.

Wed, Oct 25, 3:17 AM
avt77 updated the diff for D38626: Invalid used of 'w' suffix on push and pop using 64-bit register.

The fix was refactored accordingly to Simon's suggest.
Could somebody give me LGTM?

Wed, Oct 25, 2:13 AM
avt77 updated the diff for D39227: [X86][AVX] Update YMM version of instructions scheduling on btver2.

Commented out code was removed.

Wed, Oct 25, 2:08 AM

Tue, Oct 24

avt77 committed rL316435: Update f16c instruction scheduling on btver2..
Update f16c instruction scheduling on btver2.
Tue, Oct 24, 6:42 AM
avt77 closed D39051: [X86][F16C] Update instruction scheduling on btver2 by committing rL316435: Update f16c instruction scheduling on btver2..
Tue, Oct 24, 6:41 AM
avt77 created D39227: [X86][AVX] Update YMM version of instructions scheduling on btver2.
Tue, Oct 24, 4:23 AM
avt77 retitled D39059: [X86][AVX] Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2 from [X86][AVX] Update instruction scheduling on btver2 to [X86][AVX] Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2.
Tue, Oct 24, 2:17 AM
avt77 updated the diff for D39059: [X86][AVX] Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2.

I rebased the sources and made changes shorter: now we're dealing with 3 changed instrs only.

Tue, Oct 24, 2:16 AM
avt77 added a comment to D39051: [X86][F16C] Update instruction scheduling on btver2.

I'm not shure about WriteCVT3St lattency: is it really 3?

Tue, Oct 24, 12:04 AM
avt77 updated the diff for D39051: [X86][F16C] Update instruction scheduling on btver2.

I rebased f16c-schedule.ll.

Tue, Oct 24, 12:01 AM

Mon, Oct 23

avt77 committed rL316334: Update DPPD/DPPS instruction scheduling on btver2..
Update DPPD/DPPS instruction scheduling on btver2.
Mon, Oct 23, 8:56 AM
avt77 closed D39046: [X86][SSE41][AVX] Update DPPD/DPPS instruction scheduling on btver2 by committing rL316334: Update DPPD/DPPS instruction scheduling on btver2..
Mon, Oct 23, 8:56 AM
avt77 updated the diff for D39051: [X86][F16C] Update instruction scheduling on btver2.

All numbers are from AMD docs now.

Mon, Oct 23, 5:17 AM
avt77 added a comment to D39059: [X86][AVX] Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2.

Postpone review of this patch until D39046 is committed: I should re-base it after that time.

Mon, Oct 23, 5:05 AM
avt77 retitled D39046: [X86][SSE41][AVX] Update DPPD/DPPS instruction scheduling on btver2 from [X86][SSE41] [AVX]Update instruction scheduling on btver2 to [X86][SSE41][AVX] Update DPPD/DPPS instruction scheduling on btver2.
Mon, Oct 23, 4:55 AM
avt77 updated the diff for D39046: [X86][SSE41][AVX] Update DPPD/DPPS instruction scheduling on btver2.

Now all numbers are from AMD docs instead of agner ones.

Mon, Oct 23, 4:55 AM
avt77 abandoned D39093: Certain VEX instructions ignore the W-bit that shouldn'.

Craig implemented this issue in another way (see r316285)

Mon, Oct 23, 2:42 AM
avt77 committed rL316319: Fix for Bug 30718 - Failure to disassemble certain MOV with rex.R. The issue….
Fix for Bug 30718 - Failure to disassemble certain MOV with rex.R. The issue…
Mon, Oct 23, 2:37 AM
avt77 closed D38786: Fix for Bug 30718 - Failure to disassemble certain MOV with rex.R by committing rL316319: Fix for Bug 30718 - Failure to disassemble certain MOV with rex.R. The issue….
Mon, Oct 23, 2:36 AM
avt77 added a comment to D39093: Certain VEX instructions ignore the W-bit that shouldn'.

What is r316285? Could you give the review link? I'd like to understand how you did it.

Mon, Oct 23, 12:43 AM

Oct 20 2017

avt77 updated the diff for D39046: [X86][SSE41][AVX] Update DPPD/DPPS instruction scheduling on btver2.

I added VDPPSY instructions scheduling.

Oct 20 2017, 3:11 AM
avt77 retitled D39046: [X86][SSE41][AVX] Update DPPD/DPPS instruction scheduling on btver2 from [X86][SSE41] Update instruction scheduling on btver2 to [X86][SSE41] [AVX]Update instruction scheduling on btver2.
Oct 20 2017, 3:11 AM
avt77 updated the diff for D38786: Fix for Bug 30718 - Failure to disassemble certain MOV with rex.R.

I did changes accordingly to Craig's requirement: now it works (it seems there were problems with trunk updating).

Oct 20 2017, 1:40 AM

Oct 19 2017

avt77 added a comment to D39046: [X86][SSE41][AVX] Update DPPD/DPPS instruction scheduling on btver2.

To rename as

Oct 19 2017, 7:37 AM
avt77 created D39093: Certain VEX instructions ignore the W-bit that shouldn'.
Oct 19 2017, 7:27 AM
avt77 updated the diff for D39051: [X86][F16C] Update instruction scheduling on btver2.

I fixed issues raised by Simon

Oct 19 2017, 4:31 AM
avt77 closed D37262: The issues with X86 prefixes: step 2.

The patch was committed as rL315899.

Oct 19 2017, 2:33 AM
avt77 added inline comments to D39051: [X86][F16C] Update instruction scheduling on btver2.
Oct 19 2017, 1:20 AM

Oct 18 2017

avt77 created D39059: [X86][AVX] Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2.
Oct 18 2017, 8:36 AM
avt77 retitled D39046: [X86][SSE41][AVX] Update DPPD/DPPS instruction scheduling on btver2 from [X86][F16C] Update instruction scheduling on btver2 to [X86][SSE41] Update instruction scheduling on btver2.
Oct 18 2017, 7:47 AM
avt77 retitled D39046: [X86][SSE41][AVX] Update DPPD/DPPS instruction scheduling on btver2 from SSE 4.1 instructions scheduling in btver2 to [X86][F16C] Update instruction scheduling on btver2.
Oct 18 2017, 7:29 AM
avt77 retitled D39051: [X86][F16C] Update instruction scheduling on btver2 from F16C inructions scheduling on btver2 to [X86][F16C] Update instruction scheduling on btver2.
Oct 18 2017, 7:28 AM
avt77 created D39051: [X86][F16C] Update instruction scheduling on btver2.
Oct 18 2017, 6:10 AM
avt77 created D39046: [X86][SSE41][AVX] Update DPPD/DPPS instruction scheduling on btver2.
Oct 18 2017, 4:47 AM

Oct 17 2017

avt77 updated the diff for D38626: Invalid used of 'w' suffix on push and pop using 64-bit register.

I removed unnecessary attribute usage.

Oct 17 2017, 6:14 AM
avt77 added inline comments to D38626: Invalid used of 'w' suffix on push and pop using 64-bit register.
Oct 17 2017, 5:20 AM
avt77 added inline comments to D38786: Fix for Bug 30718 - Failure to disassemble certain MOV with rex.R.
Oct 17 2017, 5:14 AM
avt77 committed rL315983: More tests with x86 prefixes which work after rL315899 commit.
More tests with x86 prefixes which work after rL315899 commit
Oct 17 2017, 1:50 AM

Oct 16 2017

avt77 added inline comments to D38786: Fix for Bug 30718 - Failure to disassemble certain MOV with rex.R.
Oct 16 2017, 4:30 AM
avt77 committed rL315899: This patch is a result of D37262: The issues with X86 prefixes. It closes….
This patch is a result of D37262: The issues with X86 prefixes. It closes…
Oct 16 2017, 4:14 AM

Oct 13 2017

avt77 updated the diff for D37262: The issues with X86 prefixes: step 2.

Safe implementation for std::unique_ptr usage was done (raised by Craig).

Oct 13 2017, 1:42 AM
avt77 added inline comments to D37262: The issues with X86 prefixes: step 2.
Oct 13 2017, 12:50 AM

Oct 12 2017

avt77 updated the diff for D37262: The issues with X86 prefixes: step 2.

I added tests covering PR21640. Now this patch covers PR7709, PR17697, PR19251, PR32809 and PR21640.

Oct 12 2017, 5:47 AM
avt77 updated the diff for D37262: The issues with X86 prefixes: step 2.

I added usage of isPrefix() accordingly to Craig requirement.

Oct 12 2017, 2:33 AM
avt77 added inline comments to D37262: The issues with X86 prefixes: step 2.
Oct 12 2017, 1:02 AM

Oct 11 2017

avt77 updated the diff for D37262: The issues with X86 prefixes: step 2.

I added a test to cover PR32809.
Guys, could you speed up the review? In fact you already reviewed everything except X86-ASM changes: I did it to have one path for both assembler and disassembler as we agreed in our previuos discussions.

Oct 11 2017, 6:25 AM
avt77 created D38786: Fix for Bug 30718 - Failure to disassemble certain MOV with rex.R.
Oct 11 2017, 1:31 AM
avt77 updated the diff for D33099: [X86] Model 256-bit AVX instructions in the AMD Jaguar scheduler (PR28573).

I made changes related to SSE4.1 and F16C instructions in Jaguar.

Oct 11 2017, 12:39 AM

Oct 6 2017

avt77 created D38626: Invalid used of 'w' suffix on push and pop using 64-bit register.
Oct 6 2017, 7:27 AM

Oct 5 2017

avt77 updated the diff for D33099: [X86] Model 256-bit AVX instructions in the AMD Jaguar scheduler (PR28573).

All updates required by Simon were done.

Oct 5 2017, 6:15 AM

Oct 3 2017

avt77 updated the diff for D37262: The issues with X86 prefixes: step 2.

I re-implemented assembler in case of working with X86-prefixes. Now both X86-assembler and X86-disassembler use the new Flags field from MCInst. As result now it's possible to track several prefixes for one instr and now one prefix is not a separate instruction but only is the parameter of the one. I tried to keep the current tests unchanged where it's possible. And I did not extend/change any diagnostic related to prefixes: it should be done in the follow up patches.

Oct 3 2017, 7:25 AM

Oct 2 2017

avt77 updated the diff for D33099: [X86] Model 256-bit AVX instructions in the AMD Jaguar scheduler (PR28573).

I re-based avx-schedule.ll test.

Oct 2 2017, 5:56 AM

Sep 28 2017

avt77 added a comment to D37262: The issues with X86 prefixes: step 2.

Alternatively, I could add a new X86Operand type (e.g. Prefix): as result I will not change any signature but it will be X86-specific only. What's better from your point of view?

Sep 28 2017, 2:40 AM
avt77 added a comment to D37262: The issues with X86 prefixes: step 2.

After of some investigation of AsmParser I realised that assembler modification to support Flags for proper prefixes elaboration will require signature change of at least 2 virtual functions: ParseInstruction and MatchAndEmitInstruction. The reason of such change is very simple: ParseInstruction does real parsing (and as result could track prefixes) but does not deal with MCInst while MatchAndEmitInstruction create MCInst. This signature modifications will force massive changes in the sources that's why it will be difficult to review.

Sep 28 2017, 2:10 AM

Sep 27 2017

avt77 added a comment to D37262: The issues with X86 prefixes: step 2.

There was a email thread about the issues in this patch. To keep track of those emails I'm putting them here:

Sep 27 2017, 4:37 AM

Sep 26 2017

avt77 updated the diff for D37262: The issues with X86 prefixes: step 2.

I fixed tests mentioned by Craig. And about extension of MCInst: this opaque data (not simple flag) could be really useful for other components (not only for disassembler).

Sep 26 2017, 3:30 PM
avt77 updated the diff for D33099: [X86] Model 256-bit AVX instructions in the AMD Jaguar scheduler (PR28573).

I fixed an issue raised by Simon.

Sep 26 2017, 3:30 PM

Sep 25 2017

avt77 added a comment to D33099: [X86] Model 256-bit AVX instructions in the AMD Jaguar scheduler (PR28573).

Simon, finaly I'm able to create ClothAvx test executable with clang. And I created it with this patch and without it. And I got the following results on AMD laptop (CPU AMD A10-8700P Radeon R6, 10 Compute Cores 4C+6G 1.80 GHz):

Sep 25 2017, 8:51 AM
avt77 added a comment to D37262: The issues with X86 prefixes: step 2.

Craig,
You reviewed https://reviews.llvm.org/D36788 which was the first step of fixing issues with prefixes: could you review this new patch as well? In fact it's simply an extended version of D36788 and covers issues raised by echristo.

Sep 25 2017, 5:03 AM

Sep 21 2017

avt77 closed D37292: 'into' instruction should not be decoded as valid in 64-bit mode.

r313735

Sep 21 2017, 1:07 AM

Sep 20 2017

avt77 committed rL313735: 'into' instruction should not be decoded as a valid instr in 64-bit mode.
'into' instruction should not be decoded as a valid instr in 64-bit mode
Sep 20 2017, 1:18 AM

Sep 19 2017

avt77 updated the diff for D37262: The issues with X86 prefixes: step 2.

I fixed issues raised by Craig and Simon.

Sep 19 2017, 3:58 AM
avt77 abandoned D34056: Tail merge size.

It seems nobody wants to change the default value of the switch.

Sep 19 2017, 3:45 AM
avt77 abandoned D36788: The issues with X86 prefixes.

D37262 covers all issues from this review plus some others that's why we don't need D36788 any more.

Sep 19 2017, 3:43 AM
avt77 updated the diff for D37292: 'into' instruction should not be decoded as valid in 64-bit mode.

I re-implemented the fix accordingly to Craig suggest.

Sep 19 2017, 3:17 AM

Aug 30 2017

avt77 added reviewers for D37292: 'into' instruction should not be decoded as valid in 64-bit mode: RKSimon, craig.topper, echristo, davide, dtemirbulatov.
Aug 30 2017, 4:32 AM
avt77 created D37292: 'into' instruction should not be decoded as valid in 64-bit mode.
Aug 30 2017, 4:29 AM