Disable all relaxations for ARM TLS
The ARM TLS relocations are placed on literal data and not the code-sequence, it is therefore not possible to implement the relaxTls* functions. The Mips Target also does not do TLS relaxation and has a separate handleMipsTlsRelocation() function to keep handleTlsRelocation() clean from target specific hooks. I've chosen to rename handleMipsTlsRelocation() to handleNoRelaxTlsRelocation() so that it can be used for both ARM and Mips.
Unfortunately there are some differences in ARM and Mips target handling as there are some cases where Mips can omit a dynamic relocation where ARM cannot. I tried some experiments to see if I could get away without these changes, but they caused segfaults at runtime. The Mips code should be logically identical to what it was before.
There is still some work to be done for ARM TLS and static linking, I'll address this separately as it is a smaller use case.
The 4 test cases will fail assertions without these changes.
This should address PR30218 (https://llvm.org/bugs/show_bug.cgi?id=30218)