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Differential D21125

[llvm-objdump] Support detection of feature bits from the object and implement this for Mips.
ClosedPublic

Authored by dsanders on Jun 8 2016, 3:19 AM.

Details

Reviewers
echristo
• rafael
Commits
rG1d14864bb35b: [llvm-objdump] Support detection of feature bits from the object and implement…
rL272880: [llvm-objdump] Support detection of feature bits from the object and…
Summary

The Mips implementation only covers the feature bits described by the ELF
e_flags so far. Mips stores additional feature bits such as MSA in the
.MIPS.abiflags section.

Also fixed a small bug this revealed where microMIPS wouldn't add the
EF_MIPS_MICROMIPS flag when using -filetype=obj.

Diff Detail

Event Timeline

dsanders updated this revision to Diff 60011.Jun 8 2016, 3:19 AM
dsanders retitled this revision from to [llvm-objdump] Support detection of feature bits from the object and implement this for Mips..
dsanders updated this object.
dsanders added a subscriber: llvm-commits.
Herald added subscribers: sdardis, dsanders. · View Herald TranscriptJun 8 2016, 3:19 AM
llvm-commits added a comment.Jun 13 2016, 1:55 PM

Sounds reasonable, but why not return a SubtargetFeatures?
dsanders created this revision.
dsanders added a subscriber: llvm-commits.
Herald added subscribers: sdardis, dsanders.

The Mips implementation only covers the feature bits described by the ELF
e_flags so far. Mips stores additional feature bits such as MSA in the
.MIPS.abiflags section.

Also fixed a small bug this revealed where microMIPS wouldn't add the
EF_MIPS_MICROMIPS flag when using -filetype=obj.

http://reviews.llvm.org/D21125

Files:

include/llvm/Object/COFF.h
include/llvm/Object/ELFObjectFile.h
include/llvm/Object/MachO.h
include/llvm/Object/ObjectFile.h
include/llvm/Support/ELF.h
lib/Target/Mips/MipsAsmPrinter.cpp
test/CodeGen/Mips/Fast-ISel/shift.ll
test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll
test/CodeGen/Mips/micromips-atomic1.ll
test/MC/Mips/cpload.s
test/MC/Mips/cprestore-noreorder-noat.s
test/MC/Mips/cprestore-noreorder.s
test/MC/Mips/cprestore-reorder.s
test/MC/Mips/cpsetup.s
test/MC/Mips/micromips-el-fixup-data.s
test/MC/Mips/mips64extins.s
test/MC/Mips/mips_gprel16.s
test/MC/Mips/set-defined-symbol.s
test/Object/Mips/feature.test
test/Object/Mips/objdump-micro-mips.test
tools/llvm-objdump/llvm-objdump.cpp

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echristo added a reviewer: echristo.Jun 13 2016, 5:04 PM
dsanders updated this revision to Diff 60674.Jun 14 2016, 6:29 AM

Change getFeatureStr() to return a SubtargetFeatures object and rename it to
getFeatures().

Herald added a subscriber: mehdi_amini. · View Herald TranscriptJun 14 2016, 6:29 AM
• rafael added a subscriber: • rafael.Jun 14 2016, 7:00 AM
• rafael added inline comments.
include/llvm/Object/ELFObjectFile.h
949

I just noticed that this is entirely implemented on top of getPlatformFlags.

This means that we could

  • Move this out of lib/Object. It is only needed by code that does disassembly, no?
  • Make this a non virtual function.
  • At least implement it in ELFObjectFileBase so it is not templated.

Please implement one of these.

tools/llvm-objdump/llvm-objdump.cpp
936

Can you delete the MAttrs?

dsanders added inline comments.Jun 14 2016, 9:44 AM
include/llvm/Object/ELFObjectFile.h
949

I just noticed that this is entirely implemented on top of getPlatformFlags.

That's correct at the moment but the MIPS implementation should eventually read the .MIPS.abiflags section to detect MSA, DSP, etc. Do any other targets store feature flags outside of the ELF e_flags?

Move this out of lib/Object. It is only needed by code that does disassembly, no?

Yes, it's just for disassembly. Where would be the best place to put it?

Make this a non virtual function.

The main reason it's a virtual function is to allow any object format to initialize the SubtargetFeatures for the disassembler. I assume COFF and MachO have something equivalent to the ELF e_flags but I don't know those formats.

At least implement it in ELFObjectFileBase so it is not templated.

Ok.

tools/llvm-objdump/llvm-objdump.cpp
936

A small number of ARM, AArch64, and Hexagon tests are still using it but only two of them fail when I stop the option having an effect.

The ones that fail when I remove the option are:

LLVM :: CodeGen/ARM/trap.ll
LLVM :: MC/AArch64/optional-hash.s
LLVM :: MC/Hexagon/v60-misc.s
LLVM :: Object/Mips/feature.test
LLVM :: Object/Mips/objdump-micro-mips.test
LLVM :: tools/llvm-objdump/ARM/macho-mattr-arm.test

of which these two fail when the option exists but has no effect:

LLVM :: CodeGen/ARM/trap.ll
LLVM :: tools/llvm-objdump/ARM/macho-mattr-arm.test

I can update the ones that don't need it, but I'm not sure how to fix the two ARM tests.

dsanders added inline comments.Jun 14 2016, 10:14 AM
include/llvm/Object/ELFObjectFile.h
949

At least implement it in ELFObjectFileBase so it is not templated.

Ok.

I'm not sure it's possible to eliminate the templating. The outermost switch is based on e_machine which has different types depending on the endianness of the ELF. Have I missed something?

dsanders added a child revision: D21292: [mips] Correct ELF format for N32..Jun 15 2016, 6:32 AM
• rafael accepted this revision.Jun 15 2016, 6:46 AM
• rafael added a reviewer: • rafael.

LGTM with the implementation moved to ELFObjectFileBase and to the .cpp file.

include/llvm/Object/ELFObjectFile.h
949

Can you add a virtual "uint16_t getEMachine();" to ELFObjectFileBase?

With that you should be able to move this too to ELFObjectFIleBase and implement it in the .cpp file.

This revision is now accepted and ready to land.Jun 15 2016, 6:46 AM
dsanders updated this revision to Diff 60846.Jun 15 2016, 9:04 AM
dsanders edited edge metadata.

Thanks.

Moved the implementation to ELFObjectFileBase and the .cpp. I'll commit in the morning.

dsanders added a comment.Jun 15 2016, 9:08 AM

I forgot to mention in the update message that there's also some small test changes to make it possible to commit this before the earlier patches in my current series.

dsanders closed this revision.Jun 16 2016, 2:23 AM
Closed by commit rL272880: [llvm-objdump] Support detection of feature bits from the object and… (authored by dsanders). · Explain WhyJun 16 2016, 2:23 AM
This revision was automatically updated to reflect the committed changes.
scott.linder mentioned this in D84519: [llvm-objdump][AMDGPU] Detect CPU string.Aug 6 2020, 2:04 PM

Revision Contents

PathSize
include/
llvm/
Object/
1 line
70 lines
1 line
2 lines
Support/
1 line
lib/
Target/
Mips/
5 lines
test/
CodeGen/
Mips/
Fast-ISel/
2 lines
compactbranches/
3 lines
3 lines
MC/
Mips/
9 lines
3 lines
3 lines
3 lines
11 lines
2 lines
2 lines
6 lines
2 lines
Object/
Mips/
1 line
1 line
tools/
llvm-objdump/
6 lines

Diff 60674

include/llvm/Object/COFF.h

Show First 20 Lines • Show All 762 Lines • ▼ Show 20 Linespublic:
COFFSymbolRef getCOFFSymbol(const SymbolRef &Symbol) const; COFFSymbolRef getCOFFSymbol(const SymbolRef &Symbol) const;
const coff_relocation *getCOFFRelocation(const RelocationRef &Reloc) const; const coff_relocation *getCOFFRelocation(const RelocationRef &Reloc) const;
unsigned getSectionID(SectionRef Sec) const; unsigned getSectionID(SectionRef Sec) const;
unsigned getSymbolSectionID(SymbolRef Sym) const; unsigned getSymbolSectionID(SymbolRef Sym) const;
uint8_t getBytesInAddress() const override; uint8_t getBytesInAddress() const override;
StringRef getFileFormatName() const override; StringRef getFileFormatName() const override;
unsigned getArch() const override; unsigned getArch() const override;
SubtargetFeatures getFeatures() const override { return SubtargetFeatures(); }
import_directory_iterator import_directory_begin() const; import_directory_iterator import_directory_begin() const;
import_directory_iterator import_directory_end() const; import_directory_iterator import_directory_end() const;
delay_import_directory_iterator delay_import_directory_begin() const; delay_import_directory_iterator delay_import_directory_begin() const;
delay_import_directory_iterator delay_import_directory_end() const; delay_import_directory_iterator delay_import_directory_end() const;
export_directory_iterator export_directory_begin() const; export_directory_iterator export_directory_begin() const;
export_directory_iterator export_directory_end() const; export_directory_iterator export_directory_end() const;
base_reloc_iterator base_reloc_begin() const; base_reloc_iterator base_reloc_begin() const;
▲ Show 20 Lines • Show All 232 Lines • Show Last 20 Lines

include/llvm/Object/ELFObjectFile.h

Show All 13 Lines
#ifndef LLVM_OBJECT_ELFOBJECTFILE_H #ifndef LLVM_OBJECT_ELFOBJECTFILE_H
#define LLVM_OBJECT_ELFOBJECTFILE_H #define LLVM_OBJECT_ELFOBJECTFILE_H
#include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h" #include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Triple.h" #include "llvm/ADT/Triple.h"
#include "llvm/ADT/iterator_range.h" #include "llvm/ADT/iterator_range.h"
#include "llvm/MC/SubtargetFeature.h"
#include "llvm/Object/Binary.h" #include "llvm/Object/Binary.h"
#include "llvm/Object/ELF.h" #include "llvm/Object/ELF.h"
#include "llvm/Object/ELFTypes.h" #include "llvm/Object/ELFTypes.h"
#include "llvm/Object/Error.h" #include "llvm/Object/Error.h"
#include "llvm/Object/ObjectFile.h" #include "llvm/Object/ObjectFile.h"
#include "llvm/Object/SymbolicFile.h" #include "llvm/Object/SymbolicFile.h"
#include "llvm/Support/Casting.h" #include "llvm/Support/Casting.h"
#include "llvm/Support/ELF.h" #include "llvm/Support/ELF.h"
▲ Show 20 Lines • Show All 292 Lines • ▼ Show 20 Linespublic:
section_iterator section_begin() const override; section_iterator section_begin() const override;
section_iterator section_end() const override; section_iterator section_end() const override;
ErrorOr<int64_t> getRelocationAddend(DataRefImpl Rel) const override; ErrorOr<int64_t> getRelocationAddend(DataRefImpl Rel) const override;
uint8_t getBytesInAddress() const override; uint8_t getBytesInAddress() const override;
StringRef getFileFormatName() const override; StringRef getFileFormatName() const override;
unsigned getArch() const override; unsigned getArch() const override;
SubtargetFeatures getFeatures() const override;
std::error_code getPlatformFlags(unsigned &Result) const override { std::error_code getPlatformFlags(unsigned &Result) const override {
Result = EF.getHeader()->e_flags; Result = EF.getHeader()->e_flags;
return std::error_code(); return std::error_code();
} }
const ELFFile<ELFT> *getELFFile() const { return &EF; } const ELFFile<ELFT> *getELFFile() const { return &EF; }
▲ Show 20 Lines • Show All 601 Lines • ▼ Show 20 Lines return (EF.getHeader()->e_ident[ELF::EI_CLASS] == ELF::ELFCLASS64
Triple::amdgcn : Triple::UnknownArch; Triple::amdgcn : Triple::UnknownArch;
default: default:
return Triple::UnknownArch; return Triple::UnknownArch;
} }
} }
template <class ELFT> template <class ELFT>
SubtargetFeatures ELFObjectFile<ELFT>::getFeatures() const {
rafaelUnsubmitted
Not Done
ReplyInline Actions

I just noticed that this is entirely implemented on top of getPlatformFlags.

This means that we could

  • Move this out of lib/Object. It is only needed by code that does disassembly, no?
  • Make this a non virtual function.
  • At least implement it in ELFObjectFileBase so it is not templated.

Please implement one of these.

rafael: I just noticed that this is entirely implemented on top of getPlatformFlags. This means that…
dsandersAuthorUnsubmitted
Not Done
ReplyInline Actions

I just noticed that this is entirely implemented on top of getPlatformFlags.

That's correct at the moment but the MIPS implementation should eventually read the .MIPS.abiflags section to detect MSA, DSP, etc. Do any other targets store feature flags outside of the ELF e_flags?

Move this out of lib/Object. It is only needed by code that does disassembly, no?

Yes, it's just for disassembly. Where would be the best place to put it?

Make this a non virtual function.

The main reason it's a virtual function is to allow any object format to initialize the SubtargetFeatures for the disassembler. I assume COFF and MachO have something equivalent to the ELF e_flags but I don't know those formats.

At least implement it in ELFObjectFileBase so it is not templated.

Ok.

dsanders: > I just noticed that this is entirely implemented on top of getPlatformFlags. That's correct…
dsandersAuthorUnsubmitted
Not Done
ReplyInline Actions

At least implement it in ELFObjectFileBase so it is not templated.

Ok.

I'm not sure it's possible to eliminate the templating. The outermost switch is based on e_machine which has different types depending on the endianness of the ELF. Have I missed something?

dsanders: > > At least implement it in ELFObjectFileBase so it is not templated. > Ok. I'm not sure it's…
rafaelUnsubmitted
Not Done
ReplyInline Actions

Can you add a virtual "uint16_t getEMachine();" to ELFObjectFileBase?

With that you should be able to move this too to ELFObjectFIleBase and implement it in the .cpp file.

rafael: Can you add a virtual "uint16_t getEMachine();" to ELFObjectFileBase? With that you should be…
switch (EF.getHeader()->e_machine) {
case ELF::EM_MIPS: {
SubtargetFeatures Features;
unsigned PlatformFlags;
getPlatformFlags(PlatformFlags);
switch (PlatformFlags & ELF::EF_MIPS_ARCH) {
case ELF::EF_MIPS_ARCH_1:
break;
case ELF::EF_MIPS_ARCH_2:
Features.AddFeature("mips2");
break;
case ELF::EF_MIPS_ARCH_3:
Features.AddFeature("mips3");
break;
case ELF::EF_MIPS_ARCH_4:
Features.AddFeature("mips4");
break;
case ELF::EF_MIPS_ARCH_5:
Features.AddFeature("mips5");
break;
case ELF::EF_MIPS_ARCH_32:
Features.AddFeature("mips32");
break;
case ELF::EF_MIPS_ARCH_64:
Features.AddFeature("mips64");
break;
case ELF::EF_MIPS_ARCH_32R2:
Features.AddFeature("mips32r2");
break;
case ELF::EF_MIPS_ARCH_64R2:
Features.AddFeature("mips64r2");
break;
case ELF::EF_MIPS_ARCH_32R6:
Features.AddFeature("mips32r6");
break;
case ELF::EF_MIPS_ARCH_64R6:
Features.AddFeature("mips64r6");
break;
default:
llvm_unreachable("Unknown EF_MIPS_ARCH value");
}
switch (PlatformFlags & ELF::EF_MIPS_MACH) {
case ELF::EF_MIPS_MACH_NONE:
// No feature associated with this value.
break;
case ELF::EF_MIPS_MACH_OCTEON:
Features.AddFeature("cnmips");
break;
default:
llvm_unreachable("Unknown EF_MIPS_ARCH value");
}
if (PlatformFlags & ELF::EF_MIPS_ARCH_ASE_M16)
Features.AddFeature("mips16");
if (PlatformFlags & ELF::EF_MIPS_MICROMIPS)
Features.AddFeature("micromips");
return Features;
}
default:
return SubtargetFeatures();
}
}
template <class ELFT>
ELFObjectFileBase::elf_symbol_iterator_range ELFObjectFileBase::elf_symbol_iterator_range
ELFObjectFile<ELFT>::getDynamicSymbolIterators() const { ELFObjectFile<ELFT>::getDynamicSymbolIterators() const {
return make_range(dynamic_symbol_begin(), dynamic_symbol_end()); return make_range(dynamic_symbol_begin(), dynamic_symbol_end());
} }
template <class ELFT> bool ELFObjectFile<ELFT>::isRelocatableObject() const { template <class ELFT> bool ELFObjectFile<ELFT>::isRelocatableObject() const {
return EF.getHeader()->e_type == ELF::ET_REL; return EF.getHeader()->e_type == ELF::ET_REL;
} }
} // end namespace object } // end namespace object
} // end namespace llvm } // end namespace llvm
#endif // LLVM_OBJECT_ELFOBJECTFILE_H #endif // LLVM_OBJECT_ELFOBJECTFILE_H

include/llvm/Object/MachO.h

Show First 20 Lines • Show All 256 Lines • ▼ Show 20 Linespublic:
section_iterator section_begin() const override; section_iterator section_begin() const override;
section_iterator section_end() const override; section_iterator section_end() const override;
uint8_t getBytesInAddress() const override; uint8_t getBytesInAddress() const override;
StringRef getFileFormatName() const override; StringRef getFileFormatName() const override;
unsigned getArch() const override; unsigned getArch() const override;
SubtargetFeatures getFeatures() const override { return SubtargetFeatures(); }
Triple getArchTriple(const char **McpuDefault = nullptr) const; Triple getArchTriple(const char **McpuDefault = nullptr) const;
relocation_iterator section_rel_begin(unsigned Index) const; relocation_iterator section_rel_begin(unsigned Index) const;
relocation_iterator section_rel_end(unsigned Index) const; relocation_iterator section_rel_end(unsigned Index) const;
dice_iterator begin_dices() const; dice_iterator begin_dices() const;
dice_iterator end_dices() const; dice_iterator end_dices() const;
▲ Show 20 Lines • Show All 254 Lines • Show Last 20 Lines

include/llvm/Object/ObjectFile.h

Show All 9 Lines
// This file declares a file format independent ObjectFile class. // This file declares a file format independent ObjectFile class.
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_OBJECTFILE_H #ifndef LLVM_OBJECT_OBJECTFILE_H
#define LLVM_OBJECT_OBJECTFILE_H #define LLVM_OBJECT_OBJECTFILE_H
#include "llvm/ADT/StringRef.h" #include "llvm/ADT/StringRef.h"
#include "llvm/MC/SubtargetFeature.h"
#include "llvm/Object/SymbolicFile.h" #include "llvm/Object/SymbolicFile.h"
#include "llvm/Support/DataTypes.h" #include "llvm/Support/DataTypes.h"
#include "llvm/Support/ErrorHandling.h" #include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/FileSystem.h" #include "llvm/Support/FileSystem.h"
#include "llvm/Support/MemoryBuffer.h" #include "llvm/Support/MemoryBuffer.h"
#include <cstring> #include <cstring>
namespace llvm { namespace llvm {
▲ Show 20 Lines • Show All 231 Lines • ▼ Show 20 Linespublic:
} }
/// @brief The number of bytes used to represent an address in this object /// @brief The number of bytes used to represent an address in this object
/// file format. /// file format.
virtual uint8_t getBytesInAddress() const = 0; virtual uint8_t getBytesInAddress() const = 0;
virtual StringRef getFileFormatName() const = 0; virtual StringRef getFileFormatName() const = 0;
virtual /* Triple::ArchType */ unsigned getArch() const = 0; virtual /* Triple::ArchType */ unsigned getArch() const = 0;
virtual SubtargetFeatures getFeatures() const = 0;
/// Returns platform-specific object flags, if any. /// Returns platform-specific object flags, if any.
virtual std::error_code getPlatformFlags(unsigned &Result) const { virtual std::error_code getPlatformFlags(unsigned &Result) const {
Result = 0; Result = 0;
return object_error::invalid_file_type; return object_error::invalid_file_type;
} }
/// True if this is a relocatable object (.o/.obj). /// True if this is a relocatable object (.o/.obj).
▲ Show 20 Lines • Show All 199 Lines • Show Last 20 Lines

include/llvm/Support/ELF.h

Show First 20 Lines • Show All 480 Lines • ▼ Show 20 Linesenum : unsigned {
// ABI flags // ABI flags
EF_MIPS_ABI_O32 = 0x00001000, // This file follows the first MIPS 32 bit ABI EF_MIPS_ABI_O32 = 0x00001000, // This file follows the first MIPS 32 bit ABI
EF_MIPS_ABI_O64 = 0x00002000, // O32 ABI extended for 64-bit architecture. EF_MIPS_ABI_O64 = 0x00002000, // O32 ABI extended for 64-bit architecture.
EF_MIPS_ABI_EABI32 = 0x00003000, // EABI in 32 bit mode. EF_MIPS_ABI_EABI32 = 0x00003000, // EABI in 32 bit mode.
EF_MIPS_ABI_EABI64 = 0x00004000, // EABI in 64 bit mode. EF_MIPS_ABI_EABI64 = 0x00004000, // EABI in 64 bit mode.
EF_MIPS_ABI = 0x0000f000, // Mask for selecting EF_MIPS_ABI_ variant. EF_MIPS_ABI = 0x0000f000, // Mask for selecting EF_MIPS_ABI_ variant.
// MIPS machine variant // MIPS machine variant
EF_MIPS_MACH_NONE = 0x00000000, // A standard MIPS implementation.
EF_MIPS_MACH_3900 = 0x00810000, // Toshiba R3900 EF_MIPS_MACH_3900 = 0x00810000, // Toshiba R3900
EF_MIPS_MACH_4010 = 0x00820000, // LSI R4010 EF_MIPS_MACH_4010 = 0x00820000, // LSI R4010
EF_MIPS_MACH_4100 = 0x00830000, // NEC VR4100 EF_MIPS_MACH_4100 = 0x00830000, // NEC VR4100
EF_MIPS_MACH_4650 = 0x00850000, // MIPS R4650 EF_MIPS_MACH_4650 = 0x00850000, // MIPS R4650
EF_MIPS_MACH_4120 = 0x00870000, // NEC VR4120 EF_MIPS_MACH_4120 = 0x00870000, // NEC VR4120
EF_MIPS_MACH_4111 = 0x00880000, // NEC VR4111/VR4181 EF_MIPS_MACH_4111 = 0x00880000, // NEC VR4111/VR4181
EF_MIPS_MACH_SB1 = 0x008a0000, // Broadcom SB-1 EF_MIPS_MACH_SB1 = 0x008a0000, // Broadcom SB-1
EF_MIPS_MACH_OCTEON = 0x008b0000, // Cavium Networks Octeon EF_MIPS_MACH_OCTEON = 0x008b0000, // Cavium Networks Octeon
▲ Show 20 Lines • Show All 853 Lines • Show Last 20 Lines

lib/Target/Mips/MipsAsmPrinter.cpp

Show First 20 Lines • Show All 319 Lines • ▼ Show 20 Lines
void MipsAsmPrinter::EmitFunctionEntryLabel() { void MipsAsmPrinter::EmitFunctionEntryLabel() {
MipsTargetStreamer &TS = getTargetStreamer(); MipsTargetStreamer &TS = getTargetStreamer();
// NaCl sandboxing requires that indirect call instructions are masked. // NaCl sandboxing requires that indirect call instructions are masked.
// This means that function entry points should be bundle-aligned. // This means that function entry points should be bundle-aligned.
if (Subtarget->isTargetNaCl()) if (Subtarget->isTargetNaCl())
EmitAlignment(std::max(MF->getAlignment(), MIPS_NACL_BUNDLE_ALIGN)); EmitAlignment(std::max(MF->getAlignment(), MIPS_NACL_BUNDLE_ALIGN));
if (Subtarget->inMicroMipsMode()) if (Subtarget->inMicroMipsMode()) {
TS.emitDirectiveSetMicroMips(); TS.emitDirectiveSetMicroMips();
else TS.setUsesMicroMips();
} else
TS.emitDirectiveSetNoMicroMips(); TS.emitDirectiveSetNoMicroMips();
if (Subtarget->inMips16Mode()) if (Subtarget->inMips16Mode())
TS.emitDirectiveSetMips16(); TS.emitDirectiveSetMips16();
else else
TS.emitDirectiveSetNoMips16(); TS.emitDirectiveSetNoMips16();
TS.emitDirectiveEnt(*CurrentFnSym); TS.emitDirectiveEnt(*CurrentFnSym);
▲ Show 20 Lines • Show All 732 Lines • Show Last 20 Lines

test/CodeGen/Mips/Fast-ISel/shift.ll

; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 -fast-isel=true -filetype=obj %s -o - \ ; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 -fast-isel=true -filetype=obj %s -o - \
; RUN: | llvm-objdump -arch mipsel -mcpu=mips32r2 -d - | FileCheck %s ; RUN: | llvm-objdump -d - | FileCheck %s
; This test checks that encoding for srl is correct when fast-isel for mips32r2 is used. ; This test checks that encoding for srl is correct when fast-isel for mips32r2 is used.
%struct.s = type { [4 x i8], i32 } %struct.s = type { [4 x i8], i32 }
define i32 @main() nounwind uwtable { define i32 @main() nounwind uwtable {
entry: entry:
%foo = alloca %struct.s, align 4 %foo = alloca %struct.s, align 4
Show All 14 Lines

test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll

; RUN: llc -march=mipsel -mcpu=mips32r6 -disable-mips-delay-filler < %s | FileCheck %s ; RUN: llc -march=mipsel -mcpu=mips32r6 -disable-mips-delay-filler < %s | FileCheck %s
; RUN: llc -march=mips -mcpu=mips32r6 -disable-mips-delay-filler < %s -filetype=obj -o - | llvm-objdump -arch=mips -mcpu=mips32r6 -d - | FileCheck %s -check-prefix=ENCODING ; RUN: llc -march=mips -mcpu=mips32r6 -disable-mips-delay-filler < %s \
; RUN: -filetype=obj -o - | llvm-objdump -d - | FileCheck %s -check-prefix=ENCODING
; bnezc and beqzc have restriction that $rt != 0 ; bnezc and beqzc have restriction that $rt != 0
define i32 @f() { define i32 @f() {
; CHECK-LABEL: f ; CHECK-LABEL: f
; CHECK-NOT: bnezc $0 ; CHECK-NOT: bnezc $0
%cmp = icmp eq i32 1, 1 %cmp = icmp eq i32 1, 1
▲ Show 20 Lines • Show All 42 Lines • Show Last 20 Lines

test/CodeGen/Mips/micromips-atomic1.ll

; RUN: llc -march=mipsel -filetype=obj --disable-machine-licm -mattr=micromips < %s -o - \ ; RUN: llc -march=mipsel -filetype=obj --disable-machine-licm -mattr=micromips < %s -o - \
; RUN: | llvm-objdump -no-show-raw-insn -arch mipsel -mcpu=mips32r2 -mattr=micromips -d - \ ; RUN: | llvm-objdump -no-show-raw-insn -d - | FileCheck %s -check-prefix=MICROMIPS
; RUN: | FileCheck %s -check-prefix=MICROMIPS
; Use llvm-objdump to check wheter the encodings of microMIPS atomic instructions are correct. ; Use llvm-objdump to check wheter the encodings of microMIPS atomic instructions are correct.
; While emitting assembly files directly when in microMIPS mode, it is possible to emit a mips32r2 ; While emitting assembly files directly when in microMIPS mode, it is possible to emit a mips32r2
; instruction instead of microMIPS instruction, and since many mips32r2 and microMIPS ; instruction instead of microMIPS instruction, and since many mips32r2 and microMIPS
; instructions have identical assembly formats, invalid instruction cannot be detected. ; instructions have identical assembly formats, invalid instruction cannot be detected.
@y = common global i8 0, align 1 @y = common global i8 0, align 1
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test/MC/Mips/cpload.s

# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 | FileCheck %s -check-prefix=ASM # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 | FileCheck %s -check-prefix=ASM
# #
# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o -| \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o -| \
# RUN: llvm-objdump -d -r -arch=mips - | \ # RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=OBJ-O32
# RUN: FileCheck %s -check-prefix=OBJ-O32
# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mabi=n32 -filetype=obj -o -| \ # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mabi=n32 -filetype=obj -o -| \
# RUN: llvm-objdump -d -r -arch=mips - | \ # RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=OBJ-N32
# RUN: FileCheck %s -check-prefix=OBJ-N32
# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -filetype=obj -o -| \ # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -filetype=obj -o -| \
# RUN: llvm-objdump -d -r -arch=mips - | \ # RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=OBJ-N64
# RUN: FileCheck %s -check-prefix=OBJ-N64
# ASM: .text # ASM: .text
# ASM: .option pic2 # ASM: .option pic2
# ASM: .set noreorder # ASM: .set noreorder
# ASM: .cpload $25 # ASM: .cpload $25
# ASM: .set reorder # ASM: .set reorder
# OBJ-O32: .text # OBJ-O32: .text
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test/MC/Mips/cprestore-noreorder-noat.s

# RUN: not llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -filetype=obj \ # RUN: not llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -filetype=obj \
# RUN: -o /dev/null 2>&1 | FileCheck %s -check-prefix=O32 # RUN: -o /dev/null 2>&1 | FileCheck %s -check-prefix=O32
# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 \ # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 \
# RUN: -filetype=obj -o /dev/null 2>&1 | FileCheck %s -allow-empty -check-prefix=N32 # RUN: -filetype=obj -o /dev/null 2>&1 | FileCheck %s -allow-empty -check-prefix=N32
# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -mabi=n32 \ # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -mabi=n32 \
# RUN: -filetype=obj -o /dev/null 2>&1 | FileCheck %s -allow-empty -check-prefix=N64 # RUN: -filetype=obj -o /dev/null 2>&1 | FileCheck %s -allow-empty -check-prefix=N64
# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -mabi=n32 \ # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -mabi=n32 \
# RUN: -filetype=obj -o - | llvm-objdump -d -r - | \ # RUN: -filetype=obj -o - | llvm-objdump -d -r - | \
# RUN: FileCheck %s -check-prefix=NO-STORE # RUN: FileCheck %s -check-prefix=NO-STORE
# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -filetype=obj -o - | \ # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -filetype=obj -o - | \
# RUN: llvm-objdump -d -r - | \ # RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=NO-STORE
# RUN: FileCheck %s -check-prefix=NO-STORE
.text .text
.ent foo .ent foo
foo: foo:
.frame $sp, 0, $ra .frame $sp, 0, $ra
.set noreorder .set noreorder
.set noat .set noat
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test/MC/Mips/cprestore-noreorder.s

# RUN: llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -show-encoding | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -show-encoding | \
# RUN: FileCheck %s # RUN: FileCheck %s
# RUN: llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -filetype=obj -o -| \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -filetype=obj -o -| \
# RUN: llvm-objdump -d -r -arch=mips - | \ # RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=CHECK-FOR-STORE
# RUN: FileCheck %s -check-prefix=CHECK-FOR-STORE
# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+micromips --position-independent -show-encoding | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+micromips --position-independent -show-encoding | \
# RUN: FileCheck %s -check-prefix=MICROMIPS # RUN: FileCheck %s -check-prefix=MICROMIPS
# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -show-encoding | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -show-encoding | \
# RUN: FileCheck %s -check-prefix=NO-PIC # RUN: FileCheck %s -check-prefix=NO-PIC
# RUN: llvm-mc %s -arch=mips -mcpu=mips64 -mabi=n32 --position-independent -show-encoding | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips64 -mabi=n32 --position-independent -show-encoding | \
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test/MC/Mips/cprestore-reorder.s

# RUN: llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -show-encoding | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -show-encoding | \
# RUN: FileCheck %s # RUN: FileCheck %s
# RUN: llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -filetype=obj -o -| \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -filetype=obj -o -| \
# RUN: llvm-objdump -d -r -arch=mips - | \ # RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=CHECK-FOR-STORE
# RUN: FileCheck %s -check-prefix=CHECK-FOR-STORE
# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+micromips --position-independent -show-encoding | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+micromips --position-independent -show-encoding | \
# RUN: FileCheck %s -check-prefix=MICROMIPS # RUN: FileCheck %s -check-prefix=MICROMIPS
# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -show-encoding | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -show-encoding | \
# RUN: FileCheck %s -check-prefix=NO-PIC # RUN: FileCheck %s -check-prefix=NO-PIC
# RUN: llvm-mc %s -arch=mips -mcpu=mips64 -mabi=n32 --position-independent -show-encoding | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips64 -mabi=n32 --position-independent -show-encoding | \
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test/MC/Mips/cpsetup.s

# RUN: llvm-mc -triple mips64-unknown-linux -mabi=o32 -filetype=obj -o - %s | \ # RUN: llvm-mc -triple mips64-unknown-linux -mabi=o32 -filetype=obj -o - %s | \
# RUN: llvm-objdump -d -r -arch=mips64 - | \ # RUN: llvm-objdump -d -r - | FileCheck -check-prefix=ALL -check-prefix=O32 %s
# RUN: FileCheck -check-prefix=ALL -check-prefix=O32 %s
# RUN: llvm-mc -triple mips64-unknown-linux -mabi=o32 %s | \ # RUN: llvm-mc -triple mips64-unknown-linux -mabi=o32 %s | \
# RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s # RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s
# RUN: llvm-mc -triple mips64-unknown-linux -mabi=n32 -filetype=obj -o - %s | \ # RUN: llvm-mc -triple mips64-unknown-linux -mabi=n32 -filetype=obj -o - %s | \
# RUN: llvm-objdump -d -r -arch=mips64 - | \ # RUN: llvm-objdump -d -r - | \
# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N32 %s # RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N32 %s
# RUN: llvm-mc -triple mips64-unknown-linux -mabi=n32 %s | \ # RUN: llvm-mc -triple mips64-unknown-linux -mabi=n32 %s | \
# RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s # RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s
# RUN: llvm-mc -triple mips64-unknown-linux %s -filetype=obj -o - | \ # RUN: llvm-mc -triple mips64-unknown-linux %s -filetype=obj -o - | \
# RUN: llvm-objdump -d -r -arch=mips64 - | \ # RUN: llvm-objdump -d -r - | \
# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N64 %s # RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N64 %s
# RUN: llvm-mc -triple mips64-unknown-linux %s | \ # RUN: llvm-mc -triple mips64-unknown-linux %s | \
# RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s # RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s
.text .text
.option pic2 .option pic2
t1: t1:
.cpsetup $25, 8, __cerror .cpsetup $25, 8, __cerror
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test/MC/Mips/micromips-el-fixup-data.s

# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 \ # RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 \
# RUN: -mattr=+micromips 2>&1 -filetype=obj > %t.o # RUN: -mattr=+micromips 2>&1 -filetype=obj > %t.o
# RUN: llvm-objdump %t.o -mattr=+micromips -d | FileCheck %s # RUN: llvm-objdump %t.o -d | FileCheck %s
# Check that fixup data is written in the microMIPS specific little endian # Check that fixup data is written in the microMIPS specific little endian
# byte order. # byte order.
.text .text
.globl main .globl main
.align 2 .align 2
.type main,@function .type main,@function
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test/MC/Mips/mips64extins.s

# RUN: llvm-mc -arch=mips64el -filetype=obj -mcpu=mips64r2 -mabi=n64 %s -o - \ # RUN: llvm-mc -arch=mips64el -filetype=obj -mcpu=mips64r2 -mabi=n64 %s -o - \
# RUN: | llvm-objdump -disassemble -mattr +mips64r2 - | FileCheck %s # RUN: | llvm-objdump -disassemble - | FileCheck %s
dext $2, $4, 5, 10 # CHECK: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10 dext $2, $4, 5, 10 # CHECK: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10
dextu $2, $4, 34, 6 # CHECK: dextu ${{[0-9]+}}, ${{[0-9]+}}, 34, 6 dextu $2, $4, 34, 6 # CHECK: dextu ${{[0-9]+}}, ${{[0-9]+}}, 34, 6
dextm $2, $4, 5, 34 # CHECK: dextm ${{[0-9]+}}, ${{[0-9]+}}, 5, 34 dextm $2, $4, 5, 34 # CHECK: dextm ${{[0-9]+}}, ${{[0-9]+}}, 5, 34
dins $4, $5, 8, 10 # CHECK: dins ${{[0-9]+}}, ${{[0-9]+}}, 8, 10 dins $4, $5, 8, 10 # CHECK: dins ${{[0-9]+}}, ${{[0-9]+}}, 8, 10
dinsm $4, $5, 10, 1 # CHECK: dinsm ${{[0-9]+}}, ${{[0-9]+}}, 10, 1 dinsm $4, $5, 10, 1 # CHECK: dinsm ${{[0-9]+}}, ${{[0-9]+}}, 10, 1
dinsu $4, $5, 40, 13 # CHECK: dinsu ${{[0-9]+}}, ${{[0-9]+}}, 40, 13 dinsu $4, $5, 40, 13 # CHECK: dinsu ${{[0-9]+}}, ${{[0-9]+}}, 40, 13

test/MC/Mips/mips_gprel16.s

// This addresses bug 14456. We were not writing // This addresses bug 14456. We were not writing
// out the addend to the gprel16 relocation. The // out the addend to the gprel16 relocation. The
// addend is stored in the instruction immediate // addend is stored in the instruction immediate
// field. // field.
// RUN: llvm-mc -mcpu=mips32r2 -triple=mipsel-pc-linux -filetype=obj %s -o - \ // RUN: llvm-mc -mcpu=mips32r2 -triple=mipsel-pc-linux -filetype=obj %s -o - \
// RUN: | llvm-objdump -disassemble -mattr +mips32r2 - \ // RUN: | llvm-objdump -disassemble - | FileCheck %s
// RUN: | FileCheck %s
// RUN: llvm-mc -mcpu=mips32r2 -triple=mips-pc-linux -filetype=obj %s -o - \ // RUN: llvm-mc -mcpu=mips32r2 -triple=mips-pc-linux -filetype=obj %s -o - \
// RUN: | llvm-objdump -disassemble -mattr +mips32r2 - \ // RUN: | llvm-objdump -disassemble -mattr +mips32r2 - | FileCheck %s
// RUN: | FileCheck %s
.text .text
.abicalls .abicalls
.option pic0 .option pic0
.section .mdebug.abi32,"",@progbits .section .mdebug.abi32,"",@progbits
.file "/home/espindola/llvm/llvm/test/MC/Mips/mips_gprel16.ll" .file "/home/espindola/llvm/llvm/test/MC/Mips/mips_gprel16.ll"
.text .text
.globl testvar1 .globl testvar1
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test/MC/Mips/set-defined-symbol.s

# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -filetype=obj -o - | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -filetype=obj -o - | \
# RUN: llvm-objdump -d -r -arch=mips - | FileCheck %s # RUN: llvm-objdump -d -r - | FileCheck %s
.global foo .global foo
.weak bar .weak bar
.set bar, b .set bar, b
.set foo, b .set foo, b
.set foo, a .set foo, a
a: a:
nop nop
# CHECK-NOT: a: # CHECK-NOT: a:
# CHECK: foo: # CHECK: foo:
b: b:
nop nop
# CHECK-NOT: b: # CHECK-NOT: b:
# CHECK-NOT: foo: # CHECK-NOT: foo:
# CHECK: bar: # CHECK: bar:

test/Object/Mips/feature.test

RUN: llvm-objdump -disassemble %p/../Inputs/dext-test.elf-mips64r2 | FileCheck %s
RUN: llvm-objdump -disassemble -mattr +mips64r2 %p/../Inputs/dext-test.elf-mips64r2 \ RUN: llvm-objdump -disassemble -mattr +mips64r2 %p/../Inputs/dext-test.elf-mips64r2 \
RUN: | FileCheck %s RUN: | FileCheck %s
CHECK: Disassembly of section .text: CHECK: Disassembly of section .text:
CHECK: dext: CHECK: dext:
CHECK: 0: 08 00 e0 03 jr $ra CHECK: 0: 08 00 e0 03 jr $ra
CHECK: 4: 43 49 82 7c dext $2, $4, 5, 10 CHECK: 4: 43 49 82 7c dext $2, $4, 5, 10
CHECK: dextu: CHECK: dextu:
CHECK: 8: 08 00 e0 03 jr $ra CHECK: 8: 08 00 e0 03 jr $ra
CHECK: c: 83 28 82 7c dext $2, $4, 2, 6 CHECK: c: 83 28 82 7c dext $2, $4, 2, 6
CHECK: dextm: CHECK: dextm:
CHECK: 10: 08 00 e0 03 jr $ra CHECK: 10: 08 00 e0 03 jr $ra
CHECK: 14: 43 09 82 7c dext $2, $4, 5, 2 CHECK: 14: 43 09 82 7c dext $2, $4, 5, 2

test/Object/Mips/objdump-micro-mips.test

RUN: llvm-objdump -d %p/../Inputs/micro-mips.elf-mipsel | FileCheck %s
RUN: llvm-objdump -d -mattr=micromips %p/../Inputs/micro-mips.elf-mipsel \ RUN: llvm-objdump -d -mattr=micromips %p/../Inputs/micro-mips.elf-mipsel \
RUN: | FileCheck %s RUN: | FileCheck %s
CHECK: foo: CHECK: foo:
CHECK-NEXT: 330: bd 33 f8 ff addiu $sp, $sp, -8 CHECK-NEXT: 330: bd 33 f8 ff addiu $sp, $sp, -8
CHECK-NEXT: 334: dd fb 04 00 sw $fp, 4($sp) CHECK-NEXT: 334: dd fb 04 00 sw $fp, 4($sp)
CHECK-NEXT: 338: 1d 00 50 f1 addu $fp, $sp, $zero CHECK-NEXT: 338: 1d 00 50 f1 addu $fp, $sp, $zero
CHECK: bar: CHECK: bar:
CHECK-NEXT: 350: a2 41 02 00 lui $2, 2 CHECK-NEXT: 350: a2 41 02 00 lui $2, 2
CHECK-NEXT: 354: 42 30 8f 80 addiu $2, $2, -32625 CHECK-NEXT: 354: 42 30 8f 80 addiu $2, $2, -32625
CHECK-NEXT: 358: bd 33 e8 ff addiu $sp, $sp, -24 CHECK-NEXT: 358: bd 33 e8 ff addiu $sp, $sp, -24

tools/llvm-objdump/llvm-objdump.cpp

Show First 20 Lines • Show All 925 Lines • ▼ Show 20 Linesstatic bool getHidden(RelocationRef RelRef) {
return false; return false;
} }
static void DisassembleObject(const ObjectFile *Obj, bool InlineRelocs) { static void DisassembleObject(const ObjectFile *Obj, bool InlineRelocs) {
const Target *TheTarget = getTarget(Obj); const Target *TheTarget = getTarget(Obj);
// Package up features to be passed to target/subtarget // Package up features to be passed to target/subtarget
std::string FeaturesStr; SubtargetFeatures Features = Obj->getFeatures();
if (MAttrs.size()) { if (MAttrs.size()) {
SubtargetFeatures Features;
for (unsigned i = 0; i != MAttrs.size(); ++i) for (unsigned i = 0; i != MAttrs.size(); ++i)
rafaelUnsubmitted
Not Done
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Can you delete the MAttrs?

rafael: Can you delete the MAttrs?
dsandersAuthorUnsubmitted
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A small number of ARM, AArch64, and Hexagon tests are still using it but only two of them fail when I stop the option having an effect.

The ones that fail when I remove the option are:

LLVM :: CodeGen/ARM/trap.ll
LLVM :: MC/AArch64/optional-hash.s
LLVM :: MC/Hexagon/v60-misc.s
LLVM :: Object/Mips/feature.test
LLVM :: Object/Mips/objdump-micro-mips.test
LLVM :: tools/llvm-objdump/ARM/macho-mattr-arm.test

of which these two fail when the option exists but has no effect:

LLVM :: CodeGen/ARM/trap.ll
LLVM :: tools/llvm-objdump/ARM/macho-mattr-arm.test

I can update the ones that don't need it, but I'm not sure how to fix the two ARM tests.

dsanders: A small number of ARM, AArch64, and Hexagon tests are still using it but only two of them fail…
Features.AddFeature(MAttrs[i]); Features.AddFeature(MAttrs[i]);
FeaturesStr = Features.getString();
} }
std::unique_ptr<const MCRegisterInfo> MRI( std::unique_ptr<const MCRegisterInfo> MRI(
TheTarget->createMCRegInfo(TripleName)); TheTarget->createMCRegInfo(TripleName));
if (!MRI) if (!MRI)
report_fatal_error("error: no register info for target " + TripleName); report_fatal_error("error: no register info for target " + TripleName);
// Set up disassembler. // Set up disassembler.
std::unique_ptr<const MCAsmInfo> AsmInfo( std::unique_ptr<const MCAsmInfo> AsmInfo(
TheTarget->createMCAsmInfo(*MRI, TripleName)); TheTarget->createMCAsmInfo(*MRI, TripleName));
if (!AsmInfo) if (!AsmInfo)
report_fatal_error("error: no assembly info for target " + TripleName); report_fatal_error("error: no assembly info for target " + TripleName);
std::unique_ptr<const MCSubtargetInfo> STI( std::unique_ptr<const MCSubtargetInfo> STI(
TheTarget->createMCSubtargetInfo(TripleName, MCPU, FeaturesStr)); TheTarget->createMCSubtargetInfo(TripleName, MCPU, Features.getString()));
if (!STI) if (!STI)
report_fatal_error("error: no subtarget info for target " + TripleName); report_fatal_error("error: no subtarget info for target " + TripleName);
std::unique_ptr<const MCInstrInfo> MII(TheTarget->createMCInstrInfo()); std::unique_ptr<const MCInstrInfo> MII(TheTarget->createMCInstrInfo());
if (!MII) if (!MII)
report_fatal_error("error: no instruction info for target " + TripleName); report_fatal_error("error: no instruction info for target " + TripleName);
std::unique_ptr<const MCObjectFileInfo> MOFI(new MCObjectFileInfo); std::unique_ptr<const MCObjectFileInfo> MOFI(new MCObjectFileInfo);
MCContext Ctx(AsmInfo.get(), MRI.get(), MOFI.get()); MCContext Ctx(AsmInfo.get(), MRI.get(), MOFI.get());
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