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Differential D159340

[VectorCombine][NFC][test] Supplement tests of the load-extractelement sequence
Needs ReviewPublic

Authored by benshi001 on Sep 1 2023, 12:48 AM.

Details

Reviewers
spatel
dmgreen
nikic
RKSimon
fhahn
MaskRay
Summary

The newly added tests are all about scalable vector types.

Diff Detail

Revision Contents

PathSize
llvm/
test/
Transforms/
VectorCombine/
AArch64/
129 lines

Diff 555618

llvm/test/Transforms/VectorCombine/AArch64/load-extractelement-scalarization.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=vector-combine -mtriple=arm64-apple-darwinos -S %s | FileCheck --check-prefixes=CHECK,LIMIT-DEFAULT %s ; RUN: opt -passes=vector-combine -mtriple=arm64-apple-darwinos -S %s | FileCheck --check-prefixes=CHECK,LIMIT-DEFAULT %s
; RUN: opt -passes=vector-combine -mtriple=arm64-apple-darwinos -vector-combine-max-scan-instrs=2 -S %s | FileCheck --check-prefixes=CHECK,LIMIT2 %s ; RUN: opt -passes=vector-combine -mtriple=arm64-apple-darwinos -vector-combine-max-scan-instrs=2 -S %s | FileCheck --check-prefixes=CHECK,LIMIT2 %s
define i32 @load_extract_idx_0(ptr %x) { define i32 @load_extract_idx_0(ptr %x) {
; CHECK-LABEL: @load_extract_idx_0( ; CHECK-LABEL: @load_extract_idx_0(
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds <4 x i32>, ptr [[X:%.*]], i32 0, i32 3 ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds <4 x i32>, ptr [[X:%.*]], i32 0, i32 3
; CHECK-NEXT: [[R:%.*]] = load i32, ptr [[TMP1]], align 4 ; CHECK-NEXT: [[R:%.*]] = load i32, ptr [[TMP1]], align 4
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
%lv = load <4 x i32>, ptr %x %lv = load <4 x i32>, ptr %x
%r = extractelement <4 x i32> %lv, i32 3 %r = extractelement <4 x i32> %lv, i32 3
ret i32 %r ret i32 %r
} }
define i32 @vscale_load_extract_idx_0(ptr %x) {
; CHECK-LABEL: @vscale_load_extract_idx_0(
; CHECK-NEXT: [[LV:%.*]] = load <vscale x 4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[LV]], i32 0
; CHECK-NEXT: ret i32 [[R]]
;
%lv = load <vscale x 4 x i32>, ptr %x
%r = extractelement <vscale x 4 x i32> %lv, i32 0
ret i32 %r
}
; If the original load had a smaller alignment than the scalar type, the ; If the original load had a smaller alignment than the scalar type, the
; smaller alignment should be used. ; smaller alignment should be used.
define i32 @load_extract_idx_0_small_alignment(ptr %x) { define i32 @load_extract_idx_0_small_alignment(ptr %x) {
; CHECK-LABEL: @load_extract_idx_0_small_alignment( ; CHECK-LABEL: @load_extract_idx_0_small_alignment(
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds <4 x i32>, ptr [[X:%.*]], i32 0, i32 3 ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds <4 x i32>, ptr [[X:%.*]], i32 0, i32 3
; CHECK-NEXT: [[R:%.*]] = load i32, ptr [[TMP1]], align 2 ; CHECK-NEXT: [[R:%.*]] = load i32, ptr [[TMP1]], align 2
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
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; CHECK-NEXT: [[R:%.*]] = load i32, ptr [[TMP1]], align 8 ; CHECK-NEXT: [[R:%.*]] = load i32, ptr [[TMP1]], align 8
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
%lv = load <4 x i32>, ptr %x %lv = load <4 x i32>, ptr %x
%r = extractelement <4 x i32> %lv, i32 2 %r = extractelement <4 x i32> %lv, i32 2
ret i32 %r ret i32 %r
} }
define i32 @vscale_load_extract_idx_2(ptr %x) {
; CHECK-LABEL: @vscale_load_extract_idx_2(
; CHECK-NEXT: [[LV:%.*]] = load <vscale x 4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[LV]], i32 2
; CHECK-NEXT: ret i32 [[R]]
;
%lv = load <vscale x 4 x i32>, ptr %x
%r = extractelement <vscale x 4 x i32> %lv, i32 2
ret i32 %r
}
define i32 @load_extract_idx_3(ptr %x) { define i32 @load_extract_idx_3(ptr %x) {
; CHECK-LABEL: @load_extract_idx_3( ; CHECK-LABEL: @load_extract_idx_3(
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds <4 x i32>, ptr [[X:%.*]], i32 0, i32 3 ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds <4 x i32>, ptr [[X:%.*]], i32 0, i32 3
; CHECK-NEXT: [[R:%.*]] = load i32, ptr [[TMP1]], align 4 ; CHECK-NEXT: [[R:%.*]] = load i32, ptr [[TMP1]], align 4
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
%lv = load <4 x i32>, ptr %x %lv = load <4 x i32>, ptr %x
%r = extractelement <4 x i32> %lv, i32 3 %r = extractelement <4 x i32> %lv, i32 3
ret i32 %r ret i32 %r
} }
; Out-of-bounds index for extractelement, should not be converted to narrow ; Out-of-bounds index for extractelement, should not be converted to narrow
; load, because it would introduce a dereference of a poison pointer. ; load, because it would introduce a dereference of a poison pointer.
define i32 @load_extract_idx_4(ptr %x) { define i32 @load_extract_idx_4(ptr %x) {
; CHECK-LABEL: @load_extract_idx_4( ; CHECK-LABEL: @load_extract_idx_4(
; CHECK-NEXT: [[LV:%.*]] = load <4 x i32>, ptr [[X:%.*]], align 16 ; CHECK-NEXT: [[LV:%.*]] = load <4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[LV]], i32 4 ; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[LV]], i32 4
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
%lv = load <4 x i32>, ptr %x %lv = load <4 x i32>, ptr %x
%r = extractelement <4 x i32> %lv, i32 4 %r = extractelement <4 x i32> %lv, i32 4
ret i32 %r ret i32 %r
} }
define i32 @vscale_load_extract_idx_4(ptr %x) {
; CHECK-LABEL: @vscale_load_extract_idx_4(
; CHECK-NEXT: [[LV:%.*]] = load <vscale x 4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[LV]], i32 4
; CHECK-NEXT: ret i32 [[R]]
;
%lv = load <vscale x 4 x i32>, ptr %x
%r = extractelement <vscale x 4 x i32> %lv, i32 4
ret i32 %r
}
define i32 @load_extract_idx_var_i64(ptr %x, i64 %idx) { define i32 @load_extract_idx_var_i64(ptr %x, i64 %idx) {
; CHECK-LABEL: @load_extract_idx_var_i64( ; CHECK-LABEL: @load_extract_idx_var_i64(
; CHECK-NEXT: [[LV:%.*]] = load <4 x i32>, ptr [[X:%.*]], align 16 ; CHECK-NEXT: [[LV:%.*]] = load <4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[LV]], i64 [[IDX:%.*]] ; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[LV]], i64 [[IDX:%.*]]
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
%lv = load <4 x i32>, ptr %x %lv = load <4 x i32>, ptr %x
%r = extractelement <4 x i32> %lv, i64 %idx %r = extractelement <4 x i32> %lv, i64 %idx
Show All 16 Linesentry:
%cmp = icmp ult i64 %idx, 4 %cmp = icmp ult i64 %idx, 4
call void @llvm.assume(i1 %cmp) call void @llvm.assume(i1 %cmp)
%lv = load <4 x i32>, ptr %x %lv = load <4 x i32>, ptr %x
call void @maythrow() call void @maythrow()
%r = extractelement <4 x i32> %lv, i64 %idx %r = extractelement <4 x i32> %lv, i64 %idx
ret i32 %r ret i32 %r
} }
define i32 @vscale_load_extract_idx_var_i64_known_valid_by_assume(ptr %x, i64 %idx) {
; CHECK-LABEL: @vscale_load_extract_idx_var_i64_known_valid_by_assume(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IDX:%.*]], 4
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: [[LV:%.*]] = load <vscale x 4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: call void @maythrow()
; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[LV]], i64 [[IDX]]
; CHECK-NEXT: ret i32 [[R]]
;
entry:
%cmp = icmp ult i64 %idx, 4
call void @llvm.assume(i1 %cmp)
%lv = load <vscale x 4 x i32>, ptr %x
call void @maythrow()
%r = extractelement <vscale x 4 x i32> %lv, i64 %idx
ret i32 %r
}
declare i1 @cond() declare i1 @cond()
define i32 @load_extract_idx_var_i64_known_valid_by_assume_in_dominating_block(ptr %x, i64 %idx, i1 %c.1) { define i32 @load_extract_idx_var_i64_known_valid_by_assume_in_dominating_block(ptr %x, i64 %idx, i1 %c.1) {
; CHECK-LABEL: @load_extract_idx_var_i64_known_valid_by_assume_in_dominating_block( ; CHECK-LABEL: @load_extract_idx_var_i64_known_valid_by_assume_in_dominating_block(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IDX:%.*]], 4 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IDX:%.*]], 4
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]]) ; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: br i1 [[C_1:%.*]], label [[LOOP:%.*]], label [[EXIT:%.*]] ; CHECK-NEXT: br i1 [[C_1:%.*]], label [[LOOP:%.*]], label [[EXIT:%.*]]
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entry: entry:
%cmp = icmp ult i64 %idx, 5 %cmp = icmp ult i64 %idx, 5
call void @llvm.assume(i1 %cmp) call void @llvm.assume(i1 %cmp)
%lv = load <4 x i32>, ptr %x %lv = load <4 x i32>, ptr %x
%r = extractelement <4 x i32> %lv, i64 %idx %r = extractelement <4 x i32> %lv, i64 %idx
ret i32 %r ret i32 %r
} }
define i32 @vscale_load_extract_idx_var_i64_not_known_valid_by_assume(ptr %x, i64 %idx) {
; CHECK-LABEL: @vscale_load_extract_idx_var_i64_not_known_valid_by_assume(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IDX:%.*]], 5
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: [[LV:%.*]] = load <vscale x 4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[LV]], i64 [[IDX]]
; CHECK-NEXT: ret i32 [[R]]
;
entry:
%cmp = icmp ult i64 %idx, 5
call void @llvm.assume(i1 %cmp)
%lv = load <vscale x 4 x i32>, ptr %x
%r = extractelement <vscale x 4 x i32> %lv, i64 %idx
ret i32 %r
}
declare void @llvm.assume(i1) declare void @llvm.assume(i1)
define i32 @load_extract_idx_var_i64_known_valid_by_and(ptr %x, i64 %idx) { define i32 @load_extract_idx_var_i64_known_valid_by_and(ptr %x, i64 %idx) {
; CHECK-LABEL: @load_extract_idx_var_i64_known_valid_by_and( ; CHECK-LABEL: @load_extract_idx_var_i64_known_valid_by_and(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[IDX_CLAMPED:%.*]] = and i64 [[IDX:%.*]], 3 ; CHECK-NEXT: [[IDX_CLAMPED:%.*]] = and i64 [[IDX:%.*]], 3
; CHECK-NEXT: [[LV:%.*]] = load <4 x i32>, ptr [[X:%.*]], align 16 ; CHECK-NEXT: [[LV:%.*]] = load <4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[LV]], i64 [[IDX_CLAMPED]] ; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[LV]], i64 [[IDX_CLAMPED]]
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
entry: entry:
%idx.clamped = and i64 %idx, 3 %idx.clamped = and i64 %idx, 3
%lv = load <4 x i32>, ptr %x %lv = load <4 x i32>, ptr %x
%r = extractelement <4 x i32> %lv, i64 %idx.clamped %r = extractelement <4 x i32> %lv, i64 %idx.clamped
ret i32 %r ret i32 %r
} }
define i32 @vscale_load_extract_idx_var_i64_known_valid_by_and(ptr %x, i64 %idx) {
; CHECK-LABEL: @vscale_load_extract_idx_var_i64_known_valid_by_and(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[IDX_CLAMPED:%.*]] = and i64 [[IDX:%.*]], 3
; CHECK-NEXT: [[LV:%.*]] = load <vscale x 4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[LV]], i64 [[IDX_CLAMPED]]
; CHECK-NEXT: ret i32 [[R]]
;
entry:
%idx.clamped = and i64 %idx, 3
%lv = load <vscale x 4 x i32>, ptr %x
%r = extractelement <vscale x 4 x i32> %lv, i64 %idx.clamped
ret i32 %r
}
define i32 @load_extract_idx_var_i64_known_valid_by_and_noundef(ptr %x, i64 noundef %idx) { define i32 @load_extract_idx_var_i64_known_valid_by_and_noundef(ptr %x, i64 noundef %idx) {
; CHECK-LABEL: @load_extract_idx_var_i64_known_valid_by_and_noundef( ; CHECK-LABEL: @load_extract_idx_var_i64_known_valid_by_and_noundef(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[IDX_CLAMPED:%.*]] = and i64 [[IDX:%.*]], 3 ; CHECK-NEXT: [[IDX_CLAMPED:%.*]] = and i64 [[IDX:%.*]], 3
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds <4 x i32>, ptr [[X:%.*]], i32 0, i64 [[IDX_CLAMPED]] ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds <4 x i32>, ptr [[X:%.*]], i32 0, i64 [[IDX_CLAMPED]]
; CHECK-NEXT: [[R:%.*]] = load i32, ptr [[TMP0]], align 4 ; CHECK-NEXT: [[R:%.*]] = load i32, ptr [[TMP0]], align 4
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
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; ;
entry: entry:
%idx.clamped = and i64 %idx, 4 %idx.clamped = and i64 %idx, 4
%lv = load <4 x i32>, ptr %x %lv = load <4 x i32>, ptr %x
%r = extractelement <4 x i32> %lv, i64 %idx.clamped %r = extractelement <4 x i32> %lv, i64 %idx.clamped
ret i32 %r ret i32 %r
} }
define i32 @vscale_load_extract_idx_var_i64_not_known_valid_by_and(ptr %x, i64 %idx) {
; CHECK-LABEL: @vscale_load_extract_idx_var_i64_not_known_valid_by_and(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[IDX_CLAMPED:%.*]] = and i64 [[IDX:%.*]], 4
; CHECK-NEXT: [[LV:%.*]] = load <vscale x 4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[LV]], i64 [[IDX_CLAMPED]]
; CHECK-NEXT: ret i32 [[R]]
;
entry:
%idx.clamped = and i64 %idx, 4
%lv = load <vscale x 4 x i32>, ptr %x
%r = extractelement <vscale x 4 x i32> %lv, i64 %idx.clamped
ret i32 %r
}
define i32 @load_extract_idx_var_i64_known_valid_by_urem(ptr %x, i64 %idx) { define i32 @load_extract_idx_var_i64_known_valid_by_urem(ptr %x, i64 %idx) {
; CHECK-LABEL: @load_extract_idx_var_i64_known_valid_by_urem( ; CHECK-LABEL: @load_extract_idx_var_i64_known_valid_by_urem(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[IDX_CLAMPED:%.*]] = urem i64 [[IDX:%.*]], 4 ; CHECK-NEXT: [[IDX_CLAMPED:%.*]] = urem i64 [[IDX:%.*]], 4
; CHECK-NEXT: [[LV:%.*]] = load <4 x i32>, ptr [[X:%.*]], align 16 ; CHECK-NEXT: [[LV:%.*]] = load <4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[LV]], i64 [[IDX_CLAMPED]] ; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[LV]], i64 [[IDX_CLAMPED]]
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
entry: entry:
%idx.clamped = urem i64 %idx, 4 %idx.clamped = urem i64 %idx, 4
%lv = load <4 x i32>, ptr %x %lv = load <4 x i32>, ptr %x
%r = extractelement <4 x i32> %lv, i64 %idx.clamped %r = extractelement <4 x i32> %lv, i64 %idx.clamped
ret i32 %r ret i32 %r
} }
define i32 @vscale_load_extract_idx_var_i64_known_valid_by_urem(ptr %x, i64 %idx) {
; CHECK-LABEL: @vscale_load_extract_idx_var_i64_known_valid_by_urem(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[IDX_CLAMPED:%.*]] = urem i64 [[IDX:%.*]], 4
; CHECK-NEXT: [[LV:%.*]] = load <vscale x 4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[LV]], i64 [[IDX_CLAMPED]]
; CHECK-NEXT: ret i32 [[R]]
;
entry:
%idx.clamped = urem i64 %idx, 4
%lv = load <vscale x 4 x i32>, ptr %x
%r = extractelement <vscale x 4 x i32> %lv, i64 %idx.clamped
ret i32 %r
}
define i32 @load_extract_idx_var_i64_known_valid_by_urem_noundef(ptr %x, i64 noundef %idx) { define i32 @load_extract_idx_var_i64_known_valid_by_urem_noundef(ptr %x, i64 noundef %idx) {
; CHECK-LABEL: @load_extract_idx_var_i64_known_valid_by_urem_noundef( ; CHECK-LABEL: @load_extract_idx_var_i64_known_valid_by_urem_noundef(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[IDX_CLAMPED:%.*]] = urem i64 [[IDX:%.*]], 4 ; CHECK-NEXT: [[IDX_CLAMPED:%.*]] = urem i64 [[IDX:%.*]], 4
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds <4 x i32>, ptr [[X:%.*]], i32 0, i64 [[IDX_CLAMPED]] ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds <4 x i32>, ptr [[X:%.*]], i32 0, i64 [[IDX_CLAMPED]]
; CHECK-NEXT: [[R:%.*]] = load i32, ptr [[TMP0]], align 4 ; CHECK-NEXT: [[R:%.*]] = load i32, ptr [[TMP0]], align 4
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
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; ;
entry: entry:
%idx.clamped = urem i64 %idx, 5 %idx.clamped = urem i64 %idx, 5
%lv = load <4 x i32>, ptr %x %lv = load <4 x i32>, ptr %x
%r = extractelement <4 x i32> %lv, i64 %idx.clamped %r = extractelement <4 x i32> %lv, i64 %idx.clamped
ret i32 %r ret i32 %r
} }
define i32 @vscale_load_extract_idx_var_i64_not_known_valid_by_urem(ptr %x, i64 %idx) {
; CHECK-LABEL: @vscale_load_extract_idx_var_i64_not_known_valid_by_urem(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[IDX_CLAMPED:%.*]] = urem i64 [[IDX:%.*]], 5
; CHECK-NEXT: [[LV:%.*]] = load <vscale x 4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[LV]], i64 [[IDX_CLAMPED]]
; CHECK-NEXT: ret i32 [[R]]
;
entry:
%idx.clamped = urem i64 %idx, 5
%lv = load <vscale x 4 x i32>, ptr %x
%r = extractelement <vscale x 4 x i32> %lv, i64 %idx.clamped
ret i32 %r
}
define i32 @load_extract_idx_var_i32(ptr %x, i32 %idx) { define i32 @load_extract_idx_var_i32(ptr %x, i32 %idx) {
; CHECK-LABEL: @load_extract_idx_var_i32( ; CHECK-LABEL: @load_extract_idx_var_i32(
; CHECK-NEXT: [[LV:%.*]] = load <4 x i32>, ptr [[X:%.*]], align 16 ; CHECK-NEXT: [[LV:%.*]] = load <4 x i32>, ptr [[X:%.*]], align 16
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[LV]], i32 [[IDX:%.*]] ; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[LV]], i32 [[IDX:%.*]]
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
%lv = load <4 x i32>, ptr %x %lv = load <4 x i32>, ptr %x
%r = extractelement <4 x i32> %lv, i32 %idx %r = extractelement <4 x i32> %lv, i32 %idx
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