[InferAlignment] Implement InferAlignmentPass

[0xdc03]

Summary

This pass aims to infer alignment for instructions as a separate pass,
to reduce redundant work done by InstCombine running multiple times. It
runs late in the pipeline, just before the back-end passes where this
information is most useful.

[nikic]

@efriedma I'd like to have some feedback on whether the direction here makes sense. The premise is that in the middle-end, we don't care all that much about alignment, and the optimizations that do care about it will try to increase alignment in order to succeed (via getOrEnforceKnownAlignment). As such, instead of inferring alignment ~8 times in the optimization pipeline, do it once towards the end of the pipeline. Do you see any inherent problem with that approach?

llvm/lib/Transforms/Scalar/InferAlignment.cpp

28

Drop llvm:: prefix.

[efriedma]

Alignment information is most useful in the backend, yes. But it's also relevant for alias analysis and cost modeling, so there could be some impact to delaying the computation. We might need both an early pass and a late pass. We might not need to do it every instcombine run, though.

Do we want the late run to be after unrolling?

A pointer-specific computePointerAlign() might be faster to compute than computeKnownBits(); I mean, the basic logic is the same, but the KnownBits datastructure is a lot more complicated than an "int".

[nikic]

In D158529#4607917, @efriedma wrote:

Alignment information is most useful in the backend, yes. But it's also relevant for alias analysis and cost modeling, so there could be some impact to delaying the computation. We might need both an early pass and a late pass. We might not need to do it every instcombine run, though.

Hm, where does alias analysis use alignment? I don't remember seeing that anywhere.

Do we want the late run to be after unrolling?

In theory, yes. In practice, computeKnownBits() only looks through phi nodes to a very limited degree, so it doesn't cope with the more complex structure of unrolled code well.

A pointer-specific computePointerAlign() might be faster to compute than computeKnownBits(); I mean, the basic logic is the same, but the KnownBits datastructure is a lot more complicated than an "int".

That sounds plausible. I think if we're going with a separate pass, we might want to (later) switch to using dataflow analysis to infer alignment, rather than recursive queries. I wouldn't want to reimplement all of KnownBits in that way, but for alignment a lot less instructions are relevant (basically just root instructions + gep/select/phi). That would fix the phi problem while possibly being faster overall. And people have been complaining about that phi limitation (the GPU folks in particular, I think?)

[efriedma]

In D158529#4607972, @nikic wrote:

In D158529#4607917, @efriedma wrote:

Alignment information is most useful in the backend, yes. But it's also relevant for alias analysis and cost modeling, so there could be some impact to delaying the computation. We might need both an early pass and a late pass. We might not need to do it every instcombine run, though.

Hm, where does alias analysis use alignment? I don't remember seeing that anywhere.

I think I got confused here. I'm pretty sure the backend alias analysis does use alignment, but maybe IR-level analysis doesn't.

[0xdc03]

• Reorder the patches, merge D158531

[0xdc03]

• Move pipeline tests to the correct place

[0xdc03]

• Make tests better

[0xdc03]

• Make tests betterer
• Rebase on main

[0xdc03]

• Update tests

[0xdc03]

• Update tests

[nikic]

LGTM

llvm/lib/Transforms/Scalar/InferAlignment.cpp

18

I think you don't need this include (it's a LegacyPM thing).

[efriedma]

(See also D134282, where we're discussing inferring alignment for memset/memcpy/memmove.)

[0xdc03]

• Rebase on main
• Run the pass twice

[danilaml]

llvm/lib/Passes/PassBuilderPipelines.cpp

1148

I was wondering why the pass was added after LoopeVectorize pass and not before? Wouldn't LV benefit from knowing that some pointers are better aligned? Or it doesn't care about this at the moment?

[nikic]

llvm/lib/Passes/PassBuilderPipelines.cpp

1148

LV uses getOrEnforceKnownAlignment(), so it shouldn't matter. Did you see any issues relating to this?

(This is true pretty generally -- the passes that care about alignment will do their own inference.)

[danilaml]

llvm/lib/Passes/PassBuilderPipelines.cpp

1148

I haven't seen the issues with pass buidler pipeline, no. I just use custom pipeline and got caught a bit off guard by this change, so I'm now in the process of figuring out where to insert this new pass ;P

[nikic]

llvm/lib/Passes/PassBuilderPipelines.cpp

1148

Okay, in that case the guideline would be to insert it once before and after runtime unrolling, but where exactly probably doesn't matter too much (or at least we haven't found out yet...)

llvm/include/llvm/Transforms/Scalar/InferAlignment.h

+//===- InferAlignment.h -----------------------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// Infer alignment for load, stores and other memory operations based on
+// trailing zero known bits information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_TRANSFORMS_SCALAR_INFERALIGNMENT_H
+#define LLVM_TRANSFORMS_SCALAR_INFERALIGNMENT_H
+
+#include "llvm/IR/PassManager.h"
+
+namespace llvm {
+
+struct InferAlignmentPass : public PassInfoMixin<InferAlignmentPass> {
+  PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+};
+
+} // namespace llvm
+
+#endif // LLVM_TRANSFORMS_SCALAR_INFERALIGNMENT_H

llvm/include/llvm/Transforms/Utils/Local.h

AllocaInst *DemoteRegToStack(Instruction &X,
                              bool VolatileLoads = false,
                              Instruction *AllocaPoint = nullptr);
 
 /// This function takes a virtual register computed by a phi node and replaces
 /// it with a slot in the stack frame, allocated via alloca. The phi node is
 /// deleted and it returns the pointer to the alloca inserted.
 AllocaInst *DemotePHIToStack(PHINode *P, Instruction *AllocaPoint = nullptr);
 
+/// If the specified pointer points to an object that we control, try to modify
+/// the object's alignment to PrefAlign. Returns a minimum known alignment of
+/// the value after the operation, which may be lower than PrefAlign.
+///
+/// Increating value alignment isn't often possible though. If alignment is
+/// important, a more reliable approach is to simply align all global variables
+/// and allocation instructions to their preferred alignment from the beginning.
+Align tryEnforceAlignment(Value *V, Align PrefAlign, const DataLayout &DL);
+
 /// Try to ensure that the alignment of \p V is at least \p PrefAlign bytes. If
 /// the owning object can be modified and has an alignment less than \p
 /// PrefAlign, it will be increased and \p PrefAlign returned. If the alignment
 /// cannot be increased, the known alignment of the value is returned.
 ///
 /// It is not always possible to modify the alignment of the underlying object,
 /// so if alignment is important, a more reliable approach is to simply align
 /// all global variables and allocation instructions to their preferred

llvm/lib/Passes/PassBuilder.cpp

 #include "llvm/Transforms/Scalar/FlattenCFG.h"
 #include "llvm/Transforms/Scalar/Float2Int.h"
 #include "llvm/Transforms/Scalar/GVN.h"
 #include "llvm/Transforms/Scalar/GuardWidening.h"
 #include "llvm/Transforms/Scalar/IVUsersPrinter.h"
 #include "llvm/Transforms/Scalar/IndVarSimplify.h"
 #include "llvm/Transforms/Scalar/InductiveRangeCheckElimination.h"
 #include "llvm/Transforms/Scalar/InferAddressSpaces.h"
+#include "llvm/Transforms/Scalar/InferAlignment.h"
 #include "llvm/Transforms/Scalar/InstSimplifyPass.h"
 #include "llvm/Transforms/Scalar/JumpThreading.h"
 #include "llvm/Transforms/Scalar/LICM.h"
 #include "llvm/Transforms/Scalar/LoopAccessAnalysisPrinter.h"
 #include "llvm/Transforms/Scalar/LoopBoundSplit.h"
 #include "llvm/Transforms/Scalar/LoopDataPrefetch.h"
 #include "llvm/Transforms/Scalar/LoopDeletion.h"
 #include "llvm/Transforms/Scalar/LoopDistribute.h"

llvm/lib/Passes/PassBuilderPipelines.cpp

 #include "llvm/Transforms/Scalar/CorrelatedValuePropagation.h"
 #include "llvm/Transforms/Scalar/DFAJumpThreading.h"
 #include "llvm/Transforms/Scalar/DeadStoreElimination.h"
 #include "llvm/Transforms/Scalar/DivRemPairs.h"
 #include "llvm/Transforms/Scalar/EarlyCSE.h"
 #include "llvm/Transforms/Scalar/Float2Int.h"
 #include "llvm/Transforms/Scalar/GVN.h"
 #include "llvm/Transforms/Scalar/IndVarSimplify.h"
+#include "llvm/Transforms/Scalar/InferAlignment.h"
 #include "llvm/Transforms/Scalar/InstSimplifyPass.h"
 #include "llvm/Transforms/Scalar/JumpThreading.h"
 #include "llvm/Transforms/Scalar/LICM.h"
 #include "llvm/Transforms/Scalar/LoopDeletion.h"
 #include "llvm/Transforms/Scalar/LoopDistribute.h"
 #include "llvm/Transforms/Scalar/LoopFlatten.h"
 #include "llvm/Transforms/Scalar/LoopIdiomRecognize.h"
 #include "llvm/Transforms/Scalar/LoopInstSimplify.h"
cl::values(clEnumValN(AttributorRunOption::ALL, "all",
                           "enable call graph SCC attributor runs"),
                clEnumValN(AttributorRunOption::NONE, "none",
                           "disable attributor runs")));
 
 cl::opt<bool> EnableMemProfContextDisambiguation(
     "enable-memprof-context-disambiguation", cl::init(false), cl::Hidden,
     cl::ZeroOrMore, cl::desc("Enable MemProf context disambiguation"));
 
+cl::opt<bool> EnableInferAlignmentPass(
+    "enable-infer-alignment-pass", cl::init(false), cl::Hidden, cl::ZeroOrMore,
+    cl::desc("Enable the InferAlignment pass, disabling alignment inference in "
+             "InstCombine"));
+
 PipelineTuningOptions::PipelineTuningOptions() {
   LoopInterleaving = true;
   LoopVectorization = true;
   SLPVectorization = false;
   LoopUnrolling = true;
   ForgetAllSCEVInLoopUnroll = ForgetSCEVInLoopUnroll;
   LicmMssaOptCap = SetLicmMssaOptCap;
   LicmMssaNoAccForPromotionCap = SetLicmMssaNoAccForPromotionCap;

 }
 
 /// TODO: Should LTO cause any differences to this set of passes?
 void PassBuilder::addVectorPasses(OptimizationLevel Level,
                                   FunctionPassManager &FPM, bool IsFullLTO) {
   FPM.addPass(LoopVectorizePass(
       LoopVectorizeOptions(!PTO.LoopInterleaving, !PTO.LoopVectorization)));
 
+  if (EnableInferAlignmentPass)
+    FPM.addPass(InferAlignmentPass());
   if (IsFullLTO) {
     // The vectorizer may have significantly shortened a loop body; unroll
     // again. Unroll small loops to hide loop backedge latency and saturate any
     // parallel execution resources of an out-of-order processor. We also then
     // need to clean up redundancies and loop invariant code.
     // FIXME: It would be really good to use a loop-integrated instruction
     // combiner for cleanup here so that the unrolling and LICM can be pipelined
     // across the loop nests.

llvm/lib/Passes/PassRegistry.def

 FUNCTION_PASS("view-post-dom-only", PostDomOnlyViewer())
 FUNCTION_PASS("fix-irreducible", FixIrreduciblePass())
 FUNCTION_PASS("flattencfg", FlattenCFGPass())
 FUNCTION_PASS("make-guards-explicit", MakeGuardsExplicitPass())
 FUNCTION_PASS("gvn-hoist", GVNHoistPass())
 FUNCTION_PASS("gvn-sink", GVNSinkPass())
 FUNCTION_PASS("helloworld", HelloWorldPass())
 FUNCTION_PASS("infer-address-spaces", InferAddressSpacesPass())
+FUNCTION_PASS("infer-alignment", InferAlignmentPass())
 FUNCTION_PASS("instcount", InstCountPass())
 FUNCTION_PASS("instsimplify", InstSimplifyPass())
 FUNCTION_PASS("invalidate<all>", InvalidateAllAnalysesPass())
 FUNCTION_PASS("irce", IRCEPass())
 FUNCTION_PASS("float2int", Float2IntPass())
 FUNCTION_PASS("no-op-function", NoOpFunctionPass())
 FUNCTION_PASS("libcalls-shrinkwrap", LibCallsShrinkWrapPass())
 FUNCTION_PASS("lint", LintPass())

llvm/lib/Transforms/Scalar/CMakeLists.txt

add_llvm_component_library(LLVMScalarOpts
   GuardWidening.cpp
   GVN.cpp
   GVNHoist.cpp
   GVNSink.cpp
   IVUsersPrinter.cpp
   InductiveRangeCheckElimination.cpp
   IndVarSimplify.cpp
   InferAddressSpaces.cpp
+  InferAlignment.cpp
   InstSimplifyPass.cpp
   JumpThreading.cpp
   LICM.cpp
   LoopAccessAnalysisPrinter.cpp
   LoopBoundSplit.cpp
   LoopSink.cpp
   LoopDeletion.cpp
   LoopDataPrefetch.cpp

llvm/lib/Transforms/Scalar/InferAlignment.cpp

+//===- InferAlignment.cpp -------------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// Infer alignment for load, stores and other memory operations based on
+// trailing zero known bits information.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/Transforms/Scalar/InferAlignment.h"
+#include "llvm/Analysis/AssumptionCache.h"
+#include "llvm/Analysis/ValueTracking.h"
+#include "llvm/IR/Instructions.h"
+#include "llvm/InitializePasses.h"
+#include "llvm/Support/KnownBits.h"
+#include "llvm/Transforms/Scalar.h"
+#include "llvm/Transforms/Utils/Local.h"
+
+using namespace llvm;
+
+static bool tryToImproveAlign(
+    const DataLayout &DL, Instruction *I,
+    function_ref<Align(Value *PtrOp, Align OldAlign, Align PrefAlign)> Fn) {
+  if (auto *LI = dyn_cast<LoadInst>(I)) {
+    Value *PtrOp = LI->getPointerOperand();
+    Align OldAlign = LI->getAlign();
+    Align NewAlign = Fn(PtrOp, OldAlign, DL.getPrefTypeAlign(LI->getType()));
+    if (NewAlign > OldAlign) {
+      LI->setAlignment(NewAlign);
+      return true;
+    }
+  } else if (auto *SI = dyn_cast<StoreInst>(I)) {
+    Value *PtrOp = SI->getPointerOperand();
+    Value *ValOp = SI->getValueOperand();
+    Align OldAlign = SI->getAlign();
+    Align NewAlign = Fn(PtrOp, OldAlign, DL.getPrefTypeAlign(ValOp->getType()));
+    if (NewAlign > OldAlign) {
+      SI->setAlignment(NewAlign);
+      return true;
+    }
+  }
+  // TODO: Also handle memory intrinsics.
+  return false;
+}
+
+bool inferAlignment(Function &F, AssumptionCache &AC, DominatorTree &DT) {
+  const DataLayout &DL = F.getParent()->getDataLayout();
+  bool Changed = false;
+
+  // Enforce preferred type alignment if possible. We do this as a separate
+  // pass first, because it may improve the alignments we infer below.
+  for (BasicBlock &BB : F) {
+    for (Instruction &I : BB) {
+      Changed |= tryToImproveAlign(
+          DL, &I, [&](Value *PtrOp, Align OldAlign, Align PrefAlign) {
+            if (PrefAlign > OldAlign)
+              return std::max(OldAlign,
+                              tryEnforceAlignment(PtrOp, PrefAlign, DL));
+            return OldAlign;
+          });
+    }
+  }
+
+  // Compute alignment from known bits.
+  for (BasicBlock &BB : F) {
+    for (Instruction &I : BB) {
+      Changed |= tryToImproveAlign(
+          DL, &I, [&](Value *PtrOp, Align OldAlign, Align PrefAlign) {
+            KnownBits Known = computeKnownBits(PtrOp, DL, 0, &AC, &I, &DT);
+            unsigned TrailZ = std::min(Known.countMinTrailingZeros(),
+                                       +Value::MaxAlignmentExponent);
+            return Align(1ull << std::min(Known.getBitWidth() - 1, TrailZ));
+          });
+    }
+  }
+
+  return Changed;
+}
+
+PreservedAnalyses InferAlignmentPass::run(Function &F,
+                                          FunctionAnalysisManager &AM) {
+  AssumptionCache &AC = AM.getResult<AssumptionAnalysis>(F);
+  DominatorTree &DT = AM.getResult<DominatorTreeAnalysis>(F);
+  inferAlignment(F, AC, DT);
+  // Changes to alignment shouldn't invalidated analyses.
+  return PreservedAnalyses::all();
+}

llvm/lib/Transforms/Utils/Local.cpp

 #ifndef NDEBUG
       !PHICSEDebugHash &&
 #endif
       hasNItemsOrLess(BB->phis(), PHICSENumPHISmallSize))
     return EliminateDuplicatePHINodesNaiveImpl(BB);
   return EliminateDuplicatePHINodesSetBasedImpl(BB);
 }
 
-/// If the specified pointer points to an object that we control, try to modify
-/// the object's alignment to PrefAlign. Returns a minimum known alignment of
-/// the value after the operation, which may be lower than PrefAlign.
-///
-/// Increating value alignment isn't often possible though. If alignment is
-/// important, a more reliable approach is to simply align all global variables
-/// and allocation instructions to their preferred alignment from the beginning.
-static Align tryEnforceAlignment(Value *V, Align PrefAlign,
-                                 const DataLayout &DL) {
+Align llvm::tryEnforceAlignment(Value *V, Align PrefAlign,
   V = V->stripPointerCasts();
 
   if (AllocaInst *AI = dyn_cast<AllocaInst>(V)) {
     // TODO: Ideally, this function would not be called if PrefAlign is smaller
     // than the current alignment, as the known bits calculation should have
     // already taken it into account. However, this is not always the case,
     // as computeKnownBits() has a depth limit, while stripPointerCasts()
     // doesn't.

llvm/test/Transforms/InferAlignment/alloca.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt < %s -passes=no-op-function -S | FileCheck %s
+; RUN: opt < %s -passes=infer-alignment -S | FileCheck %s
 
 ; ------------------------------------------------------------------------------
 ; Scalar type
 ; ------------------------------------------------------------------------------
 
 define void @alloca_local(i8 %x, i32 %y) {
 ; CHECK-LABEL: define void @alloca_local
 ; CHECK-SAME: (i8 [[X:%.*]], i32 [[Y:%.*]]) {
-; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i32, align 1
-; CHECK-NEXT:    [[LOAD_I8:%.*]] = load i8, ptr [[ALLOCA]], align 1
-; CHECK-NEXT:    [[LOAD_I32:%.*]] = load i32, ptr [[ALLOCA]], align 1
-; CHECK-NEXT:    store i8 [[X]], ptr [[ALLOCA]], align 1
-; CHECK-NEXT:    store i32 [[Y]], ptr [[ALLOCA]], align 1
+; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i32, align 4
+; CHECK-NEXT:    [[LOAD_I8:%.*]] = load i8, ptr [[ALLOCA]], align 4
+; CHECK-NEXT:    [[LOAD_I32:%.*]] = load i32, ptr [[ALLOCA]], align 4
+; CHECK-NEXT:    store i8 [[X]], ptr [[ALLOCA]], align 4
+; CHECK-NEXT:    store i32 [[Y]], ptr [[ALLOCA]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %alloca = alloca i32, align 1
 
   %load.i8 = load i8, ptr %alloca, align 1
   %load.i32 = load i32, ptr %alloca, align 1
 
   store i8 %x, ptr %alloca, align 1

 %struct.pair = type { { i32, i32 }, { i32, i32 } }
 
 define void @alloca_struct(i32 %x) {
 ; CHECK-LABEL: define void @alloca_struct
 ; CHECK-SAME: (i32 [[X:%.*]]) {
 ; CHECK-NEXT:    [[ALLOCA_STRUCT:%.*]] = alloca [[STRUCT_PAIR:%.*]], align 8
 ; CHECK-NEXT:    [[GEP_0:%.*]] = getelementptr [[STRUCT_PAIR]], ptr [[ALLOCA_STRUCT]], i64 0, i32 1
 ; CHECK-NEXT:    [[GEP_1:%.*]] = getelementptr { i32, i32 }, ptr [[GEP_0]], i64 0, i32 1
-; CHECK-NEXT:    [[LOAD_2:%.*]] = load i32, ptr [[GEP_0]], align 1
-; CHECK-NEXT:    store i32 0, ptr [[GEP_0]], align 1
-; CHECK-NEXT:    [[LOAD_1:%.*]] = load i32, ptr [[GEP_1]], align 1
-; CHECK-NEXT:    store i32 0, ptr [[GEP_1]], align 1
+; CHECK-NEXT:    [[LOAD_2:%.*]] = load i32, ptr [[GEP_0]], align 8
+; CHECK-NEXT:    store i32 0, ptr [[GEP_0]], align 8
+; CHECK-NEXT:    [[LOAD_1:%.*]] = load i32, ptr [[GEP_1]], align 4
+; CHECK-NEXT:    store i32 0, ptr [[GEP_1]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %alloca.struct = alloca %struct.pair
 
   %gep.0 = getelementptr %struct.pair, ptr %alloca.struct, i64 0, i32 1
   %gep.1 = getelementptr { i32, i32 }, ptr %gep.0, i64 0, i32 1
 
   %load.2 = load i32, ptr %gep.0, align 1
   store i32 0, ptr %gep.0, align 1
 
   %load.1 = load i32, ptr %gep.1, align 1
   store i32 0, ptr %gep.1, align 1
 
   ret void
 }

llvm/test/Transforms/InferAlignment/atomic.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt -S < %s -passes=no-op-function | FileCheck %s
+; RUN: opt -S < %s -passes=infer-alignment | FileCheck %s
 
 ; ------------------------------------------------------------------------------
 ; load/store of null
 ; ------------------------------------------------------------------------------
 
 define void @load_null() {
 ; CHECK-LABEL: define void @load_null() {
-; CHECK-NEXT:    [[X_0:%.*]] = load atomic i32, ptr null unordered, align 4
-; CHECK-NEXT:    [[X_1:%.*]] = load atomic i32, ptr null monotonic, align 4
-; CHECK-NEXT:    [[X_2:%.*]] = load atomic i32, ptr null seq_cst, align 4
+; CHECK-NEXT:    [[X_0:%.*]] = load atomic i32, ptr null unordered, align 4294967296
+; CHECK-NEXT:    [[X_1:%.*]] = load atomic i32, ptr null monotonic, align 4294967296
+; CHECK-NEXT:    [[X_2:%.*]] = load atomic i32, ptr null seq_cst, align 4294967296
 ; CHECK-NEXT:    ret void
 ;
   %x.0 = load atomic i32, ptr null unordered, align 4
   %x.1 = load atomic i32, ptr null monotonic, align 4
   %x.2 = load atomic i32, ptr null seq_cst, align 4
   ret void
 }
 
 define void @store_null() {
 ; CHECK-LABEL: define void @store_null() {
-; CHECK-NEXT:    store atomic i32 0, ptr null unordered, align 4
-; CHECK-NEXT:    store atomic i32 0, ptr null monotonic, align 4
-; CHECK-NEXT:    store atomic i32 0, ptr null seq_cst, align 4
+; CHECK-NEXT:    store atomic i32 0, ptr null unordered, align 4294967296
+; CHECK-NEXT:    store atomic i32 0, ptr null monotonic, align 4294967296
+; CHECK-NEXT:    store atomic i32 0, ptr null seq_cst, align 4294967296
 ; CHECK-NEXT:    ret void
 ;
   store atomic i32 0, ptr null unordered, align 4
   store atomic i32 0, ptr null monotonic, align 4
   store atomic i32 0, ptr null seq_cst, align 4
   ret void
 }
 
 ; ------------------------------------------------------------------------------
 ; load/store of global
 ; ------------------------------------------------------------------------------
 @c = global i64 42
 
 define void @load_nonnull() {
 ; CHECK-LABEL: define void @load_nonnull() {
-; CHECK-NEXT:    [[X_0:%.*]] = load atomic i32, ptr @c unordered, align 4
-; CHECK-NEXT:    [[X_1:%.*]] = load atomic i32, ptr @c monotonic, align 4
-; CHECK-NEXT:    [[X_2:%.*]] = load atomic i32, ptr @c seq_cst, align 4
+; CHECK-NEXT:    [[X_0:%.*]] = load atomic i32, ptr @c unordered, align 8
+; CHECK-NEXT:    [[X_1:%.*]] = load atomic i32, ptr @c monotonic, align 8
+; CHECK-NEXT:    [[X_2:%.*]] = load atomic i32, ptr @c seq_cst, align 8
 ; CHECK-NEXT:    ret void
 ;
   %x.0 = load atomic i32, ptr @c unordered, align 4
   %x.1 = load atomic i32, ptr @c monotonic, align 4
   %x.2 = load atomic i32, ptr @c seq_cst, align 4
   ret void
 }
 
 define void @store_nonnull() {
 ; CHECK-LABEL: define void @store_nonnull() {
-; CHECK-NEXT:    store atomic i32 0, ptr @c unordered, align 4
-; CHECK-NEXT:    store atomic i32 0, ptr @c monotonic, align 4
-; CHECK-NEXT:    store atomic i32 0, ptr @c seq_cst, align 4
+; CHECK-NEXT:    store atomic i32 0, ptr @c unordered, align 8
+; CHECK-NEXT:    store atomic i32 0, ptr @c monotonic, align 8
+; CHECK-NEXT:    store atomic i32 0, ptr @c seq_cst, align 8
 ; CHECK-NEXT:    ret void
 ;
   store atomic i32 0, ptr @c unordered, align 4
   store atomic i32 0, ptr @c monotonic, align 4
   store atomic i32 0, ptr @c seq_cst, align 4
   ret void
 }
 
 ; ------------------------------------------------------------------------------
 ; load/store of alloca
 ; ------------------------------------------------------------------------------
 
 define void @load_alloca() {
 ; CHECK-LABEL: define void @load_alloca() {
 ; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i32, align 4
-; CHECK-NEXT:    [[X_0:%.*]] = load atomic i32, ptr [[ALLOCA]] unordered, align 1
-; CHECK-NEXT:    [[X_1:%.*]] = load atomic i32, ptr [[ALLOCA]] monotonic, align 1
-; CHECK-NEXT:    [[X_2:%.*]] = load atomic i32, ptr [[ALLOCA]] seq_cst, align 1
+; CHECK-NEXT:    [[X_0:%.*]] = load atomic i32, ptr [[ALLOCA]] unordered, align 4
+; CHECK-NEXT:    [[X_1:%.*]] = load atomic i32, ptr [[ALLOCA]] monotonic, align 4
+; CHECK-NEXT:    [[X_2:%.*]] = load atomic i32, ptr [[ALLOCA]] seq_cst, align 4
 ; CHECK-NEXT:    ret void
 ;
   %alloca = alloca i32
   %x.0 = load atomic i32, ptr %alloca unordered, align 1
   %x.1 = load atomic i32, ptr %alloca monotonic, align 1
   %x.2 = load atomic i32, ptr %alloca seq_cst, align 1
   ret void
 }
 
 define void @store_alloca() {
 ; CHECK-LABEL: define void @store_alloca() {
 ; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i32, align 4
-; CHECK-NEXT:    store atomic i32 0, ptr [[ALLOCA]] unordered, align 1
-; CHECK-NEXT:    store atomic i32 0, ptr [[ALLOCA]] monotonic, align 1
-; CHECK-NEXT:    store atomic i32 0, ptr [[ALLOCA]] seq_cst, align 1
+; CHECK-NEXT:    store atomic i32 0, ptr [[ALLOCA]] unordered, align 4
+; CHECK-NEXT:    store atomic i32 0, ptr [[ALLOCA]] monotonic, align 4
+; CHECK-NEXT:    store atomic i32 0, ptr [[ALLOCA]] seq_cst, align 4
 ; CHECK-NEXT:    ret void
 ;
   %alloca = alloca i32
   store atomic i32 0, ptr %alloca unordered, align 1
   store atomic i32 0, ptr %alloca monotonic, align 1
   store atomic i32 0, ptr %alloca seq_cst, align 1
   ret void
 }

llvm/test/Transforms/InferAlignment/attributes.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt < %s -passes=no-op-function -S | FileCheck %s
+; RUN: opt < %s -passes=infer-alignment -S | FileCheck %s
 
 define void @attribute(ptr align 32 %a) {
 ; CHECK-LABEL: define void @attribute
 ; CHECK-SAME: (ptr align 32 [[A:%.*]]) {
-; CHECK-NEXT:    [[LOAD:%.*]] = load i32, ptr [[A]], align 1
-; CHECK-NEXT:    store i32 123, ptr [[A]], align 1
+; CHECK-NEXT:    [[LOAD:%.*]] = load i32, ptr [[A]], align 32
+; CHECK-NEXT:    store i32 123, ptr [[A]], align 32
 ; CHECK-NEXT:    ret void
 ;
   %load = load i32, ptr %a, align 1
   store i32 123, ptr %a, align 1
   ret void
 }
 
 define void @attribute_through_call(ptr align 32 %a) {
 ; CHECK-LABEL: define void @attribute_through_call
 ; CHECK-SAME: (ptr align 32 [[A:%.*]]) {
 ; CHECK-NEXT:    [[RES:%.*]] = call ptr @call(ptr [[A]])
-; CHECK-NEXT:    [[LOAD:%.*]] = load i32, ptr [[RES]], align 1
-; CHECK-NEXT:    store i32 123, ptr [[RES]], align 1
+; CHECK-NEXT:    [[LOAD:%.*]] = load i32, ptr [[RES]], align 32
+; CHECK-NEXT:    store i32 123, ptr [[RES]], align 32
 ; CHECK-NEXT:    ret void
 ;
   %res = call ptr @call(ptr %a)
   %load = load i32, ptr %res, align 1
   store i32 123, ptr %res, align 1
   ret void
 }
 
 define void @attribute_return_value(ptr %a) {
 ; CHECK-LABEL: define void @attribute_return_value
 ; CHECK-SAME: (ptr [[A:%.*]]) {
 ; CHECK-NEXT:    [[RES:%.*]] = call align 32 ptr @call(ptr [[A]])
-; CHECK-NEXT:    [[LOAD:%.*]] = load i32, ptr [[RES]], align 1
-; CHECK-NEXT:    store i32 123, ptr [[RES]], align 1
+; CHECK-NEXT:    [[LOAD:%.*]] = load i32, ptr [[RES]], align 32
+; CHECK-NEXT:    store i32 123, ptr [[RES]], align 32
 ; CHECK-NEXT:    ret void
 ;
   %res = call align 32 ptr @call(ptr %a)
   %load = load i32, ptr %res, align 1
   store i32 123, ptr %res, align 1
   ret void
 }
 
 declare ptr @call(ptr returned)

llvm/test/Transforms/InferAlignment/gep-2d.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt < %s -passes=no-op-function -S | FileCheck %s
+; RUN: opt < %s -passes=infer-alignment -S | FileCheck %s
 
 ; A multi-dimensional array in a nested loop.inner doing vector stores that
 ; aren't yet aligned. InferAlignment can understand the addressing in the
 ; Nice case to prove 16 byte alignment. In the Awkward case, the inner
 ; array dimension is not even, so the stores to it won't always be aligned.
 ;
 ; InferAlignment should prove alignment in exactly one of the two cases.
 
 @Nice    = global [1001 x [20000 x double]] zeroinitializer, align 32
 @Awkward = global [1001 x [20001 x double]] zeroinitializer, align 32
 
 define void @nested_loop() {
 ; CHECK-LABEL: define void @nested_loop() {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[LOOP_OUTER:%.*]]
 ; CHECK:       loop.outer:
 ; CHECK-NEXT:    [[I:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_OUTER_TAIL:%.*]] ]
 ; CHECK-NEXT:    br label [[LOOP_INNER:%.*]]
 ; CHECK:       loop.inner:
 ; CHECK-NEXT:    [[J:%.*]] = phi i64 [ 0, [[LOOP_OUTER]] ], [ [[J_NEXT:%.*]], [[LOOP_INNER_TAIL:%.*]] ]
 ; CHECK-NEXT:    [[GEP_1:%.*]] = getelementptr [1001 x [20000 x double]], ptr @Nice, i64 0, i64 [[I]], i64 [[J]]
-; CHECK-NEXT:    store <2 x double> zeroinitializer, ptr [[GEP_1]], align 8
-; CHECK-NEXT:    [[LOAD_1:%.*]] = load <2 x double>, ptr [[GEP_1]], align 8
+; CHECK-NEXT:    store <2 x double> zeroinitializer, ptr [[GEP_1]], align 16
+; CHECK-NEXT:    [[LOAD_1:%.*]] = load <2 x double>, ptr [[GEP_1]], align 16
 ; CHECK-NEXT:    [[GEP_2:%.*]] = getelementptr [1001 x [20001 x double]], ptr @Awkward, i64 0, i64 [[I]], i64 [[J]]
 ; CHECK-NEXT:    store <2 x double> zeroinitializer, ptr [[GEP_2]], align 8
 ; CHECK-NEXT:    [[LOAD_2:%.*]] = load <2 x double>, ptr [[GEP_2]], align 8
 ; CHECK-NEXT:    br label [[LOOP_INNER_TAIL]]
 ; CHECK:       loop.inner.tail:
 ; CHECK-NEXT:    [[J_NEXT]] = add i64 [[J]], 2
 ; CHECK-NEXT:    [[J_CMP:%.*]] = icmp eq i64 [[J_NEXT]], 556
 ; CHECK-NEXT:    br i1 [[J_CMP]], label [[LOOP_OUTER_TAIL]], label [[LOOP_INNER]]

llvm/test/Transforms/InferAlignment/gep-array.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt -passes=no-op-function -S < %s | FileCheck %s
+; RUN: opt -passes=infer-alignment -S < %s | FileCheck %s
 
 ; ------------------------------------------------------------------------------
 ; Array of pair
 ; ------------------------------------------------------------------------------
 
 ; Check that we improve the alignment information.
 ; The base pointer is 16-byte aligned and we access the field at offsets of 8
 ; bytes.
 ; Every element in the @array.simple array is 16-byte aligned so any access from
 ; the following gep is 8-byte aligned.
 
 %pair.simple = type { ptr, i32 }
 @array.simple = global [4 x %pair.simple] zeroinitializer, align 16
 
 define void @simple_pair(i64 %idx) {
 ; CHECK-LABEL: define void @simple_pair
 ; CHECK-SAME: (i64 [[IDX:%.*]]) {
 ; CHECK-NEXT:    [[GEP:%.*]] = getelementptr inbounds [4 x %pair.simple], ptr @array.simple, i64 0, i64 [[IDX]], i32 1
-; CHECK-NEXT:    [[RES:%.*]] = load i32, ptr [[GEP]], align 1
-; CHECK-NEXT:    store i32 0, ptr [[GEP]], align 1
+; CHECK-NEXT:    [[RES:%.*]] = load i32, ptr [[GEP]], align 8
+; CHECK-NEXT:    store i32 0, ptr [[GEP]], align 8
 ; CHECK-NEXT:    ret void
 ;
   %gep = getelementptr inbounds [4 x %pair.simple], ptr @array.simple, i64 0, i64 %idx, i32 1
 
   %res = load i32, ptr %gep, align 1
   store i32 0, ptr %gep, align 1
 
   ret void
 }
 
 ; ------------------------------------------------------------------------------
 ; Array of pair of arrays
 ; ------------------------------------------------------------------------------
 
 %pair.array = type { [3 x i32], [3 x i32] }
 @array.array = internal global [3 x %pair.array] zeroinitializer
 
 define void @load_nested() {
 ; CHECK-LABEL: define void @load_nested() {
-; CHECK-NEXT:    [[X_0:%.*]] = load i32, ptr @array.array, align 4
+; CHECK-NEXT:    [[X_0:%.*]] = load i32, ptr @array.array, align 16
 ; CHECK-NEXT:    [[X_1:%.*]] = load i32, ptr getelementptr inbounds ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 1), align 4
-; CHECK-NEXT:    [[X_2:%.*]] = load i32, ptr getelementptr inbounds ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 2), align 4
+; CHECK-NEXT:    [[X_2:%.*]] = load i32, ptr getelementptr inbounds ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 2), align 8
 ; CHECK-NEXT:    [[X_3:%.*]] = load i32, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 3), align 4
-; CHECK-NEXT:    [[X_4:%.*]] = load i32, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 4), align 4
+; CHECK-NEXT:    [[X_4:%.*]] = load i32, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 4), align 16
 ; CHECK-NEXT:    ret void
 ;
   %x.0 =  load i32, ptr @array.array, align 4
   %x.1 =  load i32, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 1), align 4
   %x.2 =  load i32, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 2), align 4
   %x.3 =  load i32, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 3), align 4
   %x.4 =  load i32, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 4), align 4
   ret void
 }
 
 define void @store_nested() {
 ; CHECK-LABEL: define void @store_nested() {
-; CHECK-NEXT:    store i32 1, ptr @array.array, align 4
+; CHECK-NEXT:    store i32 1, ptr @array.array, align 16
 ; CHECK-NEXT:    store i32 1, ptr getelementptr inbounds ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 1), align 4
-; CHECK-NEXT:    store i32 1, ptr getelementptr inbounds ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 2), align 4
+; CHECK-NEXT:    store i32 1, ptr getelementptr inbounds ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 2), align 8
 ; CHECK-NEXT:    store i32 1, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 3), align 4
-; CHECK-NEXT:    store i32 1, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 4), align 4
+; CHECK-NEXT:    store i32 1, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 4), align 16
 ; CHECK-NEXT:    ret void
 ;
   store i32 1, ptr @array.array, align 4
   store i32 1, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 1), align 4
   store i32 1, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 2), align 4
   store i32 1, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 3), align 4
   store i32 1, ptr getelementptr ([3 x %pair.array], ptr @array.array, i64 0, i64 0, i32 0, i64 4), align 4
   ret void
 }

llvm/test/Transforms/InferAlignment/irregular-size.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt < %s -passes=no-op-function -S | FileCheck %s
+; RUN: opt < %s -passes=infer-alignment -S | FileCheck %s
 
 define void @non_pow2_size(i177 %X) {
 ; CHECK-LABEL: define void @non_pow2_size
 ; CHECK-SAME: (i177 [[X:%.*]]) {
-; CHECK-NEXT:    [[A:%.*]] = alloca i177, align 1
-; CHECK-NEXT:    [[L1:%.*]] = load i177, ptr [[A]], align 1
-; CHECK-NEXT:    store i177 [[X]], ptr [[A]], align 1
+; CHECK-NEXT:    [[A:%.*]] = alloca i177, align 8
+; CHECK-NEXT:    [[L1:%.*]] = load i177, ptr [[A]], align 8
+; CHECK-NEXT:    store i177 [[X]], ptr [[A]], align 8
 ; CHECK-NEXT:    ret void
 ;
   %A = alloca i177, align 1
   %L1 = load i177, ptr %A, align 1
   store i177 %X, ptr %A, align 1
   ret void
 }
 
 ; TODO: For non-byte-sized vectors, current implementation assumes there is
 ; padding to the next byte boundary between elements.
 @vector_i4 = constant [16 x <2 x i4>] zeroinitializer, align 8
 
 define void @load_vector_i4(i4 %X) {
 ; CHECK-LABEL: define void @load_vector_i4
 ; CHECK-SAME: (i4 [[X:%.*]]) {
 ; CHECK-NEXT:    [[PTR_0:%.*]] = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 1
 ; CHECK-NEXT:    [[PTR_1:%.*]] = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 2
 ; CHECK-NEXT:    [[PTR_2:%.*]] = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 4
 ; CHECK-NEXT:    [[PTR_3:%.*]] = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 8
 ; CHECK-NEXT:    [[RES_0:%.*]] = load i4, ptr [[PTR_0]], align 1
-; CHECK-NEXT:    [[RES_1:%.*]] = load i4, ptr [[PTR_1]], align 1
-; CHECK-NEXT:    [[RES_2:%.*]] = load i4, ptr [[PTR_2]], align 1
-; CHECK-NEXT:    [[RES_3:%.*]] = load i4, ptr [[PTR_3]], align 1
+; CHECK-NEXT:    [[RES_1:%.*]] = load i4, ptr [[PTR_1]], align 2
+; CHECK-NEXT:    [[RES_2:%.*]] = load i4, ptr [[PTR_2]], align 4
+; CHECK-NEXT:    [[RES_3:%.*]] = load i4, ptr [[PTR_3]], align 8
 ; CHECK-NEXT:    store i4 [[X]], ptr [[PTR_0]], align 1
-; CHECK-NEXT:    store i4 [[X]], ptr [[PTR_1]], align 1
-; CHECK-NEXT:    store i4 [[X]], ptr [[PTR_2]], align 1
-; CHECK-NEXT:    store i4 [[X]], ptr [[PTR_3]], align 1
+; CHECK-NEXT:    store i4 [[X]], ptr [[PTR_1]], align 2
+; CHECK-NEXT:    store i4 [[X]], ptr [[PTR_2]], align 4
+; CHECK-NEXT:    store i4 [[X]], ptr [[PTR_3]], align 8
 ; CHECK-NEXT:    ret void
 ;
   %ptr.0 = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 1
   %ptr.1 = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 2
   %ptr.2 = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 4
   %ptr.3 = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 8
 
   %res.0 = load i4, ptr %ptr.0, align 1

llvm/test/Transforms/InferAlignment/propagate-assume.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt < %s -passes=no-op-function -S | FileCheck %s
+; RUN: opt < %s -passes=infer-alignment -S | FileCheck %s
 
 ; ------------------------------------------------------------------------------
 ; Simple test
 ; ------------------------------------------------------------------------------
 
 define void @simple_forwardpropagate(ptr %a) {
 ; CHECK-LABEL: define void @simple_forwardpropagate
 ; CHECK-SAME: (ptr [[A:%.*]]) {
 ; CHECK-NEXT:    [[PTRINT:%.*]] = ptrtoint ptr [[A]] to i64
 ; CHECK-NEXT:    [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 31
 ; CHECK-NEXT:    [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
 ; CHECK-NEXT:    tail call void @llvm.assume(i1 [[MASKCOND]])
-; CHECK-NEXT:    [[LOAD_A:%.*]] = load i32, ptr [[A]], align 4
-; CHECK-NEXT:    store i32 345, ptr [[A]], align 4
+; CHECK-NEXT:    [[LOAD_A:%.*]] = load i32, ptr [[A]], align 32
+; CHECK-NEXT:    store i32 345, ptr [[A]], align 32
 ; CHECK-NEXT:    ret void
 ;
   %ptrint = ptrtoint ptr %a to i64
   %maskedptr = and i64 %ptrint, 31
   %maskcond = icmp eq i64 %maskedptr, 0
   tail call void @llvm.assume(i1 %maskcond)
 
   %load.a = load i32, ptr %a, align 4
   store i32 345, ptr %a, align 4
 
   ret void
 }
 
 define void @simple_backpropagate(ptr %a) {
 ; CHECK-LABEL: define void @simple_backpropagate
 ; CHECK-SAME: (ptr [[A:%.*]]) {
-; CHECK-NEXT:    [[LOAD_A:%.*]] = load i32, ptr [[A]], align 4
-; CHECK-NEXT:    store i32 345, ptr [[A]], align 4
+; CHECK-NEXT:    [[LOAD_A:%.*]] = load i32, ptr [[A]], align 32
+; CHECK-NEXT:    store i32 345, ptr [[A]], align 32
 ; CHECK-NEXT:    [[PTRINT:%.*]] = ptrtoint ptr [[A]] to i64
 ; CHECK-NEXT:    [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 31
 ; CHECK-NEXT:    [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
 ; CHECK-NEXT:    tail call void @llvm.assume(i1 [[MASKCOND]])
 ; CHECK-NEXT:    ret void
 ;
   %load.a = load i32, ptr %a, align 4
   store i32 345, ptr %a, align 4
 
   %ptrint = ptrtoint ptr %a to i64
   %maskedptr = and i64 %ptrint, 31
   %maskcond = icmp eq i64 %maskedptr, 0
   tail call void @llvm.assume(i1 %maskcond)
 
   ret void
 }
 
 define void @simple_forwardpropagate_bundle(ptr %a) {
 ; CHECK-LABEL: define void @simple_forwardpropagate_bundle
 ; CHECK-SAME: (ptr [[A:%.*]]) {
 ; CHECK-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i32 32) ]
-; CHECK-NEXT:    [[LOAD_A:%.*]] = load i32, ptr [[A]], align 4
-; CHECK-NEXT:    store i32 345, ptr [[A]], align 4
+; CHECK-NEXT:    [[LOAD_A:%.*]] = load i32, ptr [[A]], align 32
+; CHECK-NEXT:    store i32 345, ptr [[A]], align 32
 ; CHECK-NEXT:    ret void
 ;
   call void @llvm.assume(i1 true) ["align"(ptr %a, i32 32)]
   %load.a = load i32, ptr %a, align 4
   store i32 345, ptr %a, align 4
   ret void
 }
 
 define void @simple_backpropagate_bundle(ptr %a) {
 ; CHECK-LABEL: define void @simple_backpropagate_bundle
 ; CHECK-SAME: (ptr [[A:%.*]]) {
-; CHECK-NEXT:    [[LOAD_A:%.*]] = load i32, ptr [[A]], align 4
-; CHECK-NEXT:    store i32 345, ptr [[A]], align 4
+; CHECK-NEXT:    [[LOAD_A:%.*]] = load i32, ptr [[A]], align 32
+; CHECK-NEXT:    store i32 345, ptr [[A]], align 32
 ; CHECK-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i32 32) ]
 ; CHECK-NEXT:    ret void
 ;
   %load.a = load i32, ptr %a, align 4
   store i32 345, ptr %a, align 4
   call void @llvm.assume(i1 true) ["align"(ptr %a, i32 32)]
   ret void
 }

 ; CHECK-NEXT:    [[PTRINT2:%.*]] = ptrtoint ptr [[B]] to i64
 ; CHECK-NEXT:    [[MASKEDPTR2:%.*]] = and i64 [[PTRINT2]], 63
 ; CHECK-NEXT:    [[MASKEDCOND2:%.*]] = icmp eq i64 [[MASKEDPTR2]], 0
 ; CHECK-NEXT:    tail call void @llvm.assume(i1 [[MASKEDCOND2]])
 ; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
 ; CHECK:       for.body:
 ; CHECK-NEXT:    [[I:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[FOR_BODY]] ]
 ; CHECK-NEXT:    [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[I]]
-; CHECK-NEXT:    [[LOAD_B:%.*]] = load i32, ptr [[GEP_B]], align 4
+; CHECK-NEXT:    [[LOAD_B:%.*]] = load i32, ptr [[GEP_B]], align 64
 ; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[LOAD_B]], 1
 ; CHECK-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[I]]
-; CHECK-NEXT:    store i32 [[ADD]], ptr [[GEP_A]], align 4
+; CHECK-NEXT:    store i32 [[ADD]], ptr [[GEP_A]], align 64
 ; CHECK-NEXT:    [[I_NEXT]] = add nuw nsw i64 [[I]], 16
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i64 [[I_NEXT]], 1648
 ; CHECK-NEXT:    br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
 ; CHECK:       for.end:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %ptrint = ptrtoint ptr %a to i64

 ; CHECK-SAME: (ptr [[A:%.*]], ptr [[B:%.*]]) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i32 64) ]
 ; CHECK-NEXT:    tail call void @llvm.assume(i1 true) [ "align"(ptr [[B]], i32 64) ]
 ; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
 ; CHECK:       for.body:
 ; CHECK-NEXT:    [[I:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[FOR_BODY]] ]
 ; CHECK-NEXT:    [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[I]]
-; CHECK-NEXT:    [[LOAD_B:%.*]] = load i32, ptr [[GEP_B]], align 4
+; CHECK-NEXT:    [[LOAD_B:%.*]] = load i32, ptr [[GEP_B]], align 64
 ; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[LOAD_B]], 1
 ; CHECK-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[I]]
-; CHECK-NEXT:    store i32 [[ADD]], ptr [[GEP_A]], align 4
+; CHECK-NEXT:    store i32 [[ADD]], ptr [[GEP_A]], align 64
 ; CHECK-NEXT:    [[I_NEXT]] = add nuw nsw i64 [[I]], 16
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i64 [[I_NEXT]], 1648
 ; CHECK-NEXT:    br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
 ; CHECK:       for.end:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   tail call void @llvm.assume(i1 true) ["align"(ptr %a, i32 64)]

 
 ; Check that assume is propagated backwards through all
 ; operations that are `isGuaranteedToTransferExecutionToSuccessor`
 ; (it should reach the load and mark it as `align 32`).
 define void @complex_backpropagate(ptr %a, ptr %b, ptr %c) {
 ; CHECK-LABEL: define void @complex_backpropagate
 ; CHECK-SAME: (ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
 ; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i64, align 8
-; CHECK-NEXT:    [[LOAD_A:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT:    [[LOAD_A:%.*]] = load i32, ptr [[A]], align 32
 ; CHECK-NEXT:    [[LOAD_B:%.*]] = load i32, ptr [[B]], align 4
-; CHECK-NEXT:    store i32 [[LOAD_B]], ptr [[A]], align 4
+; CHECK-NEXT:    store i32 [[LOAD_B]], ptr [[A]], align 32
 ; CHECK-NEXT:    [[OBJ_SIZE:%.*]] = call i64 @llvm.objectsize.i64.p0(ptr [[C]], i1 false, i1 false, i1 false)
-; CHECK-NEXT:    store i64 [[OBJ_SIZE]], ptr [[ALLOCA]], align 4
+; CHECK-NEXT:    store i64 [[OBJ_SIZE]], ptr [[ALLOCA]], align 8
 ; CHECK-NEXT:    [[PTRINT:%.*]] = ptrtoint ptr [[A]] to i64
 ; CHECK-NEXT:    [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 31
 ; CHECK-NEXT:    [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
 ; CHECK-NEXT:    tail call void @llvm.assume(i1 [[MASKCOND]])
 ; CHECK-NEXT:    ret void
 ;
   %alloca = alloca i64
   %load.a = load i32, ptr %a, align 4
;
 
   ret void
 }
 
 define void @complex_backpropagate_bundle(ptr %a, ptr %b, ptr %c) {
 ; CHECK-LABEL: define void @complex_backpropagate_bundle
 ; CHECK-SAME: (ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
 ; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i64, align 8
-; CHECK-NEXT:    [[LOAD_A:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT:    [[LOAD_A:%.*]] = load i32, ptr [[A]], align 32
 ; CHECK-NEXT:    [[LOAD_B:%.*]] = load i32, ptr [[B]], align 4
-; CHECK-NEXT:    store i32 [[LOAD_B]], ptr [[A]], align 4
+; CHECK-NEXT:    store i32 [[LOAD_B]], ptr [[A]], align 32
 ; CHECK-NEXT:    [[OBJ_SIZE:%.*]] = call i64 @llvm.objectsize.i64.p0(ptr [[C]], i1 false, i1 false, i1 false)
-; CHECK-NEXT:    store i64 [[OBJ_SIZE]], ptr [[ALLOCA]], align 4
+; CHECK-NEXT:    store i64 [[OBJ_SIZE]], ptr [[ALLOCA]], align 8
 ; CHECK-NEXT:    tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i32 32) ]
 ; CHECK-NEXT:    ret void
 ;
   %alloca = alloca i64
   %load.a = load i32, ptr %a, align 4
 
   %load.b = load i32, ptr %b
   store i32 %load.b, ptr %a

llvm/test/Transforms/InferAlignment/ptrmask.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt < %s -passes=no-op-function -S | FileCheck %s
+; RUN: opt < %s -passes=infer-alignment -S | FileCheck %s
 
 ; ------------------------------------------------------------------------------
 ; load instructions
 ; ------------------------------------------------------------------------------
 
 define void @load(ptr align 1 %ptr) {
 ; CHECK-LABEL: define void @load
 ; CHECK-SAME: (ptr align 1 [[PTR:%.*]]) {
 ; CHECK-NEXT:    [[ALIGNED_0:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR]], i64 -2)
 ; CHECK-NEXT:    [[ALIGNED_1:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR]], i64 -4)
 ; CHECK-NEXT:    [[ALIGNED_2:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR]], i64 -8)
-; CHECK-NEXT:    [[LOAD_0:%.*]] = load <16 x i8>, ptr [[ALIGNED_0]], align 1
-; CHECK-NEXT:    [[LOAD_1:%.*]] = load <16 x i8>, ptr [[ALIGNED_1]], align 1
-; CHECK-NEXT:    [[LOAD_2:%.*]] = load <16 x i8>, ptr [[ALIGNED_2]], align 1
+; CHECK-NEXT:    [[LOAD_0:%.*]] = load <16 x i8>, ptr [[ALIGNED_0]], align 2
+; CHECK-NEXT:    [[LOAD_1:%.*]] = load <16 x i8>, ptr [[ALIGNED_1]], align 4
+; CHECK-NEXT:    [[LOAD_2:%.*]] = load <16 x i8>, ptr [[ALIGNED_2]], align 8
 ; CHECK-NEXT:    ret void
 ;
   %aligned.0 = call ptr @llvm.ptrmask.p0.i64(ptr %ptr, i64 -2)
   %aligned.1 = call ptr @llvm.ptrmask.p0.i64(ptr %ptr, i64 -4)
   %aligned.2 = call ptr @llvm.ptrmask.p0.i64(ptr %ptr, i64 -8)
 
   %load.0 = load <16 x i8>, ptr %aligned.0, align 1
   %load.1 = load <16 x i8>, ptr %aligned.1, align 1
   %load.2 = load <16 x i8>, ptr %aligned.2, align 1
 
   ret void
 }
 
 ; ------------------------------------------------------------------------------
 ; store instructions
 ; ------------------------------------------------------------------------------
 
 define void @store(ptr align 1 %ptr) {
 ; CHECK-LABEL: define void @store
 ; CHECK-SAME: (ptr align 1 [[PTR:%.*]]) {
 ; CHECK-NEXT:    [[ALIGNED_0:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR]], i64 -2)
 ; CHECK-NEXT:    [[ALIGNED_1:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR]], i64 -4)
 ; CHECK-NEXT:    [[ALIGNED_2:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR]], i64 -8)
-; CHECK-NEXT:    store <16 x i8> zeroinitializer, ptr [[ALIGNED_0]], align 1
-; CHECK-NEXT:    store <16 x i8> zeroinitializer, ptr [[ALIGNED_1]], align 1
-; CHECK-NEXT:    store <16 x i8> zeroinitializer, ptr [[ALIGNED_2]], align 1
+; CHECK-NEXT:    store <16 x i8> zeroinitializer, ptr [[ALIGNED_0]], align 2
+; CHECK-NEXT:    store <16 x i8> zeroinitializer, ptr [[ALIGNED_1]], align 4
+; CHECK-NEXT:    store <16 x i8> zeroinitializer, ptr [[ALIGNED_2]], align 8
 ; CHECK-NEXT:    ret void
 ;
   %aligned.0 = call ptr @llvm.ptrmask.p0.i64(ptr %ptr, i64 -2)
   %aligned.1 = call ptr @llvm.ptrmask.p0.i64(ptr %ptr, i64 -4)
   %aligned.2 = call ptr @llvm.ptrmask.p0.i64(ptr %ptr, i64 -8)
 
   store <16 x i8> zeroinitializer, ptr %aligned.0, align 1
   store <16 x i8> zeroinitializer, ptr %aligned.1, align 1
   store <16 x i8> zeroinitializer, ptr %aligned.2, align 1
 
   ret void
 }
 
 ; ------------------------------------------------------------------------------
 ; Overaligned pointer
 ; ------------------------------------------------------------------------------
 
 ; Underlying alignment greater than alignment forced by ptrmask
 define void @ptrmask_overaligned(ptr align 16 %ptr) {
 ; CHECK-LABEL: define void @ptrmask_overaligned
 ; CHECK-SAME: (ptr align 16 [[PTR:%.*]]) {
 ; CHECK-NEXT:    [[ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR]], i64 -8)
-; CHECK-NEXT:    [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 1
-; CHECK-NEXT:    store <16 x i8> zeroinitializer, ptr [[ALIGNED]], align 1
+; CHECK-NEXT:    [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 16
+; CHECK-NEXT:    store <16 x i8> zeroinitializer, ptr [[ALIGNED]], align 16
 ; CHECK-NEXT:    ret void
 ;
   %aligned = call ptr @llvm.ptrmask.p0.i64(ptr %ptr, i64 -8)
 
   %load = load <16 x i8>, ptr %aligned, align 1
   store <16 x i8> zeroinitializer, ptr %aligned, align 1
 
   ret void
 }
 
 declare ptr @llvm.ptrmask.p0.i64(ptr, i64)

llvm/test/Transforms/InferAlignment/undef-and-null.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt -passes=no-op-function -S < %s | FileCheck %s
+; RUN: opt -passes=infer-alignment -S < %s | FileCheck %s
 
 define void @load_undef_null(ptr %P) {
 ; CHECK-LABEL: define void @load_undef_null
 ; CHECK-SAME: (ptr [[P:%.*]]) {
 ; CHECK-NEXT:    [[RET_0:%.*]] = load i32, ptr undef, align 4
-; CHECK-NEXT:    [[RET_1:%.*]] = load i32, ptr null, align 4
+; CHECK-NEXT:    [[RET_1:%.*]] = load i32, ptr null, align 4294967296
 ; CHECK-NEXT:    ret void
 ;
   %ret.0 = load i32, ptr undef
   %ret.1 = load i32, ptr null
   ret void
 }
 
 define void @store_undef_null(ptr %P) {
 ; CHECK-LABEL: define void @store_undef_null
 ; CHECK-SAME: (ptr [[P:%.*]]) {
 ; CHECK-NEXT:    store i32 123, ptr undef, align 4
-; CHECK-NEXT:    store i32 124, ptr null, align 4
+; CHECK-NEXT:    store i32 124, ptr null, align 4294967296
 ; CHECK-NEXT:    ret void
 ;
   store i32 123, ptr undef
   store i32 124, ptr null
   ret void
 }

llvm/test/Transforms/InferAlignment/vector.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt < %s -passes=no-op-function -S | FileCheck %s
+; RUN: opt < %s -passes=infer-alignment -S | FileCheck %s
 
 ; InferAlignment should be able to prove vector alignment in the
 ; presence of a few mild address computation tricks.
 
 ; ------------------------------------------------------------------------------
 ; alloca
 ; ------------------------------------------------------------------------------
 
 define void @alloca(<2 x i64> %y) {
 ; CHECK-LABEL: define void @alloca
 ; CHECK-SAME: (<2 x i64> [[Y:%.*]]) {
 ; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca <2 x i64>, align 16
-; CHECK-NEXT:    [[LOAD:%.*]] = load <2 x i64>, ptr [[ALLOCA]], align 1
-; CHECK-NEXT:    store <2 x i64> [[Y]], ptr [[ALLOCA]], align 1
+; CHECK-NEXT:    [[LOAD:%.*]] = load <2 x i64>, ptr [[ALLOCA]], align 16
+; CHECK-NEXT:    store <2 x i64> [[Y]], ptr [[ALLOCA]], align 16
 ; CHECK-NEXT:    ret void
 ;
   %alloca = alloca <2 x i64>
   %load = load <2 x i64>, ptr %alloca, align 1
   store <2 x i64> %y, ptr %alloca, align 1
   ret void
 }
 
 ; ------------------------------------------------------------------------------
 ; global
 ; ------------------------------------------------------------------------------
 
 @x.vector = external global <2 x i64>, align 16
 
 define void @global(<2 x i64> %y) {
 ; CHECK-LABEL: define void @global
 ; CHECK-SAME: (<2 x i64> [[Y:%.*]]) {
-; CHECK-NEXT:    [[LOAD:%.*]] = load <2 x i64>, ptr @x.vector, align 1
-; CHECK-NEXT:    store <2 x i64> [[Y]], ptr @x.vector, align 1
+; CHECK-NEXT:    [[LOAD:%.*]] = load <2 x i64>, ptr @x.vector, align 16
+; CHECK-NEXT:    store <2 x i64> [[Y]], ptr @x.vector, align 16
 ; CHECK-NEXT:    ret void
 ;
   %load = load <2 x i64>, ptr @x.vector, align 1
   store <2 x i64> %y, ptr @x.vector, align 1
   ret void
 }
 
 ; ------------------------------------------------------------------------------
 ; getelementptr
 ; ------------------------------------------------------------------------------
 
 @vector = external global <2 x i64>, align 16
 @vector.arr = external global [13 x <2 x i64>], align 16
 
 ; ------------------------------------------------------------------------------
 ; 1d access
 ; ------------------------------------------------------------------------------
 
 define void @vector_singular(i32 %i, <2 x i64> %y) {
 ; CHECK-LABEL: define void @vector_singular
 ; CHECK-SAME: (i32 [[I:%.*]], <2 x i64> [[Y:%.*]]) {
 ; CHECK-NEXT:    [[GEP:%.*]] = getelementptr <2 x i64>, ptr @vector, i32 [[I]]
-; CHECK-NEXT:    [[LOAD:%.*]] = load <2 x i64>, ptr [[GEP]], align 1
-; CHECK-NEXT:    store <2 x i64> [[Y]], ptr [[GEP]], align 1
+; CHECK-NEXT:    [[LOAD:%.*]] = load <2 x i64>, ptr [[GEP]], align 16
+; CHECK-NEXT:    store <2 x i64> [[Y]], ptr [[GEP]], align 16
 ; CHECK-NEXT:    ret void
 ;
   %gep = getelementptr <2 x i64>, ptr @vector, i32 %i
   %load = load <2 x i64>, ptr %gep, align 1
   store <2 x i64> %y, ptr %gep, align 1
   ret void
 }
 
 ; ------------------------------------------------------------------------------
 ; 2d access
 ; ------------------------------------------------------------------------------
 
 define void @vector_array(i32 %i, i32 %j, <2 x i64> %y) {
 ; CHECK-LABEL: define void @vector_array
 ; CHECK-SAME: (i32 [[I:%.*]], i32 [[J:%.*]], <2 x i64> [[Y:%.*]]) {
 ; CHECK-NEXT:    [[GEP:%.*]] = getelementptr [13 x <2 x i64>], ptr @vector.arr, i32 [[I]], i32 [[J]]
-; CHECK-NEXT:    [[LOAD:%.*]] = load <2 x i64>, ptr [[GEP]], align 1
-; CHECK-NEXT:    store <2 x i64> [[Y]], ptr [[GEP]], align 1
+; CHECK-NEXT:    [[LOAD:%.*]] = load <2 x i64>, ptr [[GEP]], align 16
+; CHECK-NEXT:    store <2 x i64> [[Y]], ptr [[GEP]], align 16
 ; CHECK-NEXT:    ret void
 ;
   %gep = getelementptr [13 x <2 x i64>], ptr @vector.arr, i32 %i, i32 %j
   %load = load <2 x i64>, ptr %gep, align 1
   store <2 x i64> %y, ptr %gep, align 1
   ret void
 }
 
 ; ------------------------------------------------------------------------------
 ; non-vector array type
 ; ------------------------------------------------------------------------------
 
 ; When we see a unaligned load or store from an insufficiently aligned global or
 ; alloca, increase the alignment, turning it into an aligned load or store.
 @x.array = internal global [4 x i32] zeroinitializer
 
 define void @nonvector_array() {
 ; CHECK-LABEL: define void @nonvector_array() {
-; CHECK-NEXT:    [[LOAD_0:%.*]] = load <16 x i8>, ptr @x.array, align 1
-; CHECK-NEXT:    store <16 x i8> zeroinitializer, ptr @x.array, align 1
+; CHECK-NEXT:    [[LOAD_0:%.*]] = load <16 x i8>, ptr @x.array, align 16
+; CHECK-NEXT:    store <16 x i8> zeroinitializer, ptr @x.array, align 16
 ; CHECK-NEXT:    [[GEP:%.*]] = getelementptr [4 x i32], ptr @x.array, i16 0, i16 2
-; CHECK-NEXT:    [[LOAD_1:%.*]] = load <16 x i8>, ptr [[GEP]], align 1
-; CHECK-NEXT:    store <16 x i8> zeroinitializer, ptr [[GEP]], align 1
+; CHECK-NEXT:    [[LOAD_1:%.*]] = load <16 x i8>, ptr [[GEP]], align 8
+; CHECK-NEXT:    store <16 x i8> zeroinitializer, ptr [[GEP]], align 8
 ; CHECK-NEXT:    ret void
 ;
   %load.0 = load <16 x i8>, ptr @x.array, align 1
   store <16 x i8> zeroinitializer, ptr @x.array, align 1
 
   %gep = getelementptr [4 x i32], ptr @x.array, i16 0, i16 2
   %load.1 = load <16 x i8>, ptr %gep, align 1
   store <16 x i8> zeroinitializer, ptr %gep, align 1
 
   ret void
 }

llvm/test/Transforms/InferAlignment/volatile.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt < %s -passes=no-op-function -S | FileCheck %s
+; RUN: opt < %s -passes=infer-alignment -S | FileCheck %s
 
 define void @load_volatile() {
 ; CHECK-LABEL: define void @load_volatile() {
 ; CHECK-NEXT:    [[A:%.*]] = alloca { i32 }, align 8
 ; CHECK-NEXT:    [[B:%.*]] = alloca i32, align 4
-; CHECK-NEXT:    [[LOAD_A:%.*]] = load volatile i32, ptr [[A]], align 4
+; CHECK-NEXT:    [[LOAD_A:%.*]] = load volatile i32, ptr [[A]], align 8
 ; CHECK-NEXT:    [[LOAD_B:%.*]] = load volatile i32, ptr [[B]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %a = alloca { i32 }
   %b = alloca i32
   %load.a = load volatile i32, ptr %a
   %load.b = load volatile i32, ptr %b
   ret void
 }
 
 define void @store_volatile() {
 ; CHECK-LABEL: define void @store_volatile() {
 ; CHECK-NEXT:    [[A:%.*]] = alloca { i32 }, align 8
 ; CHECK-NEXT:    [[B:%.*]] = alloca i32, align 4
-; CHECK-NEXT:    store volatile i32 123, ptr [[A]], align 4
+; CHECK-NEXT:    store volatile i32 123, ptr [[A]], align 8
 ; CHECK-NEXT:    store volatile i32 123, ptr [[B]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %a = alloca { i32 }
   %b = alloca i32
   store volatile i32 123, ptr %a
   store volatile i32 123, ptr %b
   ret void
 }

llvm/test/Transforms/InferAlignment/vscale.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt -passes=no-op-function -S < %s | FileCheck %s
+; RUN: opt -passes=infer-alignment -S < %s | FileCheck %s
 
 ; <4 x i32> -> 16 byte alignment
 define void @alignment_sustain(ptr align 16 %ptr) {
 ; CHECK-LABEL: define void @alignment_sustain
 ; CHECK-SAME: (ptr align 16 [[PTR:%.*]]) {
 ; CHECK-NEXT:    [[GEP:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[PTR]], i32 3
 ; CHECK-NEXT:    [[LOAD:%.*]] = load <4 x i32>, ptr [[GEP]], align 16
 ; CHECK-NEXT:    store <4 x i32> zeroinitializer, ptr [[GEP]], align 16
 ; CHECK-NEXT:    ret void
 ;
   %gep = getelementptr <vscale x 4 x i32>, ptr %ptr, i32 3
 
   %load = load <4 x i32>, ptr %gep, align 16
   store <4 x i32> zeroinitializer, ptr %gep, align 16
 
   ret void
 }
 
 ; <8 x i32> -> 32 byte alignment
 define void @alignment_increase(ptr align 32 %ptr) {
 ; CHECK-LABEL: define void @alignment_increase
 ; CHECK-SAME: (ptr align 32 [[PTR:%.*]]) {
 ; CHECK-NEXT:    [[GEP:%.*]] = getelementptr <vscale x 8 x i32>, ptr [[PTR]], i32 3
-; CHECK-NEXT:    [[LOAD:%.*]] = load <8 x i32>, ptr [[GEP]], align 16
-; CHECK-NEXT:    store <8 x i32> zeroinitializer, ptr [[GEP]], align 16
+; CHECK-NEXT:    [[LOAD:%.*]] = load <8 x i32>, ptr [[GEP]], align 32
+; CHECK-NEXT:    store <8 x i32> zeroinitializer, ptr [[GEP]], align 32
 ; CHECK-NEXT:    ret void
 ;
   %gep = getelementptr <vscale x 8 x i32>, ptr %ptr, i32 3
 
   %load = load <8 x i32>, ptr %gep, align 16
   store <8 x i32> zeroinitializer, ptr %gep, align 16
 
   ret void
 }