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Differential D157818

[RISCV][GISel] Legalize G_PHI and G_BRCOND.
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Authored by craig.topper on Aug 13 2023, 11:08 AM.

Details

Reviewers
nitinjohnraj
asb
arsenm
reames
Commits
rGe4b2f2d4a617: [RISCV][GISel] Legalize G_PHI and G_BRCOND.

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craig.topper created this revision.Aug 13 2023, 11:08 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 13 2023, 11:08 AM
Herald added subscribers: jobnoorman, luke, VincentWu and 27 others. · View Herald Transcript
craig.topper requested review of this revision.Aug 13 2023, 11:08 AM
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craig.topper retitled this revision from [RISCV] Legalize G_PHI and G_BRCOND. to [RISCV][GISel] Legalize G_PHI and G_BRCOND..Aug 13 2023, 11:11 AM
Harbormaster completed remote builds in B252212: Diff 549730.Aug 13 2023, 1:37 PM
reames accepted this revision.Aug 14 2023, 9:25 AM
reames added a subscriber: reames.

LGTM w/minor comment

llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
909

Can you convert the I->isPreISelOpcode() check to an early return w/comment here? (Since all of the cases following are guarded by this condition.)

This revision is now accepted and ready to land.Aug 14 2023, 9:25 AM
This revision was landed with ongoing or failed builds.Aug 14 2023, 10:22 AM
Closed by commit rGe4b2f2d4a617: [RISCV][GISel] Legalize G_PHI and G_BRCOND. (authored by craig.topper). · Explain Why
This revision was automatically updated to reflect the committed changes.
craig.topper added a commit: rGe4b2f2d4a617: [RISCV][GISel] Legalize G_PHI and G_BRCOND..

Revision Contents

PathSize
llvm/
lib/
Target/
RISCV/
GISel/
9 lines
4 lines
test/
CodeGen/
RISCV/
GlobalISel/
legalizer/
rv32/
630 lines
rv64/
697 lines

Diff 550015

llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

Show First 20 Lines • Show All 92 Lines • ▼ Show 20 Lines getActionDefinitionsBuilder(G_ICMP)
.clampScalar(0, XLenLLT, XLenLLT); .clampScalar(0, XLenLLT, XLenLLT);
getActionDefinitionsBuilder(G_SELECT) getActionDefinitionsBuilder(G_SELECT)
.legalFor({{XLenLLT, XLenLLT}}) .legalFor({{XLenLLT, XLenLLT}})
.widenScalarToNextPow2(0) .widenScalarToNextPow2(0)
.clampScalar(0, XLenLLT, XLenLLT) .clampScalar(0, XLenLLT, XLenLLT)
.clampScalar(1, XLenLLT, XLenLLT); .clampScalar(1, XLenLLT, XLenLLT);
getActionDefinitionsBuilder(G_BRCOND)
.legalFor({XLenLLT})
.minScalar(0, XLenLLT);
getActionDefinitionsBuilder(G_PHI)
.legalFor({p0, XLenLLT})
.widenScalarToNextPow2(0)
.clampScalar(0, XLenLLT, XLenLLT);
getLegacyLegalizerInfo().computeTables(); getLegacyLegalizerInfo().computeTables();
} }

llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

Show First 20 Lines • Show All 893 Lines • ▼ Show 20 Lines if (AllowModify && FirstUncondOrIndirectBr != MBB.end()) {
} }
I = FirstUncondOrIndirectBr; I = FirstUncondOrIndirectBr;
} }
// We can't handle blocks that end in an indirect branch. // We can't handle blocks that end in an indirect branch.
if (I->getDesc().isIndirectBranch()) if (I->getDesc().isIndirectBranch())
return true; return true;
// We can't handle Generic branch opcodes from Global ISel.
if (I->isPreISelOpcode())
return true;
// We can't handle blocks with more than 2 terminators. // We can't handle blocks with more than 2 terminators.
if (NumTerminators > 2) if (NumTerminators > 2)
return true; return true;
reamesUnsubmitted
Not Done
ReplyInline Actions

Can you convert the I->isPreISelOpcode() check to an early return w/comment here? (Since all of the cases following are guarded by this condition.)

reames: Can you convert the I->isPreISelOpcode() check to an early return w/comment here? (Since all…
// Handle a single unconditional branch. // Handle a single unconditional branch.
if (NumTerminators == 1 && I->getDesc().isUnconditionalBranch()) { if (NumTerminators == 1 && I->getDesc().isUnconditionalBranch()) {
TBB = getBranchDestBlock(*I); TBB = getBranchDestBlock(*I);
return false; return false;
} }
// Handle a single conditional branch. // Handle a single conditional branch.
if (NumTerminators == 1 && I->getDesc().isConditionalBranch()) { if (NumTerminators == 1 && I->getDesc().isConditionalBranch()) {
▲ Show 20 Lines • Show All 1,917 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-phi.mir

  • This file was added.
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s
--- |
define i1 @phi_i1(i1 %cnd, i1 %a, i1 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i1 [ %b, %cond.false ], [ %a, %entry ]
ret i1 %cond
}
define i8 @phi_i8(i1 %cnd, i8 %a, i8 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i8 [ %b, %cond.false ], [ %a, %entry ]
ret i8 %cond
}
define i16 @phi_i16(i1 %cnd, i16 %a, i16 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i16 [ %b, %cond.false ], [ %a, %entry ]
ret i16 %cond
}
define i32 @phi_i32(i1 %cnd, i32 %a, i32 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i32 [ %b, %cond.false ], [ %a, %entry ]
ret i32 %cond
}
define ptr @phi_ptr(i1 %cnd, ptr %a, ptr %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi ptr [ %b, %cond.false ], [ %a, %entry ]
ret ptr %cond
}
define i48 @phi_i48(i1 %cnd, i48 %a, i48 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i48 [ %b, %cond.false ], [ %a, %entry ]
ret i48 %cond
}
define i64 @phi_i64(i1 %cnd, i64 %a, i64 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i64 [ %b, %cond.false ], [ %a, %entry ]
ret i64 %cond
}
define i72 @phi_i72(i1 %cnd, i72 %a, i72 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i72 [ %b, %cond.false ], [ %a, %entry ]
ret i72 %cond
}
...
---
name: phi_i1
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i1
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s32), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY2]](s32), %bb.1, [[COPY1]](s32), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
bb.1.entry:
liveins: $x10, $x11, $x12
%3:_(s32) = COPY $x10
%0:_(s1) = G_TRUNC %3(s32)
%4:_(s32) = COPY $x11
%1:_(s1) = G_TRUNC %4(s32)
%5:_(s32) = COPY $x12
%2:_(s1) = G_TRUNC %5(s32)
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%6:_(s1) = G_PHI %2(s1), %bb.2, %1(s1), %bb.1
%7:_(s32) = G_ANYEXT %6(s1)
$x10 = COPY %7(s32)
PseudoRET implicit $x10
...
---
name: phi_i8
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i8
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s32), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY2]](s32), %bb.1, [[COPY1]](s32), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
bb.1.entry:
liveins: $x10, $x11, $x12
%3:_(s32) = COPY $x10
%0:_(s1) = G_TRUNC %3(s32)
%4:_(s32) = COPY $x11
%1:_(s8) = G_TRUNC %4(s32)
%5:_(s32) = COPY $x12
%2:_(s8) = G_TRUNC %5(s32)
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%6:_(s8) = G_PHI %2(s8), %bb.2, %1(s8), %bb.1
%7:_(s32) = G_ANYEXT %6(s8)
$x10 = COPY %7(s32)
PseudoRET implicit $x10
...
---
name: phi_i16
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i16
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s32), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY2]](s32), %bb.1, [[COPY1]](s32), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
bb.1.entry:
liveins: $x10, $x11, $x12
%3:_(s32) = COPY $x10
%0:_(s1) = G_TRUNC %3(s32)
%4:_(s32) = COPY $x11
%1:_(s16) = G_TRUNC %4(s32)
%5:_(s32) = COPY $x12
%2:_(s16) = G_TRUNC %5(s32)
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%6:_(s16) = G_PHI %2(s16), %bb.2, %1(s16), %bb.1
%7:_(s32) = G_ANYEXT %6(s16)
$x10 = COPY %7(s32)
PseudoRET implicit $x10
...
---
name: phi_i32
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i32
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s32), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY2]](s32), %bb.1, [[COPY1]](s32), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
bb.1.entry:
liveins: $x10, $x11, $x12
%3:_(s32) = COPY $x10
%0:_(s1) = G_TRUNC %3(s32)
%1:_(s32) = COPY $x11
%2:_(s32) = COPY $x12
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%4:_(s32) = G_PHI %2(s32), %bb.2, %1(s32), %bb.1
$x10 = COPY %4(s32)
PseudoRET implicit $x10
...
---
name: phi_ptr
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_ptr
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(p0) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s32), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(p0) = G_PHI [[COPY2]](p0), %bb.1, [[COPY1]](p0), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](p0)
; CHECK-NEXT: PseudoRET implicit $x10
bb.1.entry:
liveins: $x10, $x11, $x12
%3:_(s32) = COPY $x10
%0:_(s1) = G_TRUNC %3(s32)
%1:_(p0) = COPY $x11
%2:_(p0) = COPY $x12
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%4:_(p0) = G_PHI %2(p0), %bb.2, %1(p0), %bb.1
$x10 = COPY %4(p0)
PseudoRET implicit $x10
...
---
name: phi_i48
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
- { id: 8, class: _ }
- { id: 9, class: _ }
- { id: 10, class: _ }
- { id: 11, class: _ }
- { id: 12, class: _ }
- { id: 13, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i48
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12, $x13, $x14
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x14
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s32), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY3]](s32), %bb.1, [[COPY1]](s32), %bb.0
; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(s32) = G_PHI [[COPY4]](s32), %bb.1, [[COPY2]](s32), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s32)
; CHECK-NEXT: $x11 = COPY [[PHI1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
bb.1.entry:
liveins: $x10, $x11, $x12, $x13, $x14
%3:_(s32) = COPY $x10
%0:_(s1) = G_TRUNC %3(s32)
%4:_(s32) = COPY $x11
%5:_(s32) = COPY $x12
%6:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
%1:_(s48) = G_TRUNC %6(s64)
%7:_(s32) = COPY $x13
%8:_(s32) = COPY $x14
%9:_(s64) = G_MERGE_VALUES %7(s32), %8(s32)
%2:_(s48) = G_TRUNC %9(s64)
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%10:_(s48) = G_PHI %2(s48), %bb.2, %1(s48), %bb.1
%13:_(s64) = G_ANYEXT %10(s48)
%11:_(s32), %12:_(s32) = G_UNMERGE_VALUES %13(s64)
$x10 = COPY %11(s32)
$x11 = COPY %12(s32)
PseudoRET implicit $x10, implicit $x11
...
---
name: phi_i64
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
- { id: 8, class: _ }
- { id: 9, class: _ }
- { id: 10, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i64
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12, $x13, $x14
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x14
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s32), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY3]](s32), %bb.1, [[COPY1]](s32), %bb.0
; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(s32) = G_PHI [[COPY4]](s32), %bb.1, [[COPY2]](s32), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s32)
; CHECK-NEXT: $x11 = COPY [[PHI1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
bb.1.entry:
liveins: $x10, $x11, $x12, $x13, $x14
%3:_(s32) = COPY $x10
%0:_(s1) = G_TRUNC %3(s32)
%4:_(s32) = COPY $x11
%5:_(s32) = COPY $x12
%1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
%6:_(s32) = COPY $x13
%7:_(s32) = COPY $x14
%2:_(s64) = G_MERGE_VALUES %6(s32), %7(s32)
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%8:_(s64) = G_PHI %2(s64), %bb.2, %1(s64), %bb.1
%9:_(s32), %10:_(s32) = G_UNMERGE_VALUES %8(s64)
$x10 = COPY %9(s32)
$x11 = COPY %10(s32)
PseudoRET implicit $x10, implicit $x11
...
---
name: phi_i72
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
- { id: 8, class: _ }
- { id: 9, class: _ }
- { id: 10, class: _ }
- { id: 11, class: _ }
- { id: 12, class: _ }
- { id: 13, class: _ }
- { id: 14, class: _ }
- { id: 15, class: _ }
- { id: 16, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i72
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s32), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY4]](s32), %bb.1, [[COPY1]](s32), %bb.0
; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(s32) = G_PHI [[COPY5]](s32), %bb.1, [[COPY2]](s32), %bb.0
; CHECK-NEXT: [[PHI2:%[0-9]+]]:_(s32) = G_PHI [[COPY6]](s32), %bb.1, [[COPY3]](s32), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s32)
; CHECK-NEXT: $x10 = COPY [[PHI1]](s32)
; CHECK-NEXT: $x10 = COPY [[PHI2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x10, implicit $x10
bb.1.entry:
liveins: $x10, $x11, $x12
%3:_(s32) = COPY $x10
%0:_(s1) = G_TRUNC %3(s32)
%4:_(s32) = COPY $x11
%5:_(s32) = COPY $x11
%6:_(s32) = COPY $x11
%7:_(s96) = G_MERGE_VALUES %4(s32), %5(s32), %6(s32)
%1:_(s72) = G_TRUNC %7(s96)
%8:_(s32) = COPY $x12
%9:_(s32) = COPY $x12
%10:_(s32) = COPY $x12
%11:_(s96) = G_MERGE_VALUES %8(s32), %9(s32), %10(s32)
%2:_(s72) = G_TRUNC %11(s96)
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%12:_(s72) = G_PHI %2(s72), %bb.2, %1(s72), %bb.1
%16:_(s96) = G_ANYEXT %12(s72)
%13:_(s32), %14:_(s32), %15:_(s32) = G_UNMERGE_VALUES %16(s96)
$x10 = COPY %13(s32)
$x10 = COPY %14(s32)
$x10 = COPY %15(s32)
PseudoRET implicit $x10, implicit $x10, implicit $x10
...

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-phi.mir

  • This file was added.
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s
--- |
define i1 @phi_i1(i1 %cnd, i1 %a, i1 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i1 [ %b, %cond.false ], [ %a, %entry ]
ret i1 %cond
}
define i8 @phi_i8(i1 %cnd, i8 %a, i8 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i8 [ %b, %cond.false ], [ %a, %entry ]
ret i8 %cond
}
define i16 @phi_i16(i1 %cnd, i16 %a, i16 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i16 [ %b, %cond.false ], [ %a, %entry ]
ret i16 %cond
}
define i32 @phi_i32(i1 %cnd, i32 %a, i32 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i32 [ %b, %cond.false ], [ %a, %entry ]
ret i32 %cond
}
define i64 @phi_i64(i1 %cnd, i64 %a, i64 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i64 [ %b, %cond.false ], [ %a, %entry ]
ret i64 %cond
}
define ptr @phi_ptr(i1 %cnd, ptr %a, ptr %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi ptr [ %b, %cond.false ], [ %a, %entry ]
ret ptr %cond
}
define i72 @phi_i72(i1 %cnd, i72 %a, i72 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i72 [ %b, %cond.false ], [ %a, %entry ]
ret i72 %cond
}
define i128 @phi_i128(i1 %cnd, i128 %a, i128 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i128 [ %b, %cond.false ], [ %a, %entry ]
ret i128 %cond
}
define i192 @phi_i192(i1 %cnd, i192 %a, i192 %b) {
entry:
br i1 %cnd, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %entry, %cond.false
%cond = phi i192 [ %b, %cond.false ], [ %a, %entry ]
ret i192 %cond
}
...
---
name: phi_i1
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i1
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
bb.1.entry:
liveins: $x10, $x11, $x12
%3:_(s64) = COPY $x10
%0:_(s1) = G_TRUNC %3(s64)
%4:_(s64) = COPY $x11
%1:_(s1) = G_TRUNC %4(s64)
%5:_(s64) = COPY $x12
%2:_(s1) = G_TRUNC %5(s64)
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%6:_(s1) = G_PHI %2(s1), %bb.2, %1(s1), %bb.1
%7:_(s64) = G_ANYEXT %6(s1)
$x10 = COPY %7(s64)
PseudoRET implicit $x10
...
---
name: phi_i8
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i8
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
bb.1.entry:
liveins: $x10, $x11, $x12
%3:_(s64) = COPY $x10
%0:_(s1) = G_TRUNC %3(s64)
%4:_(s64) = COPY $x11
%1:_(s8) = G_TRUNC %4(s64)
%5:_(s64) = COPY $x12
%2:_(s8) = G_TRUNC %5(s64)
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%6:_(s8) = G_PHI %2(s8), %bb.2, %1(s8), %bb.1
%7:_(s64) = G_ANYEXT %6(s8)
$x10 = COPY %7(s64)
PseudoRET implicit $x10
...
---
name: phi_i16
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i16
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
bb.1.entry:
liveins: $x10, $x11, $x12
%3:_(s64) = COPY $x10
%0:_(s1) = G_TRUNC %3(s64)
%4:_(s64) = COPY $x11
%1:_(s16) = G_TRUNC %4(s64)
%5:_(s64) = COPY $x12
%2:_(s16) = G_TRUNC %5(s64)
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%6:_(s16) = G_PHI %2(s16), %bb.2, %1(s16), %bb.1
%7:_(s64) = G_ANYEXT %6(s16)
$x10 = COPY %7(s64)
PseudoRET implicit $x10
...
---
name: phi_i32
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i32
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
bb.1.entry:
liveins: $x10, $x11, $x12
%3:_(s64) = COPY $x10
%0:_(s1) = G_TRUNC %3(s64)
%4:_(s64) = COPY $x11
%1:_(s32) = G_TRUNC %4(s64)
%5:_(s64) = COPY $x12
%2:_(s32) = G_TRUNC %5(s64)
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%6:_(s32) = G_PHI %2(s32), %bb.2, %1(s32), %bb.1
%7:_(s64) = G_ANYEXT %6(s32)
$x10 = COPY %7(s64)
PseudoRET implicit $x10
...
---
name: phi_i64
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i64
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
bb.1.entry:
liveins: $x10, $x11, $x12
%3:_(s64) = COPY $x10
%0:_(s1) = G_TRUNC %3(s64)
%1:_(s64) = COPY $x11
%2:_(s64) = COPY $x12
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%4:_(s64) = G_PHI %2(s64), %bb.2, %1(s64), %bb.1
$x10 = COPY %4(s64)
PseudoRET implicit $x10
...
---
name: phi_ptr
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_ptr
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(p0) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(p0) = G_PHI [[COPY2]](p0), %bb.1, [[COPY1]](p0), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](p0)
; CHECK-NEXT: PseudoRET implicit $x10
bb.1.entry:
liveins: $x10, $x11, $x12
%3:_(s64) = COPY $x10
%0:_(s1) = G_TRUNC %3(s64)
%1:_(p0) = COPY $x11
%2:_(p0) = COPY $x12
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%4:_(p0) = G_PHI %2(p0), %bb.2, %1(p0), %bb.1
$x10 = COPY %4(p0)
PseudoRET implicit $x10
...
---
name: phi_i72
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
- { id: 8, class: _ }
- { id: 9, class: _ }
- { id: 10, class: _ }
- { id: 11, class: _ }
- { id: 12, class: _ }
- { id: 13, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i72
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12, $x13, $x14
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x13
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x14
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY3]](s64), %bb.1, [[COPY1]](s64), %bb.0
; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(s64) = G_PHI [[COPY4]](s64), %bb.1, [[COPY2]](s64), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
; CHECK-NEXT: $x11 = COPY [[PHI1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
bb.1.entry:
liveins: $x10, $x11, $x12, $x13, $x14
%3:_(s64) = COPY $x10
%0:_(s1) = G_TRUNC %3(s64)
%4:_(s64) = COPY $x11
%5:_(s64) = COPY $x12
%6:_(s128) = G_MERGE_VALUES %4(s64), %5(s64)
%1:_(s72) = G_TRUNC %6(s128)
%7:_(s64) = COPY $x13
%8:_(s64) = COPY $x14
%9:_(s128) = G_MERGE_VALUES %7(s64), %8(s64)
%2:_(s72) = G_TRUNC %9(s128)
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%10:_(s72) = G_PHI %2(s72), %bb.2, %1(s72), %bb.1
%13:_(s128) = G_ANYEXT %10(s72)
%11:_(s64), %12:_(s64) = G_UNMERGE_VALUES %13(s128)
$x10 = COPY %11(s64)
$x11 = COPY %12(s64)
PseudoRET implicit $x10, implicit $x11
...
---
name: phi_i128
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
- { id: 8, class: _ }
- { id: 9, class: _ }
- { id: 10, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i128
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12, $x13, $x14
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x13
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x14
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY3]](s64), %bb.1, [[COPY1]](s64), %bb.0
; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(s64) = G_PHI [[COPY4]](s64), %bb.1, [[COPY2]](s64), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
; CHECK-NEXT: $x11 = COPY [[PHI1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
bb.1.entry:
liveins: $x10, $x11, $x12, $x13, $x14
%3:_(s64) = COPY $x10
%0:_(s1) = G_TRUNC %3(s64)
%4:_(s64) = COPY $x11
%5:_(s64) = COPY $x12
%1:_(s128) = G_MERGE_VALUES %4(s64), %5(s64)
%6:_(s64) = COPY $x13
%7:_(s64) = COPY $x14
%2:_(s128) = G_MERGE_VALUES %6(s64), %7(s64)
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%8:_(s128) = G_PHI %2(s128), %bb.2, %1(s128), %bb.1
%9:_(s64), %10:_(s64) = G_UNMERGE_VALUES %8(s128)
$x10 = COPY %9(s64)
$x11 = COPY %10(s64)
PseudoRET implicit $x10, implicit $x11
...
---
name: phi_i192
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
- { id: 8, class: _ }
- { id: 9, class: _ }
- { id: 10, class: _ }
- { id: 11, class: _ }
- { id: 12, class: _ }
- { id: 13, class: _ }
frameInfo:
maxAlignment: 1
machineFunctionInfo:
varArgsFrameIndex: 0
varArgsSaveSize: 0
body: |
; CHECK-LABEL: name: phi_i192
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $x10, $x11, $x12
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x12
; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s64) = COPY $x12
; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s64) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.cond.false:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.cond.end:
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY4]](s64), %bb.1, [[COPY1]](s64), %bb.0
; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(s64) = G_PHI [[COPY5]](s64), %bb.1, [[COPY2]](s64), %bb.0
; CHECK-NEXT: [[PHI2:%[0-9]+]]:_(s64) = G_PHI [[COPY6]](s64), %bb.1, [[COPY3]](s64), %bb.0
; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
; CHECK-NEXT: $x10 = COPY [[PHI1]](s64)
; CHECK-NEXT: $x10 = COPY [[PHI2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x10, implicit $x10
bb.1.entry:
liveins: $x10, $x11, $x12
%3:_(s64) = COPY $x10
%0:_(s1) = G_TRUNC %3(s64)
%4:_(s64) = COPY $x11
%5:_(s64) = COPY $x11
%6:_(s64) = COPY $x11
%1:_(s192) = G_MERGE_VALUES %4(s64), %5(s64), %6(s64)
%7:_(s64) = COPY $x12
%8:_(s64) = COPY $x12
%9:_(s64) = COPY $x12
%2:_(s192) = G_MERGE_VALUES %7(s64), %8(s64), %9(s64)
G_BRCOND %0(s1), %bb.3
G_BR %bb.2
bb.2.cond.false:
bb.3.cond.end:
%10:_(s192) = G_PHI %2(s192), %bb.2, %1(s192), %bb.1
%11:_(s64), %12:_(s64), %13:_(s64) = G_UNMERGE_VALUES %10(s192)
$x10 = COPY %11(s64)
$x10 = COPY %12(s64)
$x10 = COPY %13(s64)
PseudoRET implicit $x10, implicit $x10, implicit $x10
...