AMDGPU: Partially respect nobuiltin in libcall simplifier

[arsenm]

Summary

There are more contexts where it's not handled correctly but this is
the simplest one.

[sameerds]

llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp

495

This seems to ignore nobuiltin if a callee is present, but the documentation for nobuiltin seems to say something different. Should the short-circuiting OR be swapped here?

[sameerds]

llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp

495

Oh wait. I am reading this wrong. Sorry!

[arsenm]

8a677a7ff0c6f59b392a03108f2dba86d1606183

llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp

if (native_sin && native_cos) {
     }
   }
   return false;
 }
 
 bool AMDGPULibCalls::useNative(CallInst *aCI) {
   CI = aCI;
   Function *Callee = aCI->getCalledFunction();
-  if (!Callee)
+  if (!Callee || aCI->isNoBuiltin())
     return false;
 
   FuncInfo FInfo;
   if (!parseFunctionName(Callee->getName(), FInfo) || !FInfo.isMangled() ||
       FInfo.getPrefix() != AMDGPULibFunc::NOPFX ||
       getArgType(FInfo) == AMDGPULibFunc::F64 || !HasNative(FInfo.getId()) ||
       !(AllNative || useNativeFunc(FInfo.getName()))) {
     return false;
bool AMDGPULibCalls::fold_read_write_pipe(CallInst *CI, IRBuilder<> &B,
   return true;
 }
 
 // This function returns false if no change; return true otherwise.
 bool AMDGPULibCalls::fold(CallInst *CI, AliasAnalysis *AA) {
   this->CI = CI;
   Function *Callee = CI->getCalledFunction();
   // Ignore indirect calls.
-  if (!Callee)
+  if (!Callee || CI->isNoBuiltin())
     return false;
 
   IRBuilder<> B(CI);
   switch (Callee->getIntrinsicID()) {
   case Intrinsic::not_intrinsic:
     break;
   case Intrinsic::amdgcn_wavefrontsize:
     return !EnablePreLink && fold_wavefrontsize(CI, B);

llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll

entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %arrayidx1 = getelementptr inbounds float, ptr addrspace(1) %a, i64 1
   %tmp1 = load float, ptr addrspace(1) %arrayidx1, align 4
   %call = call fast float @_Z4powrff(float %tmp, float %tmp1)
   store float %call, ptr addrspace(1) %a, align 4
   ret void
 }
 
+; GCN-LABEL: {{^}}define amdgpu_kernel void @test_use_native_powr_nobuiltin
+; GCN: %call = tail call fast float @_Z4powrff(float %tmp, float %tmp1)
+define amdgpu_kernel void @test_use_native_powr_nobuiltin(ptr addrspace(1) nocapture %a) {
+entry:
+  %tmp = load float, ptr addrspace(1) %a, align 4
+  %arrayidx1 = getelementptr inbounds float, ptr addrspace(1) %a, i64 1
+  %tmp1 = load float, ptr addrspace(1) %arrayidx1, align 4
+  %call = call fast float @_Z4powrff(float %tmp, float %tmp1) nobuiltin
+  store float %call, ptr addrspace(1) %a, align 4
+  ret void
+}
+
 ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_use_native_sqrt
 ; GCN-NATIVE: call fast float @_Z11native_sqrtf(float %tmp)
 define amdgpu_kernel void @test_use_native_sqrt(ptr addrspace(1) nocapture %a) {
 entry:
   %tmp = load float, ptr addrspace(1) %a, align 4
   %call = call fast float @_Z4sqrtf(float %tmp)
   store float %call, ptr addrspace(1) %a, align 4
   ret void