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Differential D156246

[flang] Implement procedure IEEE_COPY_SIGN with mlir::math::CopySignOp
ClosedPublic

Authored by vdonaldson on Jul 25 2023, 9:14 AM.

Details

Reviewers
PeteSteinfeld
Renaud-K
clementval

Diff Detail

Event Timeline

vdonaldson created this revision.Jul 25 2023, 9:14 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 25 2023, 9:14 AM
Herald added subscribers: sunshaoce, bzcheeseman, mehdi_amini and 2 others. · View Herald Transcript
vdonaldson requested review of this revision.Jul 25 2023, 9:14 AM
Herald added a subscriber: stephenneuendorffer. · View Herald TranscriptJul 25 2023, 9:14 AM
vdonaldson added reviewers: PeteSteinfeld, Renaud-K, clementval.Jul 25 2023, 9:15 AM
Renaud-K accepted this revision.Jul 25 2023, 9:18 AM

Looks good. Thank you.

This revision is now accepted and ready to land.Jul 25 2023, 9:18 AM
PeteSteinfeld accepted this revision.Jul 25 2023, 9:45 AM

All builds and tests correctly and looks good.

vdonaldson closed this revision.Jul 25 2023, 3:31 PM

https://reviews.llvm.org/D156246

Harbormaster completed remote builds in B248016: Diff 544006.Jul 25 2023, 5:06 PM

Revision Contents

PathSize
flang/
lib/
Optimizer/
Builder/
2 lines
test/
Lower/
Intrinsics/
32 lines

Diff 544006

flang/lib/Optimizer/Builder/IntrinsicCall.cpp

Show First 20 Lines • Show All 3,559 Lines • ▼ Show 20 Lines if (yRealType == mlir::FloatType::getBF16(builder.getContext())) {
// This conversion should always preserve the sign bit. // This conversion should always preserve the sign bit.
yRealVal = builder.createConvert( yRealVal = builder.createConvert(
loc, mlir::FloatType::getF32(builder.getContext()), yRealVal); loc, mlir::FloatType::getF32(builder.getContext()), yRealVal);
yRealType = mlir::FloatType::getF32(builder.getContext()); yRealType = mlir::FloatType::getF32(builder.getContext());
} }
// Args have the same type. // Args have the same type.
if (xRealType == yRealType) if (xRealType == yRealType)
return builder.create<mlir::LLVM::CopySignOp>(loc, xRealVal, yRealVal); return builder.create<mlir::math::CopySignOp>(loc, xRealVal, yRealVal);
// Args have different types. // Args have different types.
mlir::Type xIntType = builder.getIntegerType(xRealType.getWidth()); mlir::Type xIntType = builder.getIntegerType(xRealType.getWidth());
mlir::Type yIntType = builder.getIntegerType(yRealType.getWidth()); mlir::Type yIntType = builder.getIntegerType(yRealType.getWidth());
mlir::Value xIntVal = mlir::Value xIntVal =
builder.create<mlir::arith::BitcastOp>(loc, xIntType, xRealVal); builder.create<mlir::arith::BitcastOp>(loc, xIntType, xRealVal);
mlir::Value yIntVal = mlir::Value yIntVal =
builder.create<mlir::arith::BitcastOp>(loc, yIntType, yRealVal); builder.create<mlir::arith::BitcastOp>(loc, yIntType, yRealVal);
▲ Show 20 Lines • Show All 2,239 Lines • Show Last 20 Lines

flang/test/Lower/Intrinsics/ieee_copy_sign.f90

  • This file was added.
! RUN: bbc -emit-fir -o - %s | FileCheck %s
! CHECK-LABEL: func @_QQmain
use ieee_arithmetic
real(4) :: x = -2.0, y = huge(y)
real(8) :: z = 2.0
! CHECK-DAG: %[[V_0:[0-9]+]] = fir.address_of(@_QFEx) : !fir.ref<f32>
! CHECK-DAG: %[[V_1:[0-9]+]] = fir.address_of(@_QFEy) : !fir.ref<f32>
! CHECK-DAG: %[[V_2:[0-9]+]] = fir.address_of(@_QFEz) : !fir.ref<f64>
! CHECK-DAG: %[[V_6:[0-9]+]] = fir.load %[[V_0]] : !fir.ref<f32>
! CHECK-DAG: %[[V_7:[0-9]+]] = fir.load %[[V_1]] : !fir.ref<f32>
! CHECK: %[[V_8:[0-9]+]] = math.copysign %[[V_6]], %[[V_7]] fastmath<contract> : f32
! CHECK: %[[V_9:[0-9]+]] = fir.call @_FortranAioOutputReal32(%{{.*}}, %[[V_8]]) fastmath<contract> : (!fir.ref<i8>, f32) -> i1
! CHECK-DAG: %[[V_10:[0-9]+]] = fir.load %[[V_2]] : !fir.ref<f64>
! CHECK-DAG: %[[V_11:[0-9]+]] = fir.load %[[V_1]] : !fir.ref<f32>
! CHECK: %[[V_12:[0-9]+]] = arith.bitcast %[[V_10]] : f64 to i64
! CHECK: %[[V_13:[0-9]+]] = arith.bitcast %[[V_11]] : f32 to i32
! CHECK: %[[V_14:[0-9]+]] = arith.shrui %[[V_13]], %c31{{.*}} : i32
! CHECK: %[[V_15:[0-9]+]] = arith.shli %[[V_12]], %c1{{.*}} : i64
! CHECK: %[[V_16:[0-9]+]] = arith.shrui %[[V_15]], %c1{{.*}} : i64
! CHECK: %[[V_17:[0-9]+]] = arith.shli %c1{{.*}}, %c63{{.*}} : i64
! CHECK: %[[V_18:[0-9]+]] = arith.cmpi eq, %[[V_14]], %c0{{.*}} : i32
! CHECK: %[[V_19:[0-9]+]] = arith.select %[[V_18]], %c0{{.*}}, %[[V_17]] : i64
! CHECK: %[[V_20:[0-9]+]] = arith.ori %[[V_16]], %[[V_19]] : i64
! CHECK: %[[V_21:[0-9]+]] = arith.bitcast %[[V_20]] : i64 to f64
! CHECK: %[[V_22:[0-9]+]] = fir.call @_FortranAioOutputReal64(%{{.*}}, %[[V_21]]) fastmath<contract> : (!fir.ref<i8>, f64) -> i1
print*, ieee_copy_sign(x,y), ieee_copy_sign(z,y)
end