[XCOFF] Do not put MergeableCStrings in their own section

[w2yehia]

Summary

The current implementation generates a csect with a
".rodata.str.x.y" prefix for a MergeableCString variable definition.
However, a reference to such variable does not get the prefix in its
name because there's not enough information in the containing IR;
In particular, without seeing the initializer and absent of some other
indicators, we cannot tell that the referenced variable is a null-
terminated string.

When the AIX codegen in llvm was being developed, the prefixing was copied
from ELF without having the linker take advantage of the info.
Currently, the AIX linker does not have the capability to merge
MergeableCString variables. If such feature would ever get implemented,
the contract between the linker and compiler would have to be reconsidered.

Here's the before and after of this change:

@a = global i64 320255973571806, align 8
@strA = unnamed_addr constant [7 x i8] c"hello\0A\00", align 1  ;; Mergeable1ByteCString
@strB = unnamed_addr constant [8 x i8] c"Blahah\0A\00", align 1 ;; Mergeable1ByteCString
@strC = unnamed_addr constant [2 x i16] [i16 1, i16 0], align 2 ;; Mergeable2ByteCString
@strD = unnamed_addr constant [2 x i16] [i16 1, i16 1], align 2 ;; !isMergeableCString
@strE = external unnamed_addr constant [2 x i16], align 2

-fdata-sections:
  .text  extern        .rodata.str1.1strA        .text  extern        strA
    0    SD       RO                               0    SD       RO
  .text  extern        .rodata.str1.1strB        .text  extern        strB
    0    SD       RO                               0    SD       RO
  .text  extern        .rodata.str2.2strC  ===>  .text  extern        strC
    0    SD       RO                               0    SD       RO
  .text  extern        strD                      .text  extern        strD
    0    SD       RO                               0    SD       RO
  .data  extern        a                         .data  extern        a
    0    SD       RW                               0    SD       RW
  undef  extern        strE                      undef  extern        strE
    0    ER       UA                               0    ER       UA

-fno-data-sections:
  .text  unamex        .rodata.str1.1            .text  unamex        .rodata
    0    SD       RO                               0    SD       RO
  .text  extern        strA                      .text  extern        strA
    0    LD       RO                               0    LD       RO
  .text  extern        strB                      .text  extern        strB
    0    LD       RO                               0    LD       RO
  .text  unamex        .rodata.str2.2      ===>  .text  extern        strC
    0    SD       RO                               0    LD       RO
  .text  extern        strC                      .text  extern        strD
    0    LD       RO                               0    LD       RO
  .text  unamex        .rodata                   .data  unamex        .data
    0    SD       RO                               0    SD       RW
  .text  extern        strD                      .data  extern        a
    0    LD       RO                               0    LD       RW
  .data  unamex        .data                     undef  extern        strE
    0    SD       RW                               0    ER       UA
  .data  extern        a
    0    LD       RW
  undef  extern        strE
    0    ER       UA

[daltenty]

LGTM, with some notes:

This does constitute some kind of ABI change, since we're changing the name of certain symbols which have external linkage (if one module use the codegen before, and another after, the symbol will have different external names in the symbol table).
That said, in practice references would have been broken on the mismatch in name anyhow, as the external name with the extra prefix was already unexpected by the referencing side, so anything this breaks was likely already a problem.

[MaskRay]

llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll

22

Drop unneeded change

llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp

if (Kind.isBSSLocal() || GO->hasCommonLinkage() || Kind.isThreadBSSLocal()) {
     getNameWithPrefix(Name, GO, TM);
     XCOFF::StorageMappingClass SMC = Kind.isBSSLocal() ? XCOFF::XMC_BS
                                      : Kind.isCommon() ? XCOFF::XMC_RW
                                                        : XCOFF::XMC_UL;
     return getContext().getXCOFFSection(
         Name, Kind, XCOFF::CsectProperties(SMC, XCOFF::XTY_CM));
   }
 
-  if (Kind.isMergeableCString()) {
-    Align Alignment = GO->getParent()->getDataLayout().getPreferredAlign(
-        cast<GlobalVariable>(GO));
-
-    unsigned EntrySize = getEntrySizeForKind(Kind);
-    std::string SizeSpec = ".rodata.str" + utostr(EntrySize) + ".";
-    SmallString<128> Name;
-    Name = SizeSpec + utostr(Alignment.value());
-
-    if (TM.getDataSections())
-      getNameWithPrefix(Name, GO, TM);
-
-    return getContext().getXCOFFSection(
-        Name, Kind, XCOFF::CsectProperties(XCOFF::XMC_RO, XCOFF::XTY_SD),
-        /* MultiSymbolsAllowed*/ !TM.getDataSections());
-  }
-
   if (Kind.isText()) {
     if (TM.getFunctionSections()) {
       return cast<MCSymbolXCOFF>(getFunctionEntryPointSymbol(GO, TM))
           ->getRepresentedCsect();
     }
     return TextSection;
   }
 

llvm/test/CodeGen/PowerPC/aix-return55.ll

 ; CHECK: li 3, 55
 ; CHECK: blr
 }
 
 ;CHECKOBJ32:    00000000 <.foo>:
 ;CHECKOBJ64:    0000000000000000 <.foo>:
 ;CHECKOBJ-NEXT:       0: 38 60 00 37                    li 3, 55
 ;CHECKOBJ-NEXT:       4: 4e 80 00 20                    blr{{[[:space:]] *}}
-;CHECKOBJ32-NEXT: 00000008 <.rodata.str1.1>:
-;CHECKOBJ64-NEXT: 0000000000000008 <.rodata.str1.1>:
+;CHECKOBJ32-NEXT: 00000008 <.rodata>:
+;CHECKOBJ64-NEXT: 0000000000000008 <.rodata>:
 ;CHECKOBJ-NEXT:       8: 68 65 6c 6c                   xori 5, 3, 27756
 ;CHECKOBJ-NEXT:       c: 6f 77 6f 72 xoris 23, 27, 28530
 ;CHECKOBJ-NEXT:      10: 0a 00 00 00 tdlti 0, 0{{[[:space:]] *}}
 ;CHECKOBJ-NEXT:   Disassembly of section .data:{{[[:space:]] *}}
 ;CHECKOBJ32-NEXT: 00000018 <a>:
 ;CHECKOBJ64-NEXT: 0000000000000018 <a>:
 ;CHECKOBJ-NEXT:      18: 00 01 23 45                   <unknown>
 ;CHECKOBJ-NEXT:      1c: 67 8a bc de                   oris 10, 28, 48350{{[[:space:]] *}}

llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll

 ; CHECK-NEXT:         .align  2
 ; CHECK-NEXT:         .vbyte  4, 35                           # 0x23
 ; CHECK-NEXT:         .csect const_ivar[RO],2
 ; CHECK-NEXT:         .globl  const_ivar[RO]
 ; CHECK-NEXT:         .align  2
 ; CHECK-NEXT:         .vbyte  4, 35                           # 0x23
 ; CHECK-NEXT:         .comm   a[RW],4,2
 ; CHECK-NEXT:         .comm   f[RW],4,2
-; CHECK-NEXT:         .csect .rodata.str1.1L...str[RO],2
+; CHECK-NEXT:         .csect L...str[RO],2
 ; CHECK-NEXT:         .string "abcdefgh"
 ; CHECK32:            .csect p[RW],2
 ; CHECK32-NEXT:       .globl  p[RW]
 ; CHECK32-NEXT:       .align  2
-; CHECK32-NEXT:       .vbyte  4, .rodata.str1.1L...str[RO]
+; CHECK32-NEXT:       .vbyte  4, L...str[RO]
 ; CHECK64:            .csect p[RW],3
 ; CHECK64-NEXT:       .globl  p[RW]
 ; CHECK64-NEXT:       .align  3
-; CHECK64-NEXT:       .vbyte  8, .rodata.str1.1L...str[RO]
+; CHECK64-NEXT:       .vbyte  8, L...str[RO]
 ; CHECK:              .toc
 ; CHECK-NEXT: L..C0:
 ; CHECK-NEXT:         .tc p[TC],p[RW]
 ; CHECK-NEXT: L..C1:
 ; CHECK-NEXT:         .tc ivar[TC],ivar[RW]
 ; CHECK-NEXT: L..C2:
 ; CHECK-NEXT:         .tc a[TC],a[RW]
 ; CHECK-NEXT: L..C3:
 ; CHECK-NEXT:         .tc f[TC],f[RW]
 
 ; CHECKOBJ:        00000038 (idx: 7) const_ivar[RO]:
 ; CHECKOBJ-NEXT:         38: 00 00 00 23   <unknown>
 ; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT:   0000003c (idx: 9) .rodata.str1.1L...str[RO]:
+; CHECKOBJ-NEXT:   0000003c (idx: 9) L...str[RO]:
 ; CHECKOBJ-NEXT:         3c: 61 62 63 64
 ; CHECKOBJ-NEXT:         40: 65 66 67 68
 ; CHECKOBJ-NEXT:         44: 00 00 00 00   <unknown>
 ; CHECKOBJ-EMPTY:
 ; CHECKOBJ-NEXT:   Disassembly of section .data:
 ; CHECKOBJ-EMPTY:
 ; CHECKOBJ-NEXT:   00000048 (idx: 11) ivar[RW]:
 ; CHECKOBJ-NEXT:         48: 00 00 00 23   <unknown>

 ; CHECKSYM:        SymbolAlignmentLog2: 2
 ; CHECKSYM:        SymbolType: XTY_SD (0x1)
 ; CHECKSYM:        StorageMappingClass: XMC_RO (0x1)
 ; CHECKSYM:        StabInfoIndex: 0x0
 ; CHECKSYM:        StabSectNum: 0x0
 ; CHECKSYM:      }
 ; CHECKSYM:    }
 ; CHECKSYM:    Symbol {
-; CHECKSYM:      Name: .rodata.str1.1L...str
+; CHECKSYM:      Name: L...str
 ; CHECKSYM:      Value (RelocatableAddress): 0x3C
 ; CHECKSYM:      Section: .text
 ; CHECKSYM:      Type: 0x0
 ; CHECKSYM:      StorageClass: C_HIDEXT (0x6B)
 ; CHECKSYM:      NumberOfAuxEntries: 1
 ; CHECKSYM:      CSECT Auxiliary Entry {
 ; CHECKSYM:        SectionLen: 9
 ; CHECKSYM:        ParameterHashIndex: 0x0

llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll

 
 @magic16 = private unnamed_addr constant [4 x i16] [i16 264, i16 272, i16 213, i16 0], align 2
 @magic32 =  private unnamed_addr constant [4 x i32] [i32 464, i32 472, i32 413, i32 0], align 4
 @strA = private unnamed_addr constant [14 x i8] c"hello world!\0A\00", align 1
 @.str = private unnamed_addr constant [9 x i8] c"abcdefgh\00", align 1
 @p = global ptr @.str, align 4
 
 ; Function Attrs: noinline nounwind optnone
 define i8 @foo() #0 {
 entry:
   %0 = load ptr, ptr @p, align 4
   %1 = load i8, ptr %0, align 1
   ret i8 %1
 }
 
-; CHECK:   .csect .rodata.str2.2[RO],2
+; CHECK:   .csect .rodata[RO],2
 ; CHECK-NEXT:   .align  1
 ; CHECK-NEXT: L..magic16:
 ; CHECK-NEXT:   .vbyte  2, 264                     # 0x108
 ; CHECK-NEXT:   .vbyte  2, 272                     # 0x110
 ; CHECK-NEXT:   .vbyte  2, 213                     # 0xd5
 ; CHECK-NEXT:   .vbyte  2, 0                       # 0x0
-; CHECK-NEXT:   .csect .rodata.str4.4[RO],2
 ; CHECK-NEXT:   .align  2
 ; CHECK-NEXT: L..magic32:
 ; CHECK-NEXT:   .vbyte  4, 464                     # 0x1d0
 ; CHECK-NEXT:   .vbyte  4, 472                     # 0x1d8
 ; CHECK-NEXT:   .vbyte  4, 413                     # 0x19d
 ; CHECK-NEXT:   .vbyte  4, 0                       # 0x0
-; CHECK-NEXT:   .csect .rodata.str1.1[RO],2
 ; CHECK-NEXT: L..strA:
 ; CHECK-NEXT: .byte   'h,'e,'l,'l,'o,' ,'w,'o,'r,'l,'d,'!,0012,0000
 ; CHECK-NEXT: L...str:
 ; CHECK-NEXT: .string "abcdefgh"
 
-; CHECKOBJ:     00000010 <.rodata.str2.2>:
+; CHECKOBJ:     00000010 <.rodata>:
 ; CHECKOBJ-NEXT:       10: 01 08 01 10
-; CHECKOBJ-NEXT:       14: 00 d5 00 00    {{.*}}{{[[:space:]] *}}
-; CHECKOBJ-NEXT: 00000018 <.rodata.str4.4>:
+; CHECKOBJ-NEXT:       14: 00 d5 00 00
 ; CHECKOBJ-NEXT:       18: 00 00 01 d0
 ; CHECKOBJ-NEXT:       1c: 00 00 01 d8
 ; CHECKOBJ-NEXT:       20: 00 00 01 9d
-; CHECKOBJ-NEXT:       24: 00 00 00 00    {{.*}}{{[[:space:]] *}}
-; CHECKOBJ-NEXT: 00000028 <.rodata.str1.1>:
+; CHECKOBJ-NEXT:       24: 00 00 00 00
 ; CHECKOBJ-NEXT:       28: 68 65 6c 6c
 ; CHECKOBJ-NEXT:       2c: 6f 20 77 6f
 ; CHECKOBJ-NEXT:       30: 72 6c 64 21
 ; CHECKOBJ-NEXT:       34: 0a 00 61 62
 ; CHECKOBJ-NEXT:       38: 63 64 65 66
 ; CHECKOBJ-NEXT:       3c: 67 68 00 00

llvm/test/tools/llvm-objdump/XCOFF/symbol-table.test

 }
 
 ; SYM:      SYMBOL TABLE:
 ; SYM-NEXT: 00000000      df *DEBUG*    00000000 <stdin>
 ; SYM-NEXT: 00000000         *UND*      00000000 ei
 ; SYM-NEXT: 00000000 l       .text      00000091 
 ; SYM-NEXT: 00000000 g     F .text (csect: )       00000000 .bar
 ; SYM-NEXT: 00000050 g     F .text (csect: )       00000000 .foo
-; SYM-NEXT: 00000094 l       .text      00000013 .rodata.str1.1L...str
+; SYM-NEXT: 00000094 l       .text      00000013 L...str
 ; SYM-NEXT: 000000a8 g     O .data      00000004 con
 ; SYM-NEXT: 000000ac  w    O .data      00000004 wi
 ; SYM-NEXT: 000000b0 g     O .data      00000004 i
 ; SYM-NEXT: 000000b4 g     O .data      00000001 c
 ; SYM-NEXT: 000000b8 g     O .data      00000004 ap
 ; SYM-NEXT: 000000bc g     O .data      00000004 f
 ; SYM-NEXT: 000000c0 g     O .data      00000008 ll
 ; SYM-NEXT: 000000c8 g     O .data      0000000c bar
 ; SYM-NEXT: 000000d4 g     O .data      0000000c foo
 ; SYM-NEXT: 000000e0 l       .data      00000000 TOC
 ; SYM-NEXT: 000000e0 l     O .data      00000004 si
 ; SYM-NEXT: 000000e4 l     O .data      00000004 ei
 ; SYM-NEXT: 000000e8 l     O .data      00000004 con
 ; SYM-NEXT: 000000ec l     O *COM*      00000004 si
 
 ; SYM-DES:      SYMBOL TABLE:
 ; SYM-DES-NEXT: 00000000      df *DEBUG*    00000000 (idx: 0) <stdin>
 ; SYM-DES-NEXT: 00000000         *UND*      00000000 (idx: 1) ei[UA]
 ; SYM-DES-NEXT: 00000000 l       .text      00000091 (idx: 3) [PR]
 ; SYM-DES-NEXT: 00000000 g     F .text (csect: (idx: 3) [PR])  00000000 (idx: 5) .bar
 ; SYM-DES-NEXT: 00000050 g     F .text (csect: (idx: 3) [PR])  00000000 (idx: 7) .foo
-; SYM-DES-NEXT: 00000094 l       .text      00000013 (idx: 9) .rodata.str1.1L...str[RO]
+; SYM-DES-NEXT: 00000094 l       .text      00000013 (idx: 9) L...str[RO]
 ; SYM-DES-NEXT: 000000a8 g     O .data      00000004 (idx: 11) con[RW]
 ; SYM-DES-NEXT: 000000ac  w    O .data      00000004 (idx: 13) wi[RW]
 ; SYM-DES-NEXT: 000000b0 g     O .data      00000004 (idx: 15) i[RW]
 ; SYM-DES-NEXT: 000000b4 g     O .data      00000001 (idx: 17) c[RW]
 ; SYM-DES-NEXT: 000000b8 g     O .data      00000004 (idx: 19) ap[RW]
 ; SYM-DES-NEXT: 000000bc g     O .data      00000004 (idx: 21) f[RW]
 ; SYM-DES-NEXT: 000000c0 g     O .data      00000008 (idx: 23) ll[RW]
 ; SYM-DES-NEXT: 000000c8 g     O .data      0000000c (idx: 25) bar[DS]
 ; SYM-DES-NEXT: 000000d4 g     O .data      0000000c (idx: 27) foo[DS]
 ; SYM-DES-NEXT: 000000e0 l       .data      00000000 (idx: 29) TOC[TC0]
 ; SYM-DES-NEXT: 000000e0 l     O .data      00000004 (idx: 31) si[TC]
 ; SYM-DES-NEXT: 000000e4 l     O .data      00000004 (idx: 33) ei[TC]
 ; SYM-DES-NEXT: 000000e8 l     O .data      00000004 (idx: 35) con[TC]
 ; SYM-DES-NEXT: 000000ec l     O *COM*      00000004 (idx: 37) si[BS]