[AMDGPU] Add patterns for v_dot*_IU for GFX11

[jrbyrnes]

Summary

Due to naming, it appears we don't actually try to select these instructions. In general, selection for dot instructions (specifically the dot4 variants) is a bit fragile, and I plan to rework lowering via combining to make selection more robust. For now, we should at least try to select them.

[arsenm]

We used to pattern match all the dot operations, but stopped because of a ridiculous blow up in compile time. Have you tried measuring that?

[arsenm]

In D155868#4519799, @arsenm wrote:

We used to pattern match all the dot operations, but stopped because of a ridiculous blow up in compile time. Have you tried measuring that?

Also look at the generated selection tables. This shouldn't be one of the first patterns tried

[jrbyrnes]

In D155868#4519802, @arsenm wrote:

In D155868#4519799, @arsenm wrote:

We used to pattern match all the dot operations, but stopped because of a ridiculous blow up in compile time. Have you tried measuring that?

Also look at the generated selection tables. This shouldn't be one of the first patterns tried

I'll take a look.

I have not directly measured compile time of this patch, but I will. I was thinking of deleting these patterns as they are supported by DAGCombining -- which shouldn't be too expensive with early exits on missed V_MUL_*24 operands. Worth mentioning is that there is also a huge compile time cost for not selecting into these instructions when we should -- we are seeing kernels getting stuck in RA for hours due to code bloat.

[jrbyrnes]

Will abandon if https://reviews.llvm.org/D155995 supersedes selection of these instructions.

[arsenm]

This is better than the combiner - if it doesn't completely blow up compile time. It's probably easier to avoid the compile time problems with the combine though

[jrbyrnes]

In D155868#4614117, @arsenm wrote:

This is better than the combiner - if it doesn't completely blow up compile time. It's probably easier to avoid the compile time problems with the combine though

The main problem is the amount of permutations that can occur in extract code. I haven't tired implementing in TableGen and measuring, but I would assume that trying to pattern match them all with tablegen would blow up compile time.

[jrbyrnes]

Abandon in favor of https://reviews.llvm.org/D155995

llvm/lib/Target/AMDGPU/VOP3PInstructions.td

def : GCNPat < (intrinsic_node (DotIUVOP3PMods i32:$src0_mods), i32:$src0,
                                            $src1_mods, i32:$src1,
                                            (i32 8), i32:$src2, i1:$clamp)
   >;
 }
 
 let SubtargetPredicate = HasDot8Insts  in {
 defm V_DOT4_I32_IU8 : VOP3PDOTIUInst<"v_dot4_i32_iu8", int_amdgcn_sudot4>;
 defm V_DOT8_I32_IU4 : VOP3PDOTIUInst<"v_dot8_i32_iu4", int_amdgcn_sudot8>;
+
+let SubtargetPredicate = !cast<VOP_Pseudo>("V_DOT4_I32_IU8").SubtargetPredicate in
+def : GCNPat <
+  !cast<dag>(!foldl((i32 i32:$src2), [0, 1, 2, 3], lhs, y,
+                    (add_oneuse lhs, (!cast<PatFrag>("MulI_Elt"#y) i32:$src0, i32:$src1)))),
+  (!cast<VOP3P_Pseudo>("V_DOT4_I32_IU8") (i32 8), $src0, (i32 8), $src1, (i32 8), $src2, (i1 0))>;
+
+
+let SubtargetPredicate = !cast<VOP_Pseudo>("V_DOT8_I32_IU4").SubtargetPredicate in
+def : GCNPat <
+  !cast<dag>(!foldl((add_oneuse i32:$src2, (!cast<PatFrag>("MulI0_4bit") i32:$src0, i32:$src1)),
+                    [1, 2, 3, 4, 5, 6, 7], lhs, y,
+                    (NonACAdd_oneuse lhs, (!cast<PatFrag>("MulI"#y#"_4bit") i32:$src0, i32:$src1)))),
+  (!cast<VOP3P_Pseudo>("V_DOT8_I32_IU4") (i32 8), $src0, (i32 8), $src1, (i32 8), $src2, (i1 0))>;
+
+
+let SubtargetPredicate = !cast<VOP_Pseudo>("V_DOT8_I32_IU4").SubtargetPredicate in
+def : GCNPat <
+  !cast<dag>(!foldl((add_oneuse i32:$src2, (!cast<PatFrag>("MulI0_4bit") i32:$src0, i32:$src1)),
+                    [7, 1, 2, 3, 4, 5, 6], lhs, y,
+                    (NonACAdd_oneuse lhs, (!cast<PatFrag>("MulI"#y#"_4bit") i32:$src0, i32:$src1)))),
+  (!cast<VOP3P_Pseudo>("V_DOT8_I32_IU4") (i32 8), $src0, (i32 8), $src1, (i32 8), $src2, (i1 0))>;
 } // End SubtargetPredicate = HasDot8Insts
 
 def : UDot2Pat<V_DOT2_U32_U16>;
 def : SDot2Pat<V_DOT2_I32_I16>;
 
 foreach Type = ["U", "I"] in
   let SubtargetPredicate = !cast<VOP_Pseudo>("V_DOT4_"#Type#"32_"#Type#8).SubtargetPredicate in
   def : GCNPat <

llvm/test/CodeGen/AMDGPU/idot4s.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX7 %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX8 %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9-NODL %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9-DL %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10-DL %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10-DL %s
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11-DL %s
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1101 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11-DL %s
 
 define amdgpu_kernel void @idot4_acc32(ptr addrspace(1) %src1,
 ; GFX7-LABEL: idot4_acc32:
 ; GFX7:       ; %bb.0: ; %entry
 ; GFX7-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
 ; GFX7-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0xd
 ; GFX7-NEXT:    s_mov_b32 s3, 0xf000
 ; GFX7-NEXT:    s_mov_b32 s10, 0

 ; GFX10-DL-NEXT:    global_load_dword v1, v0, s[4:5]
 ; GFX10-DL-NEXT:    global_load_dword v2, v0, s[6:7]
 ; GFX10-DL-NEXT:    v_mov_b32_e32 v0, 0
 ; GFX10-DL-NEXT:    s_load_dword s2, s[0:1], 0x0
 ; GFX10-DL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 ; GFX10-DL-NEXT:    v_dot4_i32_i8 v1, v1, v2, s2
 ; GFX10-DL-NEXT:    global_store_dword v0, v1, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: idot4_acc32:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
+; GFX11-DL-NEXT:    v_dot4_i32_iu8 v0, v1, v0, s2
+; GFX11-DL-NEXT:    global_store_b32 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                        ptr addrspace(1) %src2,
                                        ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v2, 24, v2
 ; GFX10-DL-NEXT:    v_mad_u16 v3, v5, v6, v3
 ; GFX10-DL-NEXT:    v_bfe_i32 v1, v1, 0, 8
 ; GFX10-DL-NEXT:    v_bfe_i32 v2, v2, 0, 8
 ; GFX10-DL-NEXT:    v_mad_u16 v3, v4, v7, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v1, v1, v2, v3
 ; GFX10-DL-NEXT:    global_store_short v0, v1, s[2:3]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: idot4_acc16:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u16 v3, v2, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_bfe_i32 v4, v1, 0, 8
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 8, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v6, 8, v0
+; GFX11-DL-NEXT:    v_bfe_i32 v7, v0, 0, 8
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v8, 16, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v9, 16, v0
+; GFX11-DL-NEXT:    v_bfe_i32 v5, v5, 0, 8
+; GFX11-DL-NEXT:    v_bfe_i32 v6, v6, 0, 8
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v7, v3
+; GFX11-DL-NEXT:    v_bfe_i32 v4, v8, 0, 8
+; GFX11-DL-NEXT:    v_bfe_i32 v7, v9, 0, 8
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 24, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 24, v0
+; GFX11-DL-NEXT:    v_mad_u16 v3, v5, v6, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_bfe_i32 v1, v1, 0, 8
+; GFX11-DL-NEXT:    v_bfe_i32 v0, v0, 0, 8
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v7, v3
+; GFX11-DL-NEXT:    v_mad_u16 v0, v1, v0, v3
+; GFX11-DL-NEXT:    global_store_b16 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                        ptr addrspace(1) %src2,
                                        ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v7, 16, v3
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v2, 24, v2
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v3, 24, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v0, v5, v4
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v6, v7, v0
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v2, v3, v0
 ; GFX10-DL-NEXT:    global_store_byte v1, v0, s[2:3]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: idot4_acc8:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v0, 2, v0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v2, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u8 v3, v1, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v4, 8, v2
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 8, v0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v2, v0, v3
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v6, 16, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v7, 16, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v2, 24, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 24, v0
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    v_mad_u16 v0, v2, v0, v3
+; GFX11-DL-NEXT:    global_store_b8 v1, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                       ptr addrspace(1) %src2,
                                       ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_mad_i32_i24 v0, v0, v3, s2
 ; GFX10-DL-NEXT:    v_mul_i32_i24_sdwa v3, sext(v1), sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:BYTE_2
 ; GFX10-DL-NEXT:    v_mul_i32_i24_sdwa v1, sext(v1), sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:BYTE_3
 ; GFX10-DL-NEXT:    v_mov_b32_e32 v2, 0
 ; GFX10-DL-NEXT:    v_add3_u32 v0, v4, v0, v5
 ; GFX10-DL-NEXT:    v_add3_u32 v0, v0, v3, v1
 ; GFX10-DL-NEXT:    global_store_dword v2, v0, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: idot4_multiuse_mul1:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_bfe_i32 v2, v1, 0, 8
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_bfe_i32 v3, v0, 0, 8
+; GFX11-DL-NEXT:    v_bfe_i32 v4, v1, 8, 8
+; GFX11-DL-NEXT:    v_bfe_i32 v5, v0, 8, 8
+; GFX11-DL-NEXT:    v_bfe_i32 v6, v1, 16, 8
+; GFX11-DL-NEXT:    v_bfe_i32 v7, v0, 16, 8
+; GFX11-DL-NEXT:    v_ashrrev_i32_e32 v1, 24, v1
+; GFX11-DL-NEXT:    v_ashrrev_i32_e32 v0, 24, v0
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v8, v2, v3
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v4, v4, v5
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    v_mad_i32_i24 v2, v2, v3, s2
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v3, v6, v7
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v0, v1, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_add3_u32 v1, v4, v2, v8
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    v_add3_u32 v0, v1, v3, v0
+; GFX11-DL-NEXT:    global_store_b32 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                                ptr addrspace(1) %src2,
                                                ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_mul_i32_i24_sdwa v3, sext(v1), sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:BYTE_2
 ; GFX10-DL-NEXT:    v_mul_i32_i24_sdwa v1, sext(v1), sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:BYTE_3
 ; GFX10-DL-NEXT:    v_mov_b32_e32 v2, 0
 ; GFX10-DL-NEXT:    s_waitcnt lgkmcnt(0)
 ; GFX10-DL-NEXT:    v_add3_u32 v0, v4, s2, v0
 ; GFX10-DL-NEXT:    v_add3_u32 v0, v0, v3, v1
 ; GFX10-DL-NEXT:    global_store_dword v2, v0, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: idot4_acc32_vecMul:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b16 v2, 8, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_lshrrev_b16 v3, 8, v0
+; GFX11-DL-NEXT:    v_bfe_i32 v5, v1, 0, 8
+; GFX11-DL-NEXT:    v_bfe_i32 v6, v0, 0, 8
+; GFX11-DL-NEXT:    v_ashrrev_i32_e32 v4, 24, v1
+; GFX11-DL-NEXT:    v_bfe_i32 v2, v2, 0, 8
+; GFX11-DL-NEXT:    v_bfe_i32 v3, v3, 0, 8
+; GFX11-DL-NEXT:    v_bfe_i32 v1, v1, 16, 8
+; GFX11-DL-NEXT:    v_ashrrev_i32_e32 v7, 24, v0
+; GFX11-DL-NEXT:    v_bfe_i32 v0, v0, 16, 8
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v5, v5, v6
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v2, v2, v3
+; GFX11-DL-NEXT:    v_mov_b32_e32 v3, 0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v0, v1, v0
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v1, v4, v7
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    v_add3_u32 v2, v5, s2, v2
+; GFX11-DL-NEXT:    v_add3_u32 v0, v2, v0, v1
+; GFX11-DL-NEXT:    global_store_b32 v3, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                               ptr addrspace(1) %src2,
                                               ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_add_nc_u16 v3, v4, v3
 ; GFX10-DL-NEXT:    v_pk_mul_lo_u16 v1, v1, v2
 ; GFX10-DL-NEXT:    v_add_nc_u16 v2, v3, v5
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
 ; GFX10-DL-NEXT:    v_add_nc_u16 v1, v2, v1
 ; GFX10-DL-NEXT:    v_add_nc_u16 v1, v1, v3
 ; GFX10-DL-NEXT:    global_store_short v0, v1, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: idot4_acc16_vecMul:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u16 v3, v2, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_ashrrev_i16 v4, 8, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_ashrrev_i16 v5, 8, v0
+; GFX11-DL-NEXT:    v_bfe_i32 v6, v0, 0, 8
+; GFX11-DL-NEXT:    v_bfe_i32 v7, v1, 0, 8
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-DL-NEXT:    v_perm_b32 v5, v5, v6, 0x5040100
+; GFX11-DL-NEXT:    v_perm_b32 v4, v4, v7, 0x5040100
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-DL-NEXT:    v_ashrrev_i16 v6, 8, v1
+; GFX11-DL-NEXT:    v_ashrrev_i16 v7, 8, v0
+; GFX11-DL-NEXT:    v_bfe_i32 v0, v0, 0, 8
+; GFX11-DL-NEXT:    v_bfe_i32 v1, v1, 0, 8
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v4, v4, v5
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_perm_b32 v0, v7, v0, 0x5040100
+; GFX11-DL-NEXT:    v_perm_b32 v1, v6, v1, 0x5040100
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 16, v4
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v4, v3
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v0, v1, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_add_nc_u16 v1, v3, v5
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v1, v0
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v0, v3
+; GFX11-DL-NEXT:    global_store_b16 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                               ptr addrspace(1) %src2,
                                               ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

llvm/test/CodeGen/AMDGPU/idot4u.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX7 %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX8 %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9-NODL %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9-DL %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10-DL %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10-DL %s
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11-DL %s
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1101 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11-DL %s
 
 define amdgpu_kernel void @udot4_acc32(ptr addrspace(1) %src1,
 ; GFX7-LABEL: udot4_acc32:
 ; GFX7:       ; %bb.0: ; %entry
 ; GFX7-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
 ; GFX7-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0xd
 ; GFX7-NEXT:    s_mov_b32 s3, 0xf000
 ; GFX7-NEXT:    s_mov_b32 s10, 0

 ; GFX10-DL-NEXT:    global_load_dword v1, v0, s[4:5]
 ; GFX10-DL-NEXT:    global_load_dword v2, v0, s[6:7]
 ; GFX10-DL-NEXT:    v_mov_b32_e32 v0, 0
 ; GFX10-DL-NEXT:    s_load_dword s2, s[0:1], 0x0
 ; GFX10-DL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 ; GFX10-DL-NEXT:    v_dot4_u32_u8 v1, v1, v2, s2
 ; GFX10-DL-NEXT:    global_store_dword v0, v1, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot4_acc32:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
+; GFX11-DL-NEXT:    v_dot4_u32_u8 v0, v1, v0, s2
+; GFX11-DL-NEXT:    global_store_b32 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                        ptr addrspace(1) %src2,
                                        ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_and_b32_sdwa v7, v2, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v1, 24, v1
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v2, 24, v2
 ; GFX10-DL-NEXT:    v_mad_u16 v3, v5, v6, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v3, v4, v7, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v1, v1, v2, v3
 ; GFX10-DL-NEXT:    global_store_short v0, v1, s[2:3]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot4_acc16:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_and_b32_e32 v4, 0xff, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_and_b32_e32 v7, 0xff, v0
+; GFX11-DL-NEXT:    global_load_u16 v3, v2, s[0:1]
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 8, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v6, 8, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v8, 16, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v9, 16, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 24, v1
+; GFX11-DL-NEXT:    v_and_b32_e32 v5, 0xff, v5
+; GFX11-DL-NEXT:    v_and_b32_e32 v6, 0xff, v6
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 24, v0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v7, v3
+; GFX11-DL-NEXT:    v_and_b32_e32 v4, 0xff, v8
+; GFX11-DL-NEXT:    v_and_b32_e32 v7, 0xff, v9
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v5, v6, v3
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v7, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v0, v1, v0, v3
+; GFX11-DL-NEXT:    global_store_b16 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                        ptr addrspace(1) %src2,
                                        ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v7, 16, v3
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v2, 24, v2
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v3, 24, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v0, v5, v4
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v6, v7, v0
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v2, v3, v0
 ; GFX10-DL-NEXT:    global_store_byte v1, v0, s[2:3]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot4_acc8:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v0, 2, v0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v2, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u8 v3, v1, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v4, 8, v2
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 8, v0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v2, v0, v3
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v6, 16, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v7, 16, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v2, 24, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 24, v0
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    v_mad_u16 v0, v2, v0, v3
+; GFX11-DL-NEXT:    global_store_b8 v1, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                       ptr addrspace(1) %src2,
                                       ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v0, 8, v2
 ; GFX10-DL-NEXT:    s_waitcnt vmcnt(1)
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v5, 8, v3
 ; GFX10-DL-NEXT:    s_waitcnt vmcnt(0)
 ; GFX10-DL-NEXT:    v_mad_u16 v2, v2, v3, v4
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v0, v5, v2
 ; GFX10-DL-NEXT:    global_store_byte v1, v0, s[2:3]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot2_8:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v0, 2, v0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v2, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u8 v3, v1, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v4, 8, v2
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 8, v0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_mad_u16 v0, v2, v0, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v0, v4, v5, v0
+; GFX11-DL-NEXT:    global_store_b8 v1, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                    ptr addrspace(1) %src2,
                                    ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v7, 16, v3
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v2, 24, v2
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v3, 24, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v5, v0, v4
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v7, v6, v0
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v3, v2, v0
 ; GFX10-DL-NEXT:    global_store_byte v1, v0, s[2:3]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot4_CommutationInsideMAD:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v0, 2, v0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v2, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u8 v3, v1, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v4, 8, v2
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 8, v0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v0, v2, v3
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v6, 16, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v7, 16, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v2, 24, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 24, v0
+; GFX11-DL-NEXT:    v_mad_u16 v3, v5, v4, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v7, v6, v3
+; GFX11-DL-NEXT:    v_mad_u16 v0, v0, v2, v3
+; GFX11-DL-NEXT:    global_store_b8 v1, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                                       ptr addrspace(1) %src2,
                                                       ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v5, 16, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v3, v2, v0
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v2, 24, v2
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v3, 24, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v5, v4, v0
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v3, v2, v0
 ; GFX10-DL-NEXT:    global_store_byte v1, v0, s[2:3]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot4_CommutationAccrossMADs:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v0, 2, v0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v2, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u8 v3, v1, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v4, 8, v2
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 8, v0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v5, v4, v3
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v4, 16, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 16, v0
+; GFX11-DL-NEXT:    v_mad_u16 v3, v0, v2, v3
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v2, 24, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 24, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v5, v4, v3
+; GFX11-DL-NEXT:    v_mad_u16 v0, v0, v2, v3
+; GFX11-DL-NEXT:    global_store_b8 v1, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                                         ptr addrspace(1) %src2,
                                                         ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_mad_u32_u24 v0, v0, v3, s2
 ; GFX10-DL-NEXT:    v_mul_u32_u24_sdwa v3, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:BYTE_2
 ; GFX10-DL-NEXT:    v_mul_u32_u24_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:BYTE_3
 ; GFX10-DL-NEXT:    v_mov_b32_e32 v2, 0
 ; GFX10-DL-NEXT:    v_add3_u32 v0, v4, v0, v5
 ; GFX10-DL-NEXT:    v_add3_u32 v0, v0, v3, v1
 ; GFX10-DL-NEXT:    global_store_dword v2, v0, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot4_multiuse_mul1:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_and_b32_e32 v2, 0xff, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_and_b32_e32 v3, 0xff, v0
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v1, 8, 8
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v0, 8, 8
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v1, 16, 8
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 16, 8
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 24, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 24, v0
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v8, v2, v3
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v4, v4, v5
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    v_mad_u32_u24 v2, v2, v3, s2
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v3, v6, v7
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v0, v1, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_add3_u32 v1, v4, v2, v8
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    v_add3_u32 v0, v1, v3, v0
+; GFX11-DL-NEXT:    global_store_b32 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                                ptr addrspace(1) %src2,
                                                ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_mul_u32_u24_sdwa v3, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:BYTE_2
 ; GFX10-DL-NEXT:    v_mul_u32_u24_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:BYTE_3
 ; GFX10-DL-NEXT:    v_add_nc_u32_e32 v2, s2, v0
 ; GFX10-DL-NEXT:    v_add3_u32 v0, v0, v4, v3
 ; GFX10-DL-NEXT:    v_mov_b32_e32 v3, 0
 ; GFX10-DL-NEXT:    v_add3_u32 v0, v0, v1, v2
 ; GFX10-DL-NEXT:    global_store_dword v3, v0, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot4_multiuse_add1:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_and_b32_e32 v2, 0xff, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_and_b32_e32 v3, 0xff, v0
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v1, 8, 8
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v0, 8, 8
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v1, 16, 8
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 16, 8
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 24, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 24, v0
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v2, v2, v3
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    v_mad_u32_u24 v3, v4, v5, s2
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v4, v6, v7
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v0, v1, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_add_nc_u32_e32 v1, s2, v3
+; GFX11-DL-NEXT:    v_add3_u32 v2, v3, v2, v4
+; GFX11-DL-NEXT:    v_mov_b32_e32 v3, 0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_add3_u32 v0, v2, v0, v1
+; GFX11-DL-NEXT:    global_store_b32 v3, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                                ptr addrspace(1) %src2,
                                                ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_and_b32_sdwa v5, v2, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v1, 24, v1
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v2, 24, v2
 ; GFX10-DL-NEXT:    v_mad_u16 v3, v6, v8, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v1, v1, v2, v3
 ; GFX10-DL-NEXT:    global_store_short v0, v1, s[2:3]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: notdot4_mixedtypes:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v4, 8, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 8, v0
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v6, 16, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v7, 16, v0
+; GFX11-DL-NEXT:    v_and_b32_e32 v4, 0xff, v4
+; GFX11-DL-NEXT:    v_and_b32_e32 v5, 0xff, v5
+; GFX11-DL-NEXT:    global_load_u16 v3, v2, s[0:1]
+; GFX11-DL-NEXT:    v_bfe_i32 v8, v1, 0, 8
+; GFX11-DL-NEXT:    v_bfe_i32 v9, v0, 0, 8
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 24, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 24, v0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_and_b32_e32 v4, 0xff, v6
+; GFX11-DL-NEXT:    v_and_b32_e32 v5, 0xff, v7
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v8, v9, v3
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v0, v1, v0, v3
+; GFX11-DL-NEXT:    global_store_b16 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                               ptr addrspace(1) %src2,
                                               ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_mul_u32_u24_sdwa v3, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:BYTE_2
 ; GFX10-DL-NEXT:    v_mul_u32_u24_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:BYTE_3
 ; GFX10-DL-NEXT:    v_mov_b32_e32 v2, 0
 ; GFX10-DL-NEXT:    s_waitcnt lgkmcnt(0)
 ; GFX10-DL-NEXT:    v_add3_u32 v0, v4, s2, v0
 ; GFX10-DL-NEXT:    v_add3_u32 v0, v0, v3, v1
 ; GFX10-DL-NEXT:    global_store_dword v2, v0, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot4_acc32_vecMul:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b16 v2, 8, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_lshrrev_b16 v3, 8, v0
+; GFX11-DL-NEXT:    v_and_b32_e32 v5, 0xff, v1
+; GFX11-DL-NEXT:    v_and_b32_e32 v6, 0xff, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v4, 24, v1
+; GFX11-DL-NEXT:    v_and_b32_e32 v2, 0xffff, v2
+; GFX11-DL-NEXT:    v_and_b32_e32 v3, 0xffff, v3
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v7, 24, v0
+; GFX11-DL-NEXT:    v_bfe_u32 v1, v1, 16, 8
+; GFX11-DL-NEXT:    v_bfe_u32 v0, v0, 16, 8
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v5, v5, v6
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v2, v2, v3
+; GFX11-DL-NEXT:    v_mov_b32_e32 v3, 0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v0, v1, v0
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v1, v4, v7
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    v_add3_u32 v2, v5, s2, v2
+; GFX11-DL-NEXT:    v_add3_u32 v0, v2, v0, v1
+; GFX11-DL-NEXT:    global_store_b32 v3, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                               ptr addrspace(1) %src2,
                                               ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_add_nc_u16 v3, v4, v3
 ; GFX10-DL-NEXT:    v_pk_mul_lo_u16 v1, v1, v2
 ; GFX10-DL-NEXT:    v_add_nc_u16 v2, v3, v5
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
 ; GFX10-DL-NEXT:    v_add_nc_u16 v1, v2, v1
 ; GFX10-DL-NEXT:    v_add_nc_u16 v1, v1, v3
 ; GFX10-DL-NEXT:    global_store_short v0, v1, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot4_acc16_vecMul:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_dual_mov_b32 v2, 0 :: v_dual_and_b32 v7, 0xff, v1
+; GFX11-DL-NEXT:    global_load_u16 v3, v2, s[0:1]
+; GFX11-DL-NEXT:    v_lshrrev_b16 v4, 8, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b16 v5, 8, v0
+; GFX11-DL-NEXT:    v_and_b32_e32 v6, 0xff, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v8, 16, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v9, 16, v0
+; GFX11-DL-NEXT:    v_perm_b32 v4, v4, v7, 0x5040100
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 24, v1
+; GFX11-DL-NEXT:    v_perm_b32 v5, v5, v6, 0x5040100
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 24, v0
+; GFX11-DL-NEXT:    v_and_b32_e32 v6, 0xff, v9
+; GFX11-DL-NEXT:    v_and_b32_e32 v7, 0xff, v8
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v4, v4, v5
+; GFX11-DL-NEXT:    v_perm_b32 v0, v0, v6, 0x5040100
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_perm_b32 v1, v1, v7, 0x5040100
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 16, v4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v0, v1, v0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v4, v3
+; GFX11-DL-NEXT:    v_add_nc_u16 v1, v3, v5
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v1, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v0, v3
+; GFX11-DL-NEXT:    global_store_b16 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                               ptr addrspace(1) %src2,
                                               ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v2, 8, v4
 ; GFX10-DL-NEXT:    v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v5, 8, v5
 ; GFX10-DL-NEXT:    v_add_nc_u16 v1, v1, v5
 ; GFX10-DL-NEXT:    v_mad_u16 v1, v7, v8, v1
 ; GFX10-DL-NEXT:    v_add_nc_u16 v1, v1, v2
 ; GFX10-DL-NEXT:    global_store_byte v0, v1, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot4_acc8_vecMul:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u8 v3, v2, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v4, 16, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 24, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v6, 24, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v7, 16, v0
+; GFX11-DL-NEXT:    v_lshrrev_b16 v8, 8, v1
+; GFX11-DL-NEXT:    v_lshrrev_b16 v9, 8, v0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_mad_u16 v0, v1, v0, v3
+; GFX11-DL-NEXT:    v_mul_lo_u16 v5, v5, v6
+; GFX11-DL-NEXT:    v_mul_lo_u16 v6, v4, v7
+; GFX11-DL-NEXT:    v_mul_lo_u16 v8, v8, v9
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_lshlrev_b16 v5, 8, v5
+; GFX11-DL-NEXT:    v_and_b32_e32 v6, 0xff, v6
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_lshlrev_b16 v8, 8, v8
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 8, v5
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_or_b32_e32 v6, v6, v5
+; GFX11-DL-NEXT:    v_and_b32_e32 v8, 0xffff, v8
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
+; GFX11-DL-NEXT:    v_or_b32_e32 v6, v8, v6
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v6, 8, v6
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v0, v6
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v0, v4, v7, v0
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v0, v1
+; GFX11-DL-NEXT:    global_store_b8 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                              ptr addrspace(1) %src2,
                                              ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <4 x i8>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <4 x i8>, ptr addrspace(1) %gep2

llvm/test/CodeGen/AMDGPU/idot8s.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX7 %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX8 %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9 %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9-DL %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10-DL-XNACK %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10-DL-XNACK %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10-DL-NOXNACK %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1031 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10-DL-NOXNACK %s
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11-DL %s
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1101 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11-DL %s
 
 define amdgpu_kernel void @idot8_acc32(ptr addrspace(1) %src1,
 ; GFX7-LABEL: idot8_acc32:
 ; GFX7:       ; %bb.0: ; %entry
 ; GFX7-NEXT:    s_mov_b32 s12, SCRATCH_RSRC_DWORD0
 ; GFX7-NEXT:    s_mov_b32 s13, SCRATCH_RSRC_DWORD1
 ; GFX7-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
 ; GFX7-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0xd

 ; GFX10-DL-NOXNACK-NEXT:    s_clause 0x1
 ; GFX10-DL-NOXNACK-NEXT:    global_load_dword v1, v0, s[4:5]
 ; GFX10-DL-NOXNACK-NEXT:    global_load_dword v0, v0, s[6:7]
 ; GFX10-DL-NOXNACK-NEXT:    s_load_dword s2, s[0:1], 0x0
 ; GFX10-DL-NOXNACK-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 ; GFX10-DL-NOXNACK-NEXT:    v_dot8_i32_i4 v0, v1, v0, s2
 ; GFX10-DL-NOXNACK-NEXT:    global_store_dword v2, v0, s[0:1]
 ; GFX10-DL-NOXNACK-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: idot8_acc32:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
+; GFX11-DL-NEXT:    v_dot8_i32_iu4 v0, v1, v0, s2
+; GFX11-DL-NEXT:    global_store_b32 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                        ptr addrspace(1) %src2,
                                        ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NOXNACK-NEXT:    v_lshlrev_b16 v5, 12, v11
 ; GFX10-DL-NOXNACK-NEXT:    v_mad_u16 v0, v6, v7, v0
 ; GFX10-DL-NOXNACK-NEXT:    v_ashrrev_i16 v4, 12, v4
 ; GFX10-DL-NOXNACK-NEXT:    v_ashrrev_i16 v5, 12, v5
 ; GFX10-DL-NOXNACK-NEXT:    v_mad_u16 v0, v1, v3, v0
 ; GFX10-DL-NOXNACK-NEXT:    v_mad_u16 v0, v4, v5, v0
 ; GFX10-DL-NOXNACK-NEXT:    global_store_short v2, v0, s[0:1]
 ; GFX10-DL-NOXNACK-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: idot8_acc16:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u16 v3, v2, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v4, 28, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 24, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v6, 20, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v7, 16, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v8, 12, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v9, 8, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v10, 4, v1
+; GFX11-DL-NEXT:    v_lshlrev_b16 v1, 12, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v16, 4, v0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v17, 12, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v11, 28, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v12, 24, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v13, 20, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v14, 16, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v15, 12, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 8, v0
+; GFX11-DL-NEXT:    v_ashrrev_i16 v1, 12, v1
+; GFX11-DL-NEXT:    v_lshlrev_b16 v10, 12, v10
+; GFX11-DL-NEXT:    v_lshlrev_b16 v16, 12, v16
+; GFX11-DL-NEXT:    v_ashrrev_i16 v17, 12, v17
+; GFX11-DL-NEXT:    v_lshlrev_b16 v9, 12, v9
+; GFX11-DL-NEXT:    v_lshlrev_b16 v0, 12, v0
+; GFX11-DL-NEXT:    v_ashrrev_i16 v10, 12, v10
+; GFX11-DL-NEXT:    v_ashrrev_i16 v16, 12, v16
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_mad_u16 v1, v1, v17, v3
+; GFX11-DL-NEXT:    v_ashrrev_i16 v3, 12, v9
+; GFX11-DL-NEXT:    v_ashrrev_i16 v0, 12, v0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v8, 12, v8
+; GFX11-DL-NEXT:    v_lshlrev_b16 v9, 12, v15
+; GFX11-DL-NEXT:    v_mad_u16 v1, v10, v16, v1
+; GFX11-DL-NEXT:    v_lshlrev_b16 v7, 12, v7
+; GFX11-DL-NEXT:    v_lshlrev_b16 v10, 12, v14
+; GFX11-DL-NEXT:    v_ashrrev_i16 v8, 12, v8
+; GFX11-DL-NEXT:    v_ashrrev_i16 v9, 12, v9
+; GFX11-DL-NEXT:    v_mad_u16 v0, v3, v0, v1
+; GFX11-DL-NEXT:    v_ashrrev_i16 v1, 12, v7
+; GFX11-DL-NEXT:    v_ashrrev_i16 v3, 12, v10
+; GFX11-DL-NEXT:    v_lshlrev_b16 v6, 12, v6
+; GFX11-DL-NEXT:    v_lshlrev_b16 v7, 12, v13
+; GFX11-DL-NEXT:    v_mad_u16 v0, v8, v9, v0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v5, 12, v5
+; GFX11-DL-NEXT:    v_lshlrev_b16 v8, 12, v12
+; GFX11-DL-NEXT:    v_ashrrev_i16 v6, 12, v6
+; GFX11-DL-NEXT:    v_ashrrev_i16 v7, 12, v7
+; GFX11-DL-NEXT:    v_mad_u16 v0, v1, v3, v0
+; GFX11-DL-NEXT:    v_ashrrev_i16 v1, 12, v5
+; GFX11-DL-NEXT:    v_ashrrev_i16 v3, 12, v8
+; GFX11-DL-NEXT:    v_lshlrev_b16 v4, 12, v4
+; GFX11-DL-NEXT:    v_lshlrev_b16 v5, 12, v11
+; GFX11-DL-NEXT:    v_mad_u16 v0, v6, v7, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_ashrrev_i16 v4, 12, v4
+; GFX11-DL-NEXT:    v_ashrrev_i16 v5, 12, v5
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v0, v1, v3, v0
+; GFX11-DL-NEXT:    v_mad_u16 v0, v4, v5, v0
+; GFX11-DL-NEXT:    global_store_b16 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                        ptr addrspace(1) %src2,
                                        ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NOXNACK-NEXT:    v_lshlrev_b16 v5, 12, v11
 ; GFX10-DL-NOXNACK-NEXT:    v_mad_u16 v0, v6, v7, v0
 ; GFX10-DL-NOXNACK-NEXT:    v_ashrrev_i16 v4, 12, v4
 ; GFX10-DL-NOXNACK-NEXT:    v_ashrrev_i16 v5, 12, v5
 ; GFX10-DL-NOXNACK-NEXT:    v_mad_u16 v0, v1, v3, v0
 ; GFX10-DL-NOXNACK-NEXT:    v_mad_u16 v0, v4, v5, v0
 ; GFX10-DL-NOXNACK-NEXT:    global_store_byte v2, v0, s[0:1]
 ; GFX10-DL-NOXNACK-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: idot8_acc8:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u8 v3, v2, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v4, 28, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 24, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v6, 20, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v7, 16, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v8, 12, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v9, 8, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v10, 4, v1
+; GFX11-DL-NEXT:    v_lshlrev_b16 v1, 12, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v16, 4, v0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v17, 12, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v11, 28, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v12, 24, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v13, 20, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v14, 16, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v15, 12, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 8, v0
+; GFX11-DL-NEXT:    v_ashrrev_i16 v1, 12, v1
+; GFX11-DL-NEXT:    v_lshlrev_b16 v10, 12, v10
+; GFX11-DL-NEXT:    v_lshlrev_b16 v16, 12, v16
+; GFX11-DL-NEXT:    v_ashrrev_i16 v17, 12, v17
+; GFX11-DL-NEXT:    v_lshlrev_b16 v9, 12, v9
+; GFX11-DL-NEXT:    v_lshlrev_b16 v0, 12, v0
+; GFX11-DL-NEXT:    v_ashrrev_i16 v10, 12, v10
+; GFX11-DL-NEXT:    v_ashrrev_i16 v16, 12, v16
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_mad_u16 v1, v1, v17, v3
+; GFX11-DL-NEXT:    v_ashrrev_i16 v3, 12, v9
+; GFX11-DL-NEXT:    v_ashrrev_i16 v0, 12, v0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v8, 12, v8
+; GFX11-DL-NEXT:    v_lshlrev_b16 v9, 12, v15
+; GFX11-DL-NEXT:    v_mad_u16 v1, v10, v16, v1
+; GFX11-DL-NEXT:    v_lshlrev_b16 v7, 12, v7
+; GFX11-DL-NEXT:    v_lshlrev_b16 v10, 12, v14
+; GFX11-DL-NEXT:    v_ashrrev_i16 v8, 12, v8
+; GFX11-DL-NEXT:    v_ashrrev_i16 v9, 12, v9
+; GFX11-DL-NEXT:    v_mad_u16 v0, v3, v0, v1
+; GFX11-DL-NEXT:    v_ashrrev_i16 v1, 12, v7
+; GFX11-DL-NEXT:    v_ashrrev_i16 v3, 12, v10
+; GFX11-DL-NEXT:    v_lshlrev_b16 v6, 12, v6
+; GFX11-DL-NEXT:    v_lshlrev_b16 v7, 12, v13
+; GFX11-DL-NEXT:    v_mad_u16 v0, v8, v9, v0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v5, 12, v5
+; GFX11-DL-NEXT:    v_lshlrev_b16 v8, 12, v12
+; GFX11-DL-NEXT:    v_ashrrev_i16 v6, 12, v6
+; GFX11-DL-NEXT:    v_ashrrev_i16 v7, 12, v7
+; GFX11-DL-NEXT:    v_mad_u16 v0, v1, v3, v0
+; GFX11-DL-NEXT:    v_ashrrev_i16 v1, 12, v5
+; GFX11-DL-NEXT:    v_ashrrev_i16 v3, 12, v8
+; GFX11-DL-NEXT:    v_lshlrev_b16 v4, 12, v4
+; GFX11-DL-NEXT:    v_lshlrev_b16 v5, 12, v11
+; GFX11-DL-NEXT:    v_mad_u16 v0, v6, v7, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_ashrrev_i16 v4, 12, v4
+; GFX11-DL-NEXT:    v_ashrrev_i16 v5, 12, v5
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v0, v1, v3, v0
+; GFX11-DL-NEXT:    v_mad_u16 v0, v4, v5, v0
+; GFX11-DL-NEXT:    global_store_b8 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                        ptr addrspace(1) %src2,
                                        ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NOXNACK-NEXT:    v_ashrrev_i32_e32 v0, 28, v0
 ; GFX10-DL-NOXNACK-NEXT:    v_add3_u32 v2, v2, v8, v6
 ; GFX10-DL-NOXNACK-NEXT:    v_mul_i32_i24_e32 v0, v1, v0
 ; GFX10-DL-NOXNACK-NEXT:    v_add3_u32 v1, v2, v3, v4
 ; GFX10-DL-NOXNACK-NEXT:    v_mov_b32_e32 v2, 0
 ; GFX10-DL-NOXNACK-NEXT:    v_add3_u32 v0, v1, v0, v5
 ; GFX10-DL-NOXNACK-NEXT:    global_store_dword v2, v0, s[0:1]
 ; GFX10-DL-NOXNACK-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: idot8_multiuses_mul1:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_bfe_i32 v2, v1, 0, 4
+; GFX11-DL-NEXT:    v_bfe_i32 v3, v1, 4, 4
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_bfe_i32 v4, v0, 4, 4
+; GFX11-DL-NEXT:    v_bfe_i32 v5, v1, 8, 4
+; GFX11-DL-NEXT:    v_bfe_i32 v6, v0, 8, 4
+; GFX11-DL-NEXT:    v_bfe_i32 v7, v0, 0, 4
+; GFX11-DL-NEXT:    v_bfe_i32 v8, v1, 12, 4
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v3, v3, v4
+; GFX11-DL-NEXT:    v_bfe_i32 v9, v0, 12, 4
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v4, v5, v6
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    v_mad_i32_i24 v5, v2, v7, s2
+; GFX11-DL-NEXT:    v_bfe_i32 v6, v1, 16, 4
+; GFX11-DL-NEXT:    v_bfe_i32 v10, v0, 16, 4
+; GFX11-DL-NEXT:    v_bfe_i32 v11, v1, 20, 4
+; GFX11-DL-NEXT:    v_bfe_i32 v12, v0, 20, 4
+; GFX11-DL-NEXT:    v_mad_i32_i24 v2, v2, v7, v5
+; GFX11-DL-NEXT:    v_bfe_i32 v7, v1, 24, 4
+; GFX11-DL-NEXT:    v_bfe_i32 v13, v0, 24, 4
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v8, v8, v9
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v6, v6, v10
+; GFX11-DL-NEXT:    v_add3_u32 v2, v2, v3, v4
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v3, v11, v12
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v4, v7, v13
+; GFX11-DL-NEXT:    v_ashrrev_i32_e32 v1, 28, v1
+; GFX11-DL-NEXT:    v_ashrrev_i32_e32 v0, 28, v0
+; GFX11-DL-NEXT:    v_add3_u32 v2, v2, v8, v6
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_mul_i32_i24_e32 v0, v1, v0
+; GFX11-DL-NEXT:    v_add3_u32 v1, v2, v3, v4
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_add3_u32 v0, v1, v0, v5
+; GFX11-DL-NEXT:    global_store_b32 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                                 ptr addrspace(1) %src2,
                                                 ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NOXNACK-NEXT:    s_clause 0x1
 ; GFX10-DL-NOXNACK-NEXT:    global_load_dword v1, v0, s[4:5]
 ; GFX10-DL-NOXNACK-NEXT:    global_load_dword v0, v0, s[6:7]
 ; GFX10-DL-NOXNACK-NEXT:    s_load_dword s2, s[0:1], 0x0
 ; GFX10-DL-NOXNACK-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 ; GFX10-DL-NOXNACK-NEXT:    v_dot8_i32_i4 v0, v1, v0, s2
 ; GFX10-DL-NOXNACK-NEXT:    global_store_dword v2, v0, s[0:1]
 ; GFX10-DL-NOXNACK-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: idot8_acc32_vecMul:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
+; GFX11-DL-NEXT:    v_dot8_i32_iu4 v0, v1, v0, s2
+; GFX11-DL-NEXT:    global_store_b32 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                               ptr addrspace(1) %src2,
                                               ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NOXNACK-NEXT:    v_add_nc_u16 v3, v3, v4
 ; GFX10-DL-NOXNACK-NEXT:    v_pk_mul_lo_u16 v0, v1, v0
 ; GFX10-DL-NOXNACK-NEXT:    v_add_nc_u16 v1, v3, v5
 ; GFX10-DL-NOXNACK-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
 ; GFX10-DL-NOXNACK-NEXT:    v_add_nc_u16 v0, v1, v0
 ; GFX10-DL-NOXNACK-NEXT:    v_add_nc_u16 v0, v0, v3
 ; GFX10-DL-NOXNACK-NEXT:    global_store_short v2, v0, s[0:1]
 ; GFX10-DL-NOXNACK-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: idot8_acc16_vecMul:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u16 v3, v2, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 4, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v12, 4, v0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v4, 12, v1
+; GFX11-DL-NEXT:    v_lshlrev_b16 v11, 12, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v6, 8, v1
+; GFX11-DL-NEXT:    v_lshlrev_b16 v5, 12, v5
+; GFX11-DL-NEXT:    v_lshlrev_b16 v12, 12, v12
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v7, 12, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v8, 16, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v13, 8, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v14, 12, v0
+; GFX11-DL-NEXT:    v_ashrrev_i16 v4, 12, v4
+; GFX11-DL-NEXT:    v_ashrrev_i16 v11, 12, v11
+; GFX11-DL-NEXT:    v_ashrrev_i16 v12, 12, v12
+; GFX11-DL-NEXT:    v_ashrrev_i16 v5, 12, v5
+; GFX11-DL-NEXT:    v_lshlrev_b16 v6, 12, v6
+; GFX11-DL-NEXT:    v_lshlrev_b16 v7, 12, v7
+; GFX11-DL-NEXT:    v_lshlrev_b16 v8, 12, v8
+; GFX11-DL-NEXT:    v_lshlrev_b16 v13, 12, v13
+; GFX11-DL-NEXT:    v_lshlrev_b16 v14, 12, v14
+; GFX11-DL-NEXT:    v_perm_b32 v11, v12, v11, 0x5040100
+; GFX11-DL-NEXT:    v_perm_b32 v4, v5, v4, 0x5040100
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v9, 20, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v15, 16, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v16, 20, v0
+; GFX11-DL-NEXT:    v_ashrrev_i16 v6, 12, v6
+; GFX11-DL-NEXT:    v_ashrrev_i16 v7, 12, v7
+; GFX11-DL-NEXT:    v_ashrrev_i16 v5, 12, v8
+; GFX11-DL-NEXT:    v_ashrrev_i16 v8, 12, v13
+; GFX11-DL-NEXT:    v_ashrrev_i16 v12, 12, v14
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v4, v4, v11
+; GFX11-DL-NEXT:    v_lshlrev_b16 v9, 12, v9
+; GFX11-DL-NEXT:    v_lshlrev_b16 v15, 12, v15
+; GFX11-DL-NEXT:    v_lshlrev_b16 v16, 12, v16
+; GFX11-DL-NEXT:    v_perm_b32 v8, v12, v8, 0x5040100
+; GFX11-DL-NEXT:    v_perm_b32 v6, v7, v6, 0x5040100
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v7, 16, v4
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v4, v3
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v10, 24, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 28, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v17, 24, v0
+; GFX11-DL-NEXT:    v_ashrrev_i16 v9, 12, v9
+; GFX11-DL-NEXT:    v_ashrrev_i16 v11, 12, v15
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 28, v0
+; GFX11-DL-NEXT:    v_ashrrev_i16 v4, 12, v16
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v6, v6, v8
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v3, v7
+; GFX11-DL-NEXT:    v_lshlrev_b16 v10, 12, v10
+; GFX11-DL-NEXT:    v_lshlrev_b16 v1, 12, v1
+; GFX11-DL-NEXT:    v_lshlrev_b16 v12, 12, v17
+; GFX11-DL-NEXT:    v_lshlrev_b16 v0, 12, v0
+; GFX11-DL-NEXT:    v_perm_b32 v4, v4, v11, 0x5040100
+; GFX11-DL-NEXT:    v_perm_b32 v5, v9, v5, 0x5040100
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v7, 16, v6
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v3, v6
+; GFX11-DL-NEXT:    v_ashrrev_i16 v10, 12, v10
+; GFX11-DL-NEXT:    v_ashrrev_i16 v6, 12, v12
+; GFX11-DL-NEXT:    v_ashrrev_i16 v0, 12, v0
+; GFX11-DL-NEXT:    v_ashrrev_i16 v1, 12, v1
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v4, v5, v4
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v3, v7
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-DL-NEXT:    v_perm_b32 v0, v0, v6, 0x5040100
+; GFX11-DL-NEXT:    v_perm_b32 v1, v1, v10, 0x5040100
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 16, v4
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v3, v4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v0, v1, v0
+; GFX11-DL-NEXT:    v_add_nc_u16 v1, v3, v5
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v1, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v0, v3
+; GFX11-DL-NEXT:    global_store_b16 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                               ptr addrspace(1) %src2,
                                               ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NOXNACK-NEXT:    v_add_nc_u16 v0, v0, v2
 ; GFX10-DL-NOXNACK-NEXT:    v_mad_u16 v0, v5, v12, v0
 ; GFX10-DL-NOXNACK-NEXT:    v_add_nc_u16 v0, v0, v1
 ; GFX10-DL-NOXNACK-NEXT:    v_lshrrev_b32_e32 v1, 8, v6
 ; GFX10-DL-NOXNACK-NEXT:    v_mad_u16 v0, v7, v14, v0
 ; GFX10-DL-NOXNACK-NEXT:    v_add_nc_u16 v0, v0, v1
 ; GFX10-DL-NOXNACK-NEXT:    global_store_byte v4, v0, s[0:1]
 ; GFX10-DL-NOXNACK-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: idot8_acc8_vecMul:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 16, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v8, 12, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v9, 8, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v12, 16, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v15, 12, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v16, 8, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v3, 20, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v6, 28, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v7, 24, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v10, 4, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v11, 20, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v13, 28, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v14, 24, v0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v1, 12, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v17, 4, v0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v0, 12, v0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v9, 12, v9
+; GFX11-DL-NEXT:    v_lshlrev_b16 v8, 12, v8
+; GFX11-DL-NEXT:    v_lshlrev_b16 v5, 12, v5
+; GFX11-DL-NEXT:    v_lshlrev_b16 v16, 12, v16
+; GFX11-DL-NEXT:    v_lshlrev_b16 v15, 12, v15
+; GFX11-DL-NEXT:    v_lshlrev_b16 v12, 12, v12
+; GFX11-DL-NEXT:    v_ashrrev_i16 v1, 12, v1
+; GFX11-DL-NEXT:    v_ashrrev_i16 v0, 12, v0
+; GFX11-DL-NEXT:    v_ashrrev_i16 v9, 12, v9
+; GFX11-DL-NEXT:    v_ashrrev_i16 v8, 12, v8
+; GFX11-DL-NEXT:    v_ashrrev_i16 v5, 12, v5
+; GFX11-DL-NEXT:    v_ashrrev_i16 v16, 12, v16
+; GFX11-DL-NEXT:    v_ashrrev_i16 v15, 12, v15
+; GFX11-DL-NEXT:    v_ashrrev_i16 v12, 12, v12
+; GFX11-DL-NEXT:    v_mul_lo_u16 v1, v1, v0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v10, 12, v10
+; GFX11-DL-NEXT:    v_lshlrev_b16 v17, 12, v17
+; GFX11-DL-NEXT:    v_mul_lo_u16 v0, v8, v15
+; GFX11-DL-NEXT:    v_mul_lo_u16 v8, v9, v16
+; GFX11-DL-NEXT:    v_mul_lo_u16 v9, v5, v12
+; GFX11-DL-NEXT:    v_mov_b32_e32 v4, 0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v7, 12, v7
+; GFX11-DL-NEXT:    v_lshlrev_b16 v6, 12, v6
+; GFX11-DL-NEXT:    v_lshlrev_b16 v3, 12, v3
+; GFX11-DL-NEXT:    v_and_b32_e32 v9, 0xff, v9
+; GFX11-DL-NEXT:    global_load_u8 v2, v4, s[0:1]
+; GFX11-DL-NEXT:    v_lshlrev_b16 v14, 12, v14
+; GFX11-DL-NEXT:    v_lshlrev_b16 v13, 12, v13
+; GFX11-DL-NEXT:    v_lshlrev_b16 v11, 12, v11
+; GFX11-DL-NEXT:    v_ashrrev_i16 v10, 12, v10
+; GFX11-DL-NEXT:    v_ashrrev_i16 v17, 12, v17
+; GFX11-DL-NEXT:    v_ashrrev_i16 v7, 12, v7
+; GFX11-DL-NEXT:    v_ashrrev_i16 v6, 12, v6
+; GFX11-DL-NEXT:    v_ashrrev_i16 v3, 12, v3
+; GFX11-DL-NEXT:    v_ashrrev_i16 v14, 12, v14
+; GFX11-DL-NEXT:    v_ashrrev_i16 v13, 12, v13
+; GFX11-DL-NEXT:    v_ashrrev_i16 v11, 12, v11
+; GFX11-DL-NEXT:    v_mul_lo_u16 v10, v10, v17
+; GFX11-DL-NEXT:    v_lshlrev_b16 v0, 8, v0
+; GFX11-DL-NEXT:    v_and_b32_e32 v8, 0xff, v8
+; GFX11-DL-NEXT:    v_mul_lo_u16 v6, v6, v13
+; GFX11-DL-NEXT:    v_mul_lo_u16 v3, v3, v11
+; GFX11-DL-NEXT:    v_mul_lo_u16 v11, v7, v14
+; GFX11-DL-NEXT:    v_lshlrev_b16 v10, 8, v10
+; GFX11-DL-NEXT:    v_or_b32_e32 v8, v8, v0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v6, 8, v6
+; GFX11-DL-NEXT:    v_lshlrev_b16 v3, 8, v3
+; GFX11-DL-NEXT:    v_and_b32_e32 v11, 0xff, v11
+; GFX11-DL-NEXT:    v_and_b32_e32 v13, 0xffff, v10
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 16, v8
+; GFX11-DL-NEXT:    v_and_b32_e32 v1, 0xff, v1
+; GFX11-DL-NEXT:    v_or_b32_e32 v3, v9, v3
+; GFX11-DL-NEXT:    v_or_b32_e32 v9, v11, v6
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-DL-NEXT:    v_or_b32_e32 v11, v13, v0
+; GFX11-DL-NEXT:    v_or_b32_e32 v1, v1, v10
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-DL-NEXT:    v_and_b32_e32 v3, 0xffff, v3
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v10, 8, v11
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_add_nc_u16 v2, v1, v2
+; GFX11-DL-NEXT:    v_or_b32_e32 v1, v3, v9
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_add_nc_u16 v9, v2, v10
+; GFX11-DL-NEXT:    v_lshrrev_b64 v[2:3], 24, v[0:1]
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 8, v1
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v9, v8
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v0, v2
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v0, v5, v12, v0
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v0, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 8, v6
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v0, v7, v14, v0
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v0, v1
+; GFX11-DL-NEXT:    global_store_b8 v4, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                              ptr addrspace(1) %src2,
                                              ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

llvm/test/CodeGen/AMDGPU/idot8u.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX7 %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX8 %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9 %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9-DL %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10-DL %s
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10-DL %s
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11-DL %s
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1101 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11-DL %s
 
 define amdgpu_kernel void @udot8_acc32(ptr addrspace(1) %src1,
 ; GFX7-LABEL: udot8_acc32:
 ; GFX7:       ; %bb.0: ; %entry
 ; GFX7-NEXT:    s_mov_b32 s12, SCRATCH_RSRC_DWORD0
 ; GFX7-NEXT:    s_mov_b32 s13, SCRATCH_RSRC_DWORD1
 ; GFX7-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
 ; GFX7-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0xd

 ; GFX10-DL-NEXT:    global_load_dword v1, v0, s[4:5]
 ; GFX10-DL-NEXT:    global_load_dword v2, v0, s[6:7]
 ; GFX10-DL-NEXT:    v_mov_b32_e32 v0, 0
 ; GFX10-DL-NEXT:    s_load_dword s2, s[0:1], 0x0
 ; GFX10-DL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 ; GFX10-DL-NEXT:    v_dot8_u32_u4 v1, v1, v2, s2
 ; GFX10-DL-NEXT:    global_store_dword v0, v1, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot8_acc32:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
+; GFX11-DL-NEXT:    v_dot8_u32_u4 v0, v1, v0, s2
+; GFX11-DL-NEXT:    global_store_b32 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                        ptr addrspace(1) %src2,
                                        ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_bfe_u32 v5, v3, 24, 4
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v2, 28, v2
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v3, 28, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v6, v7, v0
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v4, v5, v0
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v2, v3, v0
 ; GFX10-DL-NEXT:    global_store_short v1, v0, s[2:3]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot8_acc16:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v0, 2, v0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v2, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u16 v3, v1, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_and_b32_e32 v4, 15, v2
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_and_b32_e32 v5, 15, v0
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v2, 4, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 4, 4
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v2, 8, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v0, 8, 4
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v2, 12, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 12, 4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v2, 16, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v0, 16, 4
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v2, 20, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 20, 4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v2, 24, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v0, 24, 4
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v2, 28, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 28, v0
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_mad_u16 v0, v2, v0, v3
+; GFX11-DL-NEXT:    global_store_b16 v1, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                        ptr addrspace(1) %src2,
                                        ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_bfe_u32 v5, v3, 24, 4
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v2, 28, v2
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v3, 28, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v6, v7, v0
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v4, v5, v0
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v2, v3, v0
 ; GFX10-DL-NEXT:    global_store_byte v1, v0, s[2:3]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot8_acc8:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v0, 2, v0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v2, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u8 v3, v1, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_and_b32_e32 v4, 15, v2
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_and_b32_e32 v5, 15, v0
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v2, 4, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 4, 4
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v2, 8, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v0, 8, 4
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v2, 12, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 12, 4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v2, 16, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v0, 16, 4
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v2, 20, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 20, 4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v2, 24, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v0, 24, 4
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v2, 28, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 28, v0
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_mad_u16 v0, v2, v0, v3
+; GFX11-DL-NEXT:    global_store_b8 v1, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                       ptr addrspace(1) %src2,
                                       ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v2, 28, v2
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v3, 28, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v6, v7, v0
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v4, v5, v0
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v2, v3, v0
 ; GFX10-DL-NEXT:    v_and_b32_e32 v0, 15, v0
 ; GFX10-DL-NEXT:    global_store_byte v1, v0, s[2:3]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot8_acc4:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v0, 2, v0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v2, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u8 v3, v1, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_and_b32_e32 v4, 15, v2
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_and_b32_e32 v5, 15, v0
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v2, 4, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 4, 4
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v2, 8, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v0, 8, 4
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v2, 12, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 12, 4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v2, 16, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v0, 16, 4
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v2, 20, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 20, 4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v4, 24, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 24, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v2, 28, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 28, v0
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_mad_u16 v0, v2, v0, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_and_b32_e32 v0, 15, v0
+; GFX11-DL-NEXT:    global_store_b8 v1, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                       ptr addrspace(1) %src2,
                                       ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v2, 28, v2
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v3, 28, v3
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v6, v7, v0
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v4, v5, v0
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v2, v3, v0
 ; GFX10-DL-NEXT:    v_and_b32_e32 v0, 15, v0
 ; GFX10-DL-NEXT:    global_store_byte v1, v0, s[2:3]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot8_CommutationInsideMAD:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v0, 2, v0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v2, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    global_load_u8 v3, v1, s[0:1]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(2)
+; GFX11-DL-NEXT:    v_and_b32_e32 v4, 15, v2
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_and_b32_e32 v5, 15, v0
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v2, 4, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 4, 4
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v2, 8, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v0, 8, 4
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v2, 12, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 12, 4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v2, 16, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v0, 16, 4
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v2, 20, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 20, 4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v4, 24, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 24, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v2, 28, v2
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 28, v0
+; GFX11-DL-NEXT:    v_mad_u16 v3, v6, v7, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v3, v4, v5, v3
+; GFX11-DL-NEXT:    v_mad_u16 v0, v2, v0, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_and_b32_e32 v0, 15, v0
+; GFX11-DL-NEXT:    global_store_b8 v1, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                                       ptr addrspace(1) %src2,
                                                       ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_mul_u32_u24_e32 v2, v3, v10
 ; GFX10-DL-NEXT:    v_mul_u32_u24_e32 v3, v8, v9
 ; GFX10-DL-NEXT:    v_add3_u32 v0, v0, v6, v5
 ; GFX10-DL-NEXT:    v_add3_u32 v0, v0, v1, v2
 ; GFX10-DL-NEXT:    v_mov_b32_e32 v1, 0
 ; GFX10-DL-NEXT:    v_add3_u32 v0, v3, v13, v0
 ; GFX10-DL-NEXT:    global_store_dword v1, v0, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot8_multiuses_mul1:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_and_b32_e32 v8, 15, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_and_b32_e32 v9, 15, v0
+; GFX11-DL-NEXT:    v_bfe_u32 v2, v1, 4, 4
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v3, 28, v1
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v1, 24, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v1, 20, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v1, 16, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v1, 12, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v1, v1, 8, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v10, v0, 4, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v11, v0, 8, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v12, v0, 12, 4
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    v_mad_u32_u24 v13, v8, v9, s2
+; GFX11-DL-NEXT:    v_bfe_u32 v14, v0, 20, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v15, v0, 16, 4
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v1, v1, v11
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v7, v7, v12
+; GFX11-DL-NEXT:    v_mad_u32_u24 v2, v2, v10, v13
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v10, 28, v0
+; GFX11-DL-NEXT:    v_bfe_u32 v0, v0, 24, 4
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v6, v6, v15
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v5, v5, v14
+; GFX11-DL-NEXT:    v_add3_u32 v1, v2, v1, v7
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v2, v3, v10
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v0, v4, v0
+; GFX11-DL-NEXT:    v_mul_u32_u24_e32 v3, v8, v9
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_add3_u32 v1, v1, v6, v5
+; GFX11-DL-NEXT:    v_add3_u32 v0, v1, v0, v2
+; GFX11-DL-NEXT:    v_mov_b32_e32 v1, 0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_add3_u32 v0, v3, v13, v0
+; GFX11-DL-NEXT:    global_store_b32 v1, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                                 ptr addrspace(1) %src2,
                                                 ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    global_load_dword v1, v0, s[4:5]
 ; GFX10-DL-NEXT:    global_load_dword v2, v0, s[6:7]
 ; GFX10-DL-NEXT:    v_mov_b32_e32 v0, 0
 ; GFX10-DL-NEXT:    s_load_dword s2, s[0:1], 0x0
 ; GFX10-DL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 ; GFX10-DL-NEXT:    v_dot8_u32_u4 v1, v1, v2, s2
 ; GFX10-DL-NEXT:    global_store_dword v0, v1, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot8_acc32_vecMul:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
+; GFX11-DL-NEXT:    v_dot8_u32_u4 v0, v1, v0, s2
+; GFX11-DL-NEXT:    global_store_b32 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                               ptr addrspace(1) %src2,
                                               ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_add_nc_u16 v3, v3, v4
 ; GFX10-DL-NEXT:    v_pk_mul_lo_u16 v1, v1, v2
 ; GFX10-DL-NEXT:    v_add_nc_u16 v2, v3, v5
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
 ; GFX10-DL-NEXT:    v_add_nc_u16 v1, v2, v1
 ; GFX10-DL-NEXT:    v_add_nc_u16 v1, v1, v3
 ; GFX10-DL-NEXT:    global_store_short v0, v1, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot8_acc16_vecMul:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_and_b32_e32 v4, 15, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_and_b32_e32 v5, 15, v0
+; GFX11-DL-NEXT:    global_load_u16 v3, v2, s[0:1]
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v0, 4, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v1, 4, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v8, v0, 12, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v9, v1, 12, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v10, v1, 20, 4
+; GFX11-DL-NEXT:    v_perm_b32 v5, v6, v5, 0x5040100
+; GFX11-DL-NEXT:    v_perm_b32 v4, v7, v4, 0x5040100
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v1, 8, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 8, 4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v4, v4, v5
+; GFX11-DL-NEXT:    v_perm_b32 v6, v9, v6, 0x5040100
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-DL-NEXT:    v_perm_b32 v7, v8, v7, 0x5040100
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v1, 16, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v9, v0, 20, 4
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v8, 16, v4
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v6, v6, v7
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_perm_b32 v5, v10, v5, 0x5040100
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v1, 24, 4
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 28, v1
+; GFX11-DL-NEXT:    v_perm_b32 v1, v1, v7, 0x5040100
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v4, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v0, 16, 4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v3, v8
+; GFX11-DL-NEXT:    v_perm_b32 v4, v9, v4, 0x5040100
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v8, 16, v6
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v3, v6
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v0, 24, 4
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 28, v0
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v4, v5, v4
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v3, v8
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_perm_b32 v0, v0, v6, 0x5040100
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 16, v4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v3, v4
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v0, v1, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_add_nc_u16 v1, v3, v5
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v1, v0
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v0, v3
+; GFX11-DL-NEXT:    global_store_b16 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                               ptr addrspace(1) %src2,
                                               ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_add_nc_u16 v0, v0, v2
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v12, v7, v0
 ; GFX10-DL-NEXT:    v_add_nc_u16 v0, v0, v1
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v1, 8, v8
 ; GFX10-DL-NEXT:    v_mad_u16 v0, v10, v16, v0
 ; GFX10-DL-NEXT:    v_add_nc_u16 v0, v0, v1
 ; GFX10-DL-NEXT:    global_store_byte v4, v0, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot8_acc8_vecMul:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v5, 15, v1
+; GFX11-DL-NEXT:    global_load_u8 v2, v4, s[0:1]
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v1, 12, 4
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_bfe_u32 v12, v0, 12, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v3, v1, 4, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v1, 8, 4
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v8, 28, v1
+; GFX11-DL-NEXT:    v_bfe_u32 v9, v1, 24, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v10, v1, 20, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v11, v1, 16, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v1, v0, 4, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v14, v0, 8, 4
+; GFX11-DL-NEXT:    v_mul_lo_u16 v6, v6, v12
+; GFX11-DL-NEXT:    v_and_b32_e32 v13, 15, v0
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v15, 28, v0
+; GFX11-DL-NEXT:    v_bfe_u32 v16, v0, 24, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v12, v0, 16, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v0, v0, 20, 4
+; GFX11-DL-NEXT:    v_mul_lo_u16 v7, v7, v14
+; GFX11-DL-NEXT:    v_mul_lo_u16 v1, v3, v1
+; GFX11-DL-NEXT:    v_lshlrev_b16 v3, 8, v6
+; GFX11-DL-NEXT:    v_mul_lo_u16 v8, v8, v15
+; GFX11-DL-NEXT:    v_mul_lo_u16 v0, v10, v0
+; GFX11-DL-NEXT:    v_mul_lo_u16 v6, v11, v12
+; GFX11-DL-NEXT:    v_lshlrev_b16 v1, 8, v1
+; GFX11-DL-NEXT:    v_or_b32_e32 v7, v7, v3
+; GFX11-DL-NEXT:    v_mul_lo_u16 v3, v9, v16
+; GFX11-DL-NEXT:    v_lshlrev_b16 v10, 8, v0
+; GFX11-DL-NEXT:    v_lshlrev_b16 v8, 8, v8
+; GFX11-DL-NEXT:    v_and_b32_e32 v14, 0xffff, v1
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 16, v7
+; GFX11-DL-NEXT:    v_mul_lo_u16 v5, v5, v13
+; GFX11-DL-NEXT:    v_or_b32_e32 v6, v6, v10
+; GFX11-DL-NEXT:    v_or_b32_e32 v3, v3, v8
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-DL-NEXT:    v_or_b32_e32 v10, v14, v0
+; GFX11-DL-NEXT:    v_or_b32_e32 v1, v5, v1
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-DL-NEXT:    v_and_b32_e32 v5, 0xffff, v6
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v6, 8, v10
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_add_nc_u16 v2, v1, v2
+; GFX11-DL-NEXT:    v_or_b32_e32 v1, v5, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_add_nc_u16 v5, v2, v6
+; GFX11-DL-NEXT:    v_lshrrev_b64 v[2:3], 24, v[0:1]
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 8, v1
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v5, v7
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v0, v2
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v0, v11, v12, v0
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v0, v1
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 8, v8
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_mad_u16 v0, v9, v16, v0
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v0, v1
+; GFX11-DL-NEXT:    global_store_b8 v4, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                              ptr addrspace(1) %src2,
                                              ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    v_pk_mul_lo_u16 v1, v1, v2
 ; GFX10-DL-NEXT:    v_add_nc_u16 v2, v3, v5
 ; GFX10-DL-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
 ; GFX10-DL-NEXT:    v_add_nc_u16 v1, v2, v1
 ; GFX10-DL-NEXT:    v_add_nc_u16 v1, v1, v3
 ; GFX10-DL-NEXT:    v_and_b32_e32 v1, 15, v1
 ; GFX10-DL-NEXT:    global_store_byte v0, v1, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot8_acc4_vecMul:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(1)
+; GFX11-DL-NEXT:    v_and_b32_e32 v4, 15, v1
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_and_b32_e32 v5, 15, v0
+; GFX11-DL-NEXT:    global_load_u8 v3, v2, s[0:1]
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v0, 4, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v1, 4, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v8, v0, 12, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v9, v1, 12, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v10, v1, 20, 4
+; GFX11-DL-NEXT:    v_perm_b32 v5, v6, v5, 0x5040100
+; GFX11-DL-NEXT:    v_perm_b32 v4, v7, v4, 0x5040100
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v1, 8, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v0, 8, 4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v4, v4, v5
+; GFX11-DL-NEXT:    v_perm_b32 v6, v9, v6, 0x5040100
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-DL-NEXT:    v_perm_b32 v7, v8, v7, 0x5040100
+; GFX11-DL-NEXT:    v_bfe_u32 v5, v1, 16, 4
+; GFX11-DL-NEXT:    v_bfe_u32 v9, v0, 20, 4
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v8, 16, v4
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v6, v6, v7
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_perm_b32 v5, v10, v5, 0x5040100
+; GFX11-DL-NEXT:    v_bfe_u32 v7, v1, 24, 4
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v1, 28, v1
+; GFX11-DL-NEXT:    v_perm_b32 v1, v1, v7, 0x5040100
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0)
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v4, v3
+; GFX11-DL-NEXT:    v_bfe_u32 v4, v0, 16, 4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v3, v8
+; GFX11-DL-NEXT:    v_perm_b32 v4, v9, v4, 0x5040100
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v8, 16, v6
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v3, v6
+; GFX11-DL-NEXT:    v_bfe_u32 v6, v0, 24, 4
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v0, 28, v0
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v4, v5, v4
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v3, v8
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_perm_b32 v0, v0, v6, 0x5040100
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v5, 16, v4
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-DL-NEXT:    v_add_nc_u16 v3, v3, v4
+; GFX11-DL-NEXT:    v_pk_mul_lo_u16 v0, v1, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-DL-NEXT:    v_add_nc_u16 v1, v3, v5
+; GFX11-DL-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v1, v0
+; GFX11-DL-NEXT:    v_add_nc_u16 v0, v0, v3
+; GFX11-DL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
+; GFX11-DL-NEXT:    v_and_b32_e32 v0, 15, v0
+; GFX11-DL-NEXT:    global_store_b8 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                              ptr addrspace(1) %src2,
                                              ptr addrspace(1) nocapture %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr <8 x i4>, ptr addrspace(1) %src1, i32 %idx
   %vec1 = load <8 x i4>, ptr addrspace(1) %gep1
   %gep2 = getelementptr <8 x i4>, ptr addrspace(1) %src2, i32 %idx
   %vec2 = load <8 x i4>, ptr addrspace(1) %gep2

 ; GFX10-DL-NEXT:    global_load_dword v1, v0, s[4:5]
 ; GFX10-DL-NEXT:    global_load_dword v2, v0, s[6:7]
 ; GFX10-DL-NEXT:    v_mov_b32_e32 v0, 0
 ; GFX10-DL-NEXT:    s_load_dword s2, s[0:1], 0x0
 ; GFX10-DL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 ; GFX10-DL-NEXT:    v_dot8_u32_u4 v1, v2, v1, s2
 ; GFX10-DL-NEXT:    global_store_dword v0, v1, s[0:1]
 ; GFX10-DL-NEXT:    s_endpgm
+;
+; GFX11-DL-LABEL: udot8_variant1:
+; GFX11-DL:       ; %bb.0: ; %entry
+; GFX11-DL-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
+; GFX11-DL-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX11-DL-NEXT:    s_load_b64 s[0:1], s[0:1], 0x34
+; GFX11-DL-NEXT:    v_mov_b32_e32 v2, 0
+; GFX11-DL-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX11-DL-NEXT:    s_clause 0x1
+; GFX11-DL-NEXT:    global_load_b32 v1, v0, s[4:5]
+; GFX11-DL-NEXT:    global_load_b32 v0, v0, s[6:7]
+; GFX11-DL-NEXT:    s_load_b32 s2, s[0:1], 0x0
+; GFX11-DL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
+; GFX11-DL-NEXT:    v_dot8_u32_u4 v0, v0, v1, s2
+; GFX11-DL-NEXT:    global_store_b32 v2, v0, s[0:1]
+; GFX11-DL-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; GFX11-DL-NEXT:    s_endpgm
                                           ptr addrspace(1) %v2addr,
                                           ptr addrspace(1) %dst) {
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
   %gep1 = getelementptr i32, ptr addrspace(1) %v1addr, i32 %idx
   %v1 = load i32, ptr addrspace(1) %gep1, align 4
   %gep2 = getelementptr i32, ptr addrspace(1) %v2addr, i32 %idx
   %v2 = load i32, ptr addrspace(1) %gep2, align 4