[RISCV] Remove unused Opcode field from RVInst16. NFC

[craig.topper]

Summary

Unlike RVInst which also has an Opcode field, all of the subclasseso
of RVInst16 assign Inst{1-0} directly.

[asb]

LGTM.

llvm/lib/Target/RISCV/RISCVInstrFormatsC.td

class RVInst16<dag outs, dag ins, string opcodestr, string argstr,
     : RVInstCommon<outs, ins, opcodestr, argstr, pattern, format> {
   field bits<16> Inst;
   // SoftFail is a field the disassembler can use to provide a way for
   // instructions to not match without killing the whole decode process. It is
   // mainly used for ARM, but Tablegen expects this field to exist or it fails
   // to build the decode table.
   field bits<16> SoftFail = 0;
   let Size = 2;
-
-  bits<2> Opcode = 0;
 }
 
 class RVInst16CR<bits<4> funct4, bits<2> opcode, dag outs, dag ins,
                  string opcodestr, string argstr>
     : RVInst16<outs, ins, opcodestr, argstr, [], InstFormatCR> {
   bits<5> rs1;
   bits<5> rs2;