This is an archive of the discontinued LLVM Phabricator instance.

compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp
354	The prevailing style doesn't add a blank line after `#if` / `#elif`. These changes are also unrelated to the gist of the patch. Since they are made, I think that is fine.

Revision Contents

Path

Size

compiler-rt/

cmake/

Modules/

AllSupportedArchDefs.cmake

2 lines

lib/

fuzzer/

FuzzerUtilFuchsia.cpp

53 lines

Diff 531926

compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake

	Show All 39 Lines

	if(OS_NAME MATCHES "Linux")			if(OS_NAME MATCHES "Linux")
	set(ALL_FUZZER_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64} ${S390X}			set(ALL_FUZZER_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64} ${S390X}
	${RISCV64})			${RISCV64})
	elseif (OS_NAME MATCHES "Windows")			elseif (OS_NAME MATCHES "Windows")
	set(ALL_FUZZER_SUPPORTED_ARCH ${X86} ${X86_64})			set(ALL_FUZZER_SUPPORTED_ARCH ${X86} ${X86_64})
	elseif(OS_NAME MATCHES "Android")			elseif(OS_NAME MATCHES "Android")
	set(ALL_FUZZER_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64} ${RISCV64})			set(ALL_FUZZER_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64} ${RISCV64})
				elseif(OS_NAME MATCHES "Fuchsia")
				set(ALL_FUZZER_SUPPORTED_ARCH ${X86_64} ${ARM64} ${RISCV64})
	else()			else()
	set(ALL_FUZZER_SUPPORTED_ARCH ${X86_64} ${ARM64})			set(ALL_FUZZER_SUPPORTED_ARCH ${X86_64} ${ARM64})
	endif()			endif()

	set(ALL_GWP_ASAN_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64})			set(ALL_GWP_ASAN_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64})
	if(APPLE)			if(APPLE)
	set(ALL_LSAN_SUPPORTED_ARCH ${X86} ${X86_64} ${MIPS64} ${ARM64})			set(ALL_LSAN_SUPPORTED_ARCH ${X86} ${X86_64} ${MIPS64} ${ARM64})
	else()			else()
	Show All 35 Lines

compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp

Show First 20 Lines • Show All 81 Lines • ▼ Show 20 Lines
// FIXME: This works as a short-term solution, but this code really shouldn't be		// FIXME: This works as a short-term solution, but this code really shouldn't be
// architecture dependent. A better long term solution is to implement remote		// architecture dependent. A better long term solution is to implement remote
// unwinding and expose the necessary APIs through sanitizer_common and/or ASAN		// unwinding and expose the necessary APIs through sanitizer_common and/or ASAN
// to allow the exception handling thread to gather the crash state directly.		// to allow the exception handling thread to gather the crash state directly.
//		//
// Alternatively, Fuchsia may in future actually implement basic signal		// Alternatively, Fuchsia may in future actually implement basic signal
// handling for the machine trap signals.		// handling for the machine trap signals.
#if defined(__x86_64__)		#if defined(__x86_64__)

		paulkirthUnsubmitted Not Done Reply Inline Actions Nit: seems to be some unrelated white space changes here and elsewhere in the file. ‘git clang-format’ should fix those, I think. paulkirth: Nit: seems to be some unrelated white space changes here and elsewhere in the file. ‘git clang…
#define FOREACH_REGISTER(OP_REG, OP_NUM) \		#define FOREACH_REGISTER(OP_REG, OP_NUM) \
OP_REG(rax) \		OP_REG(rax) \
OP_REG(rbx) \		OP_REG(rbx) \
OP_REG(rcx) \		OP_REG(rcx) \
OP_REG(rdx) \		OP_REG(rdx) \
OP_REG(rsi) \		OP_REG(rsi) \
OP_REG(rdi) \		OP_REG(rdi) \
OP_REG(rbp) \		OP_REG(rbp) \
OP_REG(rsp) \		OP_REG(rsp) \
OP_REG(r8) \		OP_REG(r8) \
OP_REG(r9) \		OP_REG(r9) \
OP_REG(r10) \		OP_REG(r10) \
OP_REG(r11) \		OP_REG(r11) \
OP_REG(r12) \		OP_REG(r12) \
OP_REG(r13) \		OP_REG(r13) \
OP_REG(r14) \		OP_REG(r14) \
OP_REG(r15) \		OP_REG(r15) \
OP_REG(rip)		OP_REG(rip)

#elif defined(__aarch64__)		#elif defined(__aarch64__)

#define FOREACH_REGISTER(OP_REG, OP_NUM) \		#define FOREACH_REGISTER(OP_REG, OP_NUM) \
OP_NUM(0) \		OP_NUM(0) \
OP_NUM(1) \		OP_NUM(1) \
OP_NUM(2) \		OP_NUM(2) \
OP_NUM(3) \		OP_NUM(3) \
OP_NUM(4) \		OP_NUM(4) \
OP_NUM(5) \		OP_NUM(5) \
OP_NUM(6) \		OP_NUM(6) \
Show All 17 Lines	#define FOREACH_REGISTER(OP_REG, OP_NUM) \
OP_NUM(24) \		OP_NUM(24) \
OP_NUM(25) \		OP_NUM(25) \
OP_NUM(26) \		OP_NUM(26) \
OP_NUM(27) \		OP_NUM(27) \
OP_NUM(28) \		OP_NUM(28) \
OP_NUM(29) \		OP_NUM(29) \
OP_REG(sp)		OP_REG(sp)

		#elif defined(__riscv)

		#define FOREACH_REGISTER(OP_REG, OP_NUM) \
		OP_REG(ra) \
		OP_REG(sp) \
		OP_REG(gp) \
		OP_REG(tp) \
		OP_REG(t0) \
		OP_REG(t1) \
		OP_REG(t2) \
		OP_REG(s0) \
		OP_REG(s1) \
		OP_REG(a0) \
		OP_REG(a1) \
		OP_REG(a2) \
		OP_REG(a3) \
		OP_REG(a4) \
		OP_REG(a5) \
		OP_REG(a6) \
		OP_REG(a7) \
		OP_REG(s2) \
		OP_REG(s3) \
		OP_REG(s4) \
		OP_REG(s5) \
		OP_REG(s6) \
		OP_REG(s7) \
		OP_REG(s8) \
		OP_REG(s9) \
		OP_REG(s10) \
		OP_REG(s11) \
		OP_REG(t3) \
		OP_REG(t4) \
		OP_REG(t5) \
		OP_REG(t6) \

#else		#else
#error "Unsupported architecture for fuzzing on Fuchsia"		#error "Unsupported architecture for fuzzing on Fuchsia"
#endif		#endif

// Produces a CFI directive for the named or numbered register.		// Produces a CFI directive for the named or numbered register.
// The value used refers to an assembler immediate operand with the same name		// The value used refers to an assembler immediate operand with the same name
// as the register (see ASM_OPERAND_REG).		// as the register (see ASM_OPERAND_REG).
#define CFI_OFFSET_REG(reg) ".cfi_offset " #reg ", %c[" #reg "]\n"		#define CFI_OFFSET_REG(reg) ".cfi_offset " #reg ", %c[" #reg "]\n"
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
#elif defined(__aarch64__)		#elif defined(__aarch64__)
".cfi_return_column 33\n"		".cfi_return_column 33\n"
".cfi_def_cfa sp, 0\n"		".cfi_def_cfa sp, 0\n"
FOREACH_REGISTER(CFI_OFFSET_REG, CFI_OFFSET_NUM)		FOREACH_REGISTER(CFI_OFFSET_REG, CFI_OFFSET_NUM)
".cfi_offset 33, %c[pc]\n"		".cfi_offset 33, %c[pc]\n"
".cfi_offset 30, %c[lr]\n"		".cfi_offset 30, %c[lr]\n"
"bl %c[StaticCrashHandler]\n"		"bl %c[StaticCrashHandler]\n"
"brk 1\n"		"brk 1\n"
		#elif defined(__riscv)
		".cfi_return_column 64\n"
		".cfi_def_cfa sp, 0\n"
		".cfi_offset 64, %[pc]\n"
		FOREACH_REGISTER(CFI_OFFSET_REG, CFI_OFFSET_NUM)
		"call %c[StaticCrashHandler]\n"
		"unimp\n"
#else		#else
#error "Unsupported architecture for fuzzing on Fuchsia"		#error "Unsupported architecture for fuzzing on Fuchsia"
#endif		#endif
".cfi_endproc\n"		".cfi_endproc\n"
".size CrashTrampolineAsm, . - CrashTrampolineAsm\n"		".size CrashTrampolineAsm, . - CrashTrampolineAsm\n"
".popsection\n"		".popsection\n"
".cfi_startproc\n"		".cfi_startproc\n"
: // No outputs		: // No outputs
: FOREACH_REGISTER(ASM_OPERAND_REG, ASM_OPERAND_NUM)		: FOREACH_REGISTER(ASM_OPERAND_REG, ASM_OPERAND_NUM)
		#if defined(__aarch64__) \|\| defined(__riscv)
		ASM_OPERAND_REG(pc)
		#endif
#if defined(__aarch64__)		#if defined(__aarch64__)
ASM_OPERAND_REG(pc) ASM_OPERAND_REG(lr)		ASM_OPERAND_REG(lr)
#endif		#endif
[StaticCrashHandler] "i"(StaticCrashHandler));		[StaticCrashHandler] "i"(StaticCrashHandler));
}		}

void CrashHandler() {		void CrashHandler() {
assert(SignalHandlerEvent != ZX_HANDLE_INVALID);		assert(SignalHandlerEvent != ZX_HANDLE_INVALID);

// This structure is used to ensure we close handles to objects we create in		// This structure is used to ensure we close handles to objects we create in
▲ Show 20 Lines • Show All 67 Lines • ▼ Show 20 Lines	ExitOnErr(_zx_thread_read_state(Thread.Handle, ZX_THREAD_STATE_GENERAL_REGS,
&GeneralRegisters,		&GeneralRegisters,
sizeof(GeneralRegisters)),		sizeof(GeneralRegisters)),
"_zx_thread_read_state");		"_zx_thread_read_state");

// To unwind properly, we need to push the crashing thread's register state		// To unwind properly, we need to push the crashing thread's register state
// onto the stack and jump into a trampoline with CFI instructions on how		// onto the stack and jump into a trampoline with CFI instructions on how
// to restore it.		// to restore it.
#if defined(__x86_64__)		#if defined(__x86_64__)

uintptr_t StackPtr =		uintptr_t StackPtr =
(GeneralRegisters.rsp - (128 + sizeof(GeneralRegisters))) &		(GeneralRegisters.rsp - (128 + sizeof(GeneralRegisters))) &
-(uintptr_t)16;		-(uintptr_t)16;
__unsanitized_memcpy(reinterpret_cast<void *>(StackPtr), &GeneralRegisters,		__unsanitized_memcpy(reinterpret_cast<void *>(StackPtr), &GeneralRegisters,
sizeof(GeneralRegisters));		sizeof(GeneralRegisters));
GeneralRegisters.rsp = StackPtr;		GeneralRegisters.rsp = StackPtr;
GeneralRegisters.rip = reinterpret_cast<zx_vaddr_t>(CrashTrampolineAsm);		GeneralRegisters.rip = reinterpret_cast<zx_vaddr_t>(CrashTrampolineAsm);

#elif defined(__aarch64__)		#elif defined(__aarch64__) \|\| defined(__riscv)

		MaskRayUnsubmitted Not Done Reply Inline Actions The prevailing style doesn't add a blank line after `#if` / `#elif`. These changes are also unrelated to the gist of the patch. Since they are made, I think that is fine. MaskRay: The prevailing style doesn't add a blank line after `#if` / `#elif`. These changes are also…
uintptr_t StackPtr =		uintptr_t StackPtr =
(GeneralRegisters.sp - sizeof(GeneralRegisters)) & -(uintptr_t)16;		(GeneralRegisters.sp - sizeof(GeneralRegisters)) & -(uintptr_t)16;
__unsanitized_memcpy(reinterpret_cast<void *>(StackPtr), &GeneralRegisters,		__unsanitized_memcpy(reinterpret_cast<void *>(StackPtr), &GeneralRegisters,
sizeof(GeneralRegisters));		sizeof(GeneralRegisters));
GeneralRegisters.sp = StackPtr;		GeneralRegisters.sp = StackPtr;
GeneralRegisters.pc = reinterpret_cast<zx_vaddr_t>(CrashTrampolineAsm);		GeneralRegisters.pc = reinterpret_cast<zx_vaddr_t>(CrashTrampolineAsm);

#else		#else
▲ Show 20 Lines • Show All 248 Lines • Show Last 20 Lines

This is an archive of the discontinued LLVM Phabricator instance.

[fuzzer][fuchsia] Support RISC-VClosedPublic

Details

Diff Detail

Event Timeline

Revision Contents

Diff 531926

compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake

compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp

[fuzzer][fuchsia] Support RISC-V
ClosedPublic