New lower emutls pass, fix linkage bugs.

[chh]

Summary

Previous implementation in http://reviews.llvm.org/D10522
created external references to __emutls_v.* variables.
Such references are inaccurate and cannot be handled by
all linkers, e.g. Android dynamic and gold linkers for aarch64.

Now a new LowerEmuTLS pass to go through all global variables,
and add emutls_v.* and emutls_t.* variables.
These __emutls* variables have the same linkage and
visibility as the associated user defined TLS variable.

Also removed old code that dump __emutls* variables in AsmPrinter.cpp,
and updated TLS unit tests.

[rnk]

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

394–395

Remind me why we bother making an IR-level GlobalVariable if we never want to emit it?

lib/CodeGen/SelectionDAG/TargetLowering.cpp

3072

I guess I didn't pay enough attention on the first review. :(

We really shouldn't be modifying the IR in TargetLowering. We have some instances of that, but we shouldn't be adding more.

Long term, if we want to stick with the IR lowering strategy, maybe we should do it as an IR pass. I seem to recall Chandler objected strongly to that, though.

Anyway, setting the initializer and linkage here for now seems fine.

3088

If we only need the global variable to make this GlobalAddress node, there are other ways to do that, like DAG.getExternalSymbol and DAG.getMCSymbol.

[chh]

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

394–395

We do emit it, when the controlled variable xyz is visited by this function.
At that time, it is easier to emit both "emutls_v.xyz" and "emutls_t.xyz".
Originally, I didn't want to put either of them into symbol table,
but it turned out that it's easier to reuse codegen to access address of "__emutls_v.xyz"
if it is a global variable.

lib/CodeGen/SelectionDAG/TargetLowering.cpp

3072

Agree, I thought about a special pass for TLS too, until I found the target dependent LowerGlobalTLSAddres.
So, here LowerToTLSEmulateMode is only a target independent special case of LowerGlobalTLSAddres.

3088

I tried to do that, but maybe I did not make it all correct for an external symbol.
What I found out after my initial implementation is that get address of an external symbol would fail to link if the symbol is defined with internal linkage, for some linkers. That's what this patch to fix. So I would now make the symbol as real as necessary here to generate code to get the address.

[rnk]

I think the fact that you're excluding __emutls_v variables in AsmPrinter shows that this approach isn't a good one, and we need to go back and do it differently.

I think an IR preparation transform is going to be the cleanest, most portable way to do this.

lib/CodeGen/SelectionDAG/TargetLowering.cpp

3088

True, you have to do lots of target specific things to get PIC access right.

[chh]

I think what you meant is to let AsmPrinter emit
emutls_v and emutls_t variables and those variables
should have complete definition in symbol table.
That should be doable.

How about the original TLS variable xyz?
It should be skipped when in emutls mode,
as it is done now in AsmPrinter, right?

[chh]

Now a new emutls lowering pass, plus fixing bugs.

[rnk]

The general approach seems reasonable to me, but IIRC a ModulePass creates a scheduling barrier in the PassManager pipeline. You probably want to schedule it first at the top of addPassesToGenerateCode in LLVMTargetMachine.cpp.

[chh]

Schedule LowerEmuTLS pass first at the top of addPassesToGenerateCode.

[chh]

ping.

[rnk]

lgtm

lib/CodeGen/LowerEmuTLS.cpp

42 ↗

(On Diff #43046)

What about COMDAT TLS variables? Consider this code:

template <typename T> struct A { static thread_local int x; };
int getX() { return A<int>::x++; }

Multiple TUs may instantiate A<int>::x, and we need __emutls_v._ZN1AIiE1xE to go in a comdat section.

Perhaps we can handle this in a subsequent patch, but it's good to think about.

105–106 ↗

(On Diff #43046)

Don't create an EVT object in IR transforms, they aren't needed.

A better way to write this would be:

IntegerType *WordType = DL.getIntPtrType(C, 0);

112–114 ↗

(On Diff #43046)

If you use cast<> instead of dyn_cast_or_null<>, this assertion will be performed for you implicitly.

[chh]

Handle comdat; simplify some code; add/update unit tests.

lib/CodeGen/LowerEmuTLS.cpp

42 ↗

(On Diff #43046)

Good catch. Please take a look of the new diff.
I added also some unit test to AArch64/emutls.ll.
Thanks.

105–106 ↗

(On Diff #43046)

Good suggestion. Thanks.

[rnk]

lgtm

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

 /// EmitGlobalVariable - Emit the specified global variable to the .s file.
 void AsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) {
   bool IsEmuTLSVar =
       GV->getThreadLocalMode() != llvm::GlobalVariable::NotThreadLocal &&
       TM.Options.EmulatedTLS;
   assert(!(IsEmuTLSVar && GV->hasCommonLinkage()) &&
          "No emulated TLS variables in the common section");
 
+  // When in emulated TLS mode, skip __emutls_v.* variables.
+  // __emutls_v.xyz and __emutls_t.xyz are emitted in place of xyz.
+  // __emutls_t.xyz is not in the symbol table.
+  if (TM.Options.EmulatedTLS && GV->getName().startswith("__emutls_v."))
+    return;
+
   if (GV->hasInitializer()) {
     // Check to see if this is a special global used by LLVM, if so, emit it.
     if (EmitSpecialLLVMGlobal(GV))
       return;
 
     // Skip the emission of global equivalents. The symbol can be emitted later
     // on by emitGlobalGOTEquivs in case it turns out to be needed.
     if (GlobalGOTEquivs.count(getSymbol(GV)))

lib/CodeGen/SelectionDAG/TargetLowering.cpp

SDValue TargetLowering::LowerToTLSEmulatedModel(const GlobalAddressSDNode *GA,
   //   __emutls_get_address( address of global variable named "__emutls_v.xyz" )
   EVT PtrVT = getPointerTy(DAG.getDataLayout());
   PointerType *VoidPtrType = Type::getInt8PtrTy(*DAG.getContext());
   SDLoc dl(GA);
 
   ArgListTy Args;
   ArgListEntry Entry;
   std::string NameString = ("__emutls_v." + GA->getGlobal()->getName()).str();
   Module *VariableModule = const_cast<Module*>(GA->getGlobal()->getParent());
   StringRef EmuTlsVarName(NameString);
   GlobalVariable *EmuTlsVar = VariableModule->getNamedGlobal(EmuTlsVarName);
-  if (!EmuTlsVar)
+  if (!EmuTlsVar) {
     EmuTlsVar = dyn_cast_or_null<GlobalVariable>(
         VariableModule->getOrInsertGlobal(EmuTlsVarName, VoidPtrType));
+    // EmuTlsVar should have the same linkage as its TLS variable.
+    // getOrInsertGlobal always creates new ExternalLinkage variable.
+    EmuTlsVar->setLinkage(GA->getGlobal()->getLinkage());
+    if (!EmuTlsVar->hasInitializer() &&
+        dyn_cast<GlobalVariable>(GA->getGlobal())->hasInitializer()) {
+      // A fake initializer is necessary to pass through all verification phases.
+      // Real initializer is computed later from the TLS variable.
+      EmuTlsVar->setInitializer(ConstantPointerNull::get(VoidPtrType));
+    }
+  }
   Entry.Node = DAG.getGlobalAddress(EmuTlsVar, dl, PtrVT);
   Entry.Ty = VoidPtrType;
   Args.push_back(Entry);
 
   SDValue EmuTlsGetAddr = DAG.getExternalSymbol("__emutls_get_address", PtrVT);
 
   TargetLowering::CallLoweringInfo CLI(DAG);
   CLI.setDebugLoc(dl).setChain(DAG.getEntryNode());
   CLI.setCallee(CallingConv::C, VoidPtrType, EmuTlsGetAddr, std::move(Args), 0);

test/CodeGen/AArch64/emutls.ll

 ; ARM64-NEXT:   ldr x0, [x0, :got_lo12:__emutls_v.i1]
 ; ARM64-NEXT:   bl __emutls_get_address
 ; ARM64-NEXT:   ldp x29, x30, [sp]
 
 entry:
   ret i32* @i1
 }
 
+define i32 @f5() nounwind {
+; ARM64-LABEL: f5:
+; ARM64:        adrp x0, __emutls_v.i3
+; ARM64:        add x0, x0, :lo12:__emutls_v.i3
+; ARM64-NEXT:   bl __emutls_get_address
+; ARM64-NEXT:   ldr w0, [x0]
+
+entry:
+  %tmp1 = load i32, i32* @i3
+  ret i32 %tmp1
+}
+
+define i32* @f6() {
+; ARM64-LABEL: f6:
+; ARM64:        adrp x0, __emutls_v.i3
+; ARM64:        add x0, x0, :lo12:__emutls_v.i3
+; ARM64-NEXT:   bl __emutls_get_address
+; ARM64-NEXT:   ldp x29, x30, [sp]
+
+entry:
+  ret i32* @i3
+}
+
+
 ;;;;;;;;;;;;;; 64-bit __emutls_v. and __emutls_t.
 
-; ARM64       .section .data.rel.local,
+; ARM64:      .data{{$}}
+; ARM64:      .globl __emutls_v.i1
 ; ARM64-LABEL: __emutls_v.i1:
 ; ARM64-NEXT: .xword 4
 ; ARM64-NEXT: .xword 4
 ; ARM64-NEXT: .xword 0
 ; ARM64-NEXT: .xword __emutls_t.i1
 
-; ARM64       .section .rodata,
+; ARM64:      .section .rodata,
 ; ARM64-LABEL: __emutls_t.i1:
 ; ARM64-NEXT: .word 15
 
 ; ARM64-NOT:   __emutls_v.i2
 
-; ARM64       .section .data.rel.local,
+; ARM64:      .data{{$}}
+; ARM64-NOT:  .globl
 ; ARM64-LABEL: __emutls_v.i3:
 ; ARM64-NEXT: .xword 4
 ; ARM64-NEXT: .xword 4
 ; ARM64-NEXT: .xword 0
 ; ARM64-NEXT: .xword __emutls_t.i3
 
-; ARM64       .section .rodata,
+; ARM64:      .section .rodata,
 ; ARM64-LABEL: __emutls_t.i3:
 ; ARM64-NEXT: .word 15
 
-; ARM64       .section .data.rel.local,
+; ARM64:      .hidden __emutls_v.i4
+; ARM64:      .data{{$}}
+; ARM64:      .globl __emutls_v.i4
 ; ARM64-LABEL: __emutls_v.i4:
 ; ARM64-NEXT: .xword 4
 ; ARM64-NEXT: .xword 4
 ; ARM64-NEXT: .xword 0
 ; ARM64-NEXT: .xword __emutls_t.i4
 
-; ARM64       .section .rodata,
+; ARM64:      .section .rodata,
 ; ARM64-LABEL: __emutls_t.i4:
 ; ARM64-NEXT: .word 15
 
 ; ARM64-NOT:   __emutls_v.i5:
-; ARM64       .hidden __emutls_v.i5
+; ARM64:      .hidden __emutls_v.i5
 ; ARM64-NOT:   __emutls_v.i5:
 
-; ARM64       .section .data.rel.local,
+; ARM64:      .data{{$}}
+; ARM64:      .globl __emutls_v.s1
 ; ARM64-LABEL: __emutls_v.s1:
 ; ARM64-NEXT: .xword 2
 ; ARM64-NEXT: .xword 2
 ; ARM64-NEXT: .xword 0
 ; ARM64-NEXT: .xword __emutls_t.s1
 
-; ARM64       .section .rodata,
+; ARM64:      .section .rodata,
 ; ARM64-LABEL: __emutls_t.s1:
 ; ARM64-NEXT: .hword 15
 
-; ARM64       .section .data.rel.local,
+; ARM64:      .data{{$}}
 ; ARM64-LABEL: __emutls_v.b1:
 ; ARM64-NEXT: .xword 1
 ; ARM64-NEXT: .xword 1
 ; ARM64-NEXT: .xword 0
 ; ARM64-NEXT: .xword 0
 
 ; ARM64-NOT:  __emutls_t.b1

test/CodeGen/AArch64/emutls_generic.ll

 ; ARM_64-LABEL:  get_external_y:
 ; ARM_64:      __emutls_v.external_y
 ; ARM_64:      __emutls_get_address
 ; ARM_64-LABEL:  get_internal_y:
 ; ARM_64:      __emutls_v.internal_y
 ; ARM_64:      __emutls_get_address
 ; ARM_64-NOT:   __emutls_t.external_x
 ; ARM_64-NOT:   __emutls_v.external_x:
+; ARM_64:        .data{{$}}
+; ARM_64:        .globl __emutls_v.external_y
 ; ARM_64:        .align 3
 ; ARM_64-LABEL:  __emutls_v.external_y:
 ; ARM_64-NEXT:   .xword 1
 ; ARM_64-NEXT:   .xword 2
 ; ARM_64-NEXT:   .xword 0
 ; ARM_64-NEXT:   .xword __emutls_t.external_y
 ; ARM_64-NOT:    __emutls_v.external_x:
 ; ARM_64:        .section .rodata,
 ; ARM_64-LABEL:  __emutls_t.external_y:
 ; ARM_64-NEXT:   .byte 7
-; ARM_64:        .data
+; ARM_64:        .data{{$}}
+; ARM_64-NOT:    .globl __emutls_v
 ; ARM_64:        .align 3
 ; ARM_64-LABEL:  __emutls_v.internal_y:
 ; ARM_64-NEXT:   .xword 8
 ; ARM_64-NEXT:   .xword 16
 ; ARM_64-NEXT:   .xword 0
 ; ARM_64-NEXT:   .xword __emutls_t.internal_y
 ; ARM_64:        .section .rodata,
 ; ARM_64-LABEL:  __emutls_t.internal_y:
 ; ARM_64-NEXT:   .xword 9

test/CodeGen/ARM/emutls.ll

 ; RUN: llc -emulated-tls -mtriple=arm-linux-android \
 ; RUN:     -relocation-model=pic < %s | FileCheck -check-prefix=ARM32 %s
 
 ; Copied from X86/emutls.ll
 
 ; Use my_emutls_get_address like __emutls_get_address.
 @my_emutls_v_xyz = external global i8*, align 4
 declare i8* @my_emutls_get_address(i8*)
 
 define i32 @my_get_xyz() {
 ; ARM32-LABEL: my_get_xyz:
 ; ARM32:        ldr r0,
 ; ARM32:        ldr r0, [pc, r0]
 ; ARM32-NEXT:   bl my_emutls_get_address(PLT)
 ; ARM32-NEXT:   ldr r0, [r0]
+; ARM32:        .long my_emutls_v_xyz(GOT_PREL)
 
 entry:
   %call = call i8* @my_emutls_get_address(i8* bitcast (i8** @my_emutls_v_xyz to i8*))
   %0 = bitcast i8* %call to i32*
   %1 = load i32, i32* %0, align 4
   ret i32 %1
 }
 
 @i1 = thread_local global i32 15
 @i2 = external thread_local global i32
 @i3 = internal thread_local global i32 15
 @i4 = hidden thread_local global i32 15
 @i5 = external hidden thread_local global i32
 @s1 = thread_local global i16 15
 @b1 = thread_local global i8 0
 
 define i32 @f1() {
 ; ARM32-LABEL: f1:
 ; ARM32:        ldr r0,
 ; ARM32:        ldr r0, [pc, r0]
 ; ARM32-NEXT:   bl __emutls_get_address(PLT)
 ; ARM32-NEXT:   ldr r0, [r0]
+; ARM32:        .long __emutls_v.i1(GOT_PREL)
 
 entry:
   %tmp1 = load i32, i32* @i1
   ret i32 %tmp1
 }
 
 define i32* @f2() {
 ; ARM32-LABEL: f2:
 ; ARM32:        ldr r0,
 ; ARM32:        ldr r0, [pc, r0]
 ; ARM32-NEXT:   bl __emutls_get_address(PLT)
 ; ARM32-NEXT:   pop
+; ARM32:        .long __emutls_v.i1(GOT_PREL)
 
 entry:
   ret i32* @i1
 }
 
 define i32 @f3() nounwind {
 ; ARM32-LABEL: f3:
 ; ARM32:        ldr r0,
 ; ARM32:        ldr r0, [pc, r0]
 ; ARM32-NEXT:   bl __emutls_get_address(PLT)
 ; ARM32-NEXT:   ldr r0, [r0]
+; ARM32:        .long __emutls_v.i2(GOT_PREL)
 
 entry:
   %tmp1 = load i32, i32* @i2
   ret i32 %tmp1
 }
 
 define i32* @f4() {
 ; ARM32-LABEL: f4:
 ; ARM32:        ldr r0,
 ; ARM32:        ldr r0, [pc, r0]
 ; ARM32-NEXT:   bl __emutls_get_address(PLT)
 ; ARM32-NEXT:   pop
+; ARM32:        .long __emutls_v.i2(GOT_PREL)
 
 entry:
   ret i32* @i2
 }
 
 define i32 @f5() nounwind {
 ; ARM32-LABEL: f5:
 ; ARM32:        ldr r0,
-; ARM32:        ldr r0, [pc, r0]
+; ARM32:        add r0, pc, r0
 ; ARM32-NEXT:   bl __emutls_get_address(PLT)
 ; ARM32-NEXT:   ldr r0, [r0]
+; ARM32:        .long __emutls_v.i3-
 
 entry:
   %tmp1 = load i32, i32* @i3
   ret i32 %tmp1
 }
 
 define i32* @f6() {
 ; ARM32-LABEL: f6:
 ; ARM32:        ldr r0,
-; ARM32:        ldr r0, [pc, r0]
+; ARM32:        add r0, pc, r0
 ; ARM32-NEXT:   bl __emutls_get_address(PLT)
 ; ARM32-NEXT:   pop
+; ARM32:        .long __emutls_v.i3-
 
 entry:
   ret i32* @i3
 }
 
 define i32 @f7() {
 ; ARM32-LABEL: f7:
 ; ARM32:        ldr r0,
 ; ARM32:        ldr r0, [pc, r0]
 ; ARM32-NEXT:   bl __emutls_get_address(PLT)
 ; ARM32-NEXT:   ldr r0, [r0]
+; ARM32:        .long __emutls_v.i4(GOT_PREL)
 
 entry:
   %tmp1 = load i32, i32* @i4
   ret i32 %tmp1
 }
 
 define i32* @f8() {
 ; ARM32-LABEL: f8:
 ; ARM32:        ldr r0,
 ; ARM32:        ldr r0, [pc, r0]
 ; ARM32-NEXT:   bl __emutls_get_address(PLT)
 ; ARM32-NEXT:   pop
+; ARM32:        .long __emutls_v.i4(GOT_PREL)
 
 entry:
   ret i32* @i4
 }
 
 define i32 @f9() {
 ; ARM32-LABEL: f9:
 ; ARM32:        ldr r0,

 entry:
   %tmp1 = load i8, i8* @b1
   %tmp2 = sext i8 %tmp1 to i32
   ret i32 %tmp2
 }
 
 ;;;;;;;;;;;;;; 32-bit __emutls_v. and __emutls_t.
 
-; ARM32       .section .data.rel.local,
+; ARM32:      .data{{$}}
+; ARM32:      .globl __emutls_v.i1
 ; ARM32-LABEL: __emutls_v.i1:
 ; ARM32-NEXT: .long 4
 ; ARM32-NEXT: .long 4
 ; ARM32-NEXT: .long 0
 ; ARM32-NEXT: .long __emutls_t.i1
 
-; ARM32       .section .rodata,
+; ARM32:      .section .rodata,
 ; ARM32-LABEL: __emutls_t.i1:
 ; ARM32-NEXT: .long 15
 
 ; ARM32-NOT:   __emutls_v.i2
 
-; ARM32       .section .data.rel.local,
+; ARM32:      .data{{$}}
+; ARM32-NOT:  .globl
 ; ARM32-LABEL: __emutls_v.i3:
 ; ARM32-NEXT: .long 4
 ; ARM32-NEXT: .long 4
 ; ARM32-NEXT: .long 0
 ; ARM32-NEXT: .long __emutls_t.i3
 
-; ARM32       .section .rodata,
+; ARM32:      .section .rodata,
 ; ARM32-LABEL: __emutls_t.i3:
 ; ARM32-NEXT: .long 15
 
-; ARM32       .section .data.rel.local,
+; ARM32:      .data{{$}}
+; ARM32:      .globl __emutls_v.i4
 ; ARM32-LABEL: __emutls_v.i4:
 ; ARM32-NEXT: .long 4
 ; ARM32-NEXT: .long 4
 ; ARM32-NEXT: .long 0
 ; ARM32-NEXT: .long __emutls_t.i4
 
-; ARM32       .section .rodata,
+; ARM32:      .section .rodata,
 ; ARM32-LABEL: __emutls_t.i4:
 ; ARM32-NEXT: .long 15
 
 ; ARM32-NOT:   __emutls_v.i5:
-; ARM32       .hidden __emutls_v.i5
+; ARM32:      .hidden __emutls_v.i5
 ; ARM32-NOT:   __emutls_v.i5:
 
-; ARM32 .section .data.rel.local,
+; ARM32:      .data{{$}}
+; ARM32:      .globl __emutls_v.s1
 ; ARM32-LABEL: __emutls_v.s1:
 ; ARM32-NEXT: .long 2
 ; ARM32-NEXT: .long 2
 ; ARM32-NEXT: .long 0
 ; ARM32-NEXT: .long __emutls_t.s1
 
 ; ARM32 .section .rodata,
 ; ARM32-LABEL: __emutls_t.s1:
 ; ARM32-NEXT: .short 15
 
-; ARM32 .section .data.rel.local,
+; ARM32:      .data{{$}}
+; ARM32:      .globl __emutls_v.b1
 ; ARM32-LABEL: __emutls_v.b1:
 ; ARM32-NEXT: .long 1
 ; ARM32-NEXT: .long 1
 ; ARM32-NEXT: .long 0
 ; ARM32-NEXT: .long 0
 
 ; ARM32-NOT:   __emutls_t.b1

test/CodeGen/ARM/emutls_generic.ll

 
 ; ARM_32-LABEL:  get_external_x:
 ; ARM_32:        bl __emutls_get_address
 ; ARM_32:        .long __emutls_v.external_x
 ; ARM_32-LABEL:  get_external_y:
 ; ARM_32:        bl __emutls_get_address
 ; ARM_32:        .long __emutls_v.external_y
 ; ARM_32-LABEL:  get_internal_y:
-; ARM_32:      bl __emutls_get_address
-; ARM_32:      .long __emutls_v.internal_y
-; ARM_32-NOT:   __emutls_t.external_x
-; ARM_32-NOT:   __emutls_v.external_x:
-; ARM_32:        .data
+; ARM_32:        bl __emutls_get_address
+; ARM_32:        .long __emutls_v.internal_y
+; ARM_32-NOT:    __emutls_t.external_x
+; ARM_32-NOT:    __emutls_v.external_x:
+; ARM_32:        .data{{$}}
+; ARM_32:        .globl __emutls_v.external_y
 ; ARM_32:        .align 2
 ; ARM_32-LABEL:  __emutls_v.external_y:
 ; ARM_32-NEXT:   .long 1
 ; ARM_32-NEXT:   .long 2
 ; ARM_32-NEXT:   .long 0
 ; ARM_32-NEXT:   .long __emutls_t.external_y
 ; ARM_32:        .section .rodata,
 ; ARM_32-LABEL:  __emutls_t.external_y:
 ; ARM_32-NEXT:   .byte 7
-; ARM_32:        .data
+; ARM_32:        .data{{$}}
+; ARM_32-NOT:    .globl
 ; ARM_32:        .align 2
 ; ARM_32-LABEL:  __emutls_v.internal_y:
 ; ARM_32-NEXT:   .long 8
 ; ARM_32-NEXT:   .long 16
 ; ARM_32-NEXT:   .long 0
 ; ARM_32-NEXT:   .long __emutls_t.internal_y
 ; ARM_32-LABEL:  __emutls_t.internal_y:
 ; ARM_32-NEXT:   .long 9
 ; ARM_32-NEXT:   .long 0

test/CodeGen/X86/emutls-pic.ll

 entry:
   %0 = load i32, i32* @j, align 4
   %1 = load i32, i32* @k, align 4
   %add = add nsw i32 %0, %1
   ret i32 %add
 }
 
 ; X32-LABEL: f5:
-; X32:      movl __emutls_v.j@GOT(%ebx), %eax
+; X32:      leal __emutls_v.j@GOTOFF(%ebx), %eax
 ; X32-NEXT: movl %eax, (%esp)
 ; X32-NEXT: calll __emutls_get_address@PLT
 ; X32-NEXT: movl (%eax), %esi
-; X32-NEXT: movl __emutls_v.k@GOT(%ebx), %eax
+; X32-NEXT: leal __emutls_v.k@GOTOFF(%ebx), %eax
 ; X32-NEXT: movl %eax, (%esp)
 ; X32-NEXT: calll __emutls_get_address@PLT
 ; X32-NEXT: addl (%eax), %esi
 ; X32-NEXT: movl %esi, %eax
 
 ; X64-LABEL: f5:
-; X64:      movq __emutls_v.j@GOTPCREL(%rip), %rdi
+; X64:      leaq __emutls_v.j(%rip), %rdi
 ; X64-NEXT: callq __emutls_get_address@PLT
 ; X64-NEXT: movl (%rax), %ebx
-; X64-NEXT: movq __emutls_v.k@GOTPCREL(%rip), %rdi
+; X64-NEXT: leaq __emutls_v.k(%rip), %rdi
 ; X64-NEXT: callq __emutls_get_address@PLT
 ; X64-NEXT: addl (%rax), %ebx
 ; X64-NEXT: movl %ebx, %eax
 
 ;;;;; 32-bit targets
 
-; X32:      .data
+; X32:      .data{{$}}
+; X32:      .globl __emutls_v.i
 ; X32-LABEL: __emutls_v.i:
 ; X32-NEXT: .long 4
 ; X32-NEXT: .long 4
 ; X32-NEXT: .long 0
 ; X32-NEXT: .long __emutls_t.i
 
 ; X32:      .section .rodata,
 ; X32-LABEL: __emutls_t.i:
 ; X32-NEXT: .long 15
 
-; X32:      .data
+; X32:      .data{{$}}
+; X32-NOT:  .globl
 ; X32-LABEL: __emutls_v.j:
 ; X32-NEXT: .long 4
 ; X32-NEXT: .long 4
 ; X32-NEXT: .long 0
 ; X32-NEXT: .long __emutls_t.j
 
 ; X32:      .section .rodata,
 ; X32-LABEL: __emutls_t.j:
 ; X32-NEXT: .long 42
 
-; X32:      .data
+; X32:      .data{{$}}
+; X32-NOT:  .globl
 ; X32-LABEL: __emutls_v.k:
 ; X32-NEXT: .long 4
 ; X32-NEXT: .long 8
 ; X32-NEXT: .long 0
 ; X32-NEXT: .long 0
 
 ; X32-NOT:   __emutls_t.k:
 
 ;;;;; 64-bit targets
 
-; X64:      .data
+; X64:      .data{{$}}
+; X64:      .globl __emutls_v.i
 ; X64-LABEL: __emutls_v.i:
 ; X64-NEXT: .quad 4
 ; X64-NEXT: .quad 4
 ; X64-NEXT: .quad 0
 ; X64-NEXT: .quad __emutls_t.i
 
 ; X64:      .section .rodata,
 ; X64-LABEL: __emutls_t.i:
 ; X64-NEXT: .long 15
 
-; X64:      .data
+; X64:      .data{{$}}
+; X64-NOT:  .globl
 ; X64-LABEL: __emutls_v.j:
 ; X64-NEXT: .quad 4
 ; X64-NEXT: .quad 4
 ; X64-NEXT: .quad 0
 ; X64-NEXT: .quad __emutls_t.j
 
 ; X64:      .section .rodata,
 ; X64-LABEL: __emutls_t.j:
 ; X64-NEXT: .long 42
 
-; X64:      .data
+; X64:      .data{{$}}
+; X64-NOT:  .globl
 ; X64-LABEL: __emutls_v.k:
 ; X64-NEXT: .quad 4
 ; X64-NEXT: .quad 8
 ; X64-NEXT: .quad 0
 ; X64-NEXT: .quad 0
 
 ; X64-NOT:   __emutls_t.k:

test/CodeGen/X86/emutls_generic.ll

 ; CHECK-LABEL: __emutls_v.external_y:
 ; CHECK-LABEL: __emutls_t.external_y:
 ; CHECK:       __emutls_t.external_y
 ; CHECK-LABEL: __emutls_v.internal_y:
 ; CHECK-LABEL: __emutls_t.internal_y:
 ; CHECK:       __emutls_t.internal_y
 
 ; X86_32-LABEL:  get_external_x:
-; X86_32:        movl __emutls_v.external_x
+; X86_32:        movl __emutls_v.external_x@GOT(%ebx)
 ; X86_32:        calll __emutls_get_address
 ; X86_32-LABEL:  get_external_y:
-; X86_32:        movl __emutls_v.external_y
+; X86_32:        movl __emutls_v.external_y@GOT(%ebx)
 ; X86_32:        calll __emutls_get_address
 ; X86_32-LABEL:  get_internal_y:
-; X86_32:      movl __emutls_v.internal_y
-; X86_32:      calll __emutls_get_address
-; X86_32-NOT:   __emutls_t.external_x
-; X86_32-NOT:   __emutls_v.external_x:
-; X86_32:        .data
+; X86_32:        leal __emutls_v.internal_y@GOTOFF(%ebx)
+; X86_32:        calll __emutls_get_address
+; X86_32-NOT:    __emutls_t.external_x
+; X86_32-NOT:    __emutls_v.external_x:
+; X86_32:        .data{{$}}
+; X86_32:        .globl __emutls_v.external_y
 ; X86_32:        .align 4
 ; X86_32-LABEL:  __emutls_v.external_y:
 ; X86_32-NEXT:   .long 1
 ; X86_32-NEXT:   .long 2
 ; X86_32-NEXT:   .long 0
 ; X86_32-NEXT:   .long __emutls_t.external_y
 ; X86_32:        .section .rodata,
 ; X86_32-LABEL:  __emutls_t.external_y:
 ; X86_32-NEXT:   .byte 7
-; X86_32:        .data
+; X86_32:        .data{{$}}
+; X86_32-NOT:    .globl
 ; X86_32:        .align 4
 ; X86_32-LABEL:  __emutls_v.internal_y:
 ; X86_32-NEXT:   .long 8
 ; X86_32-NEXT:   .long 16
 ; X86_32-NEXT:   .long 0
 ; X86_32-NEXT:   .long __emutls_t.internal_y
 ; X86_32-LABEL:  __emutls_t.internal_y:
 ; X86_32-NEXT:   .quad 9
 ; X86_64-LABEL:  get_external_x:
-; X86_64:      __emutls_v.external_x
-; X86_64:      __emutls_get_address
+; X86_64:        __emutls_v.external_x@GOTPCREL(%rip)
+; X86_64:        __emutls_get_address
 ; X86_64-LABEL:  get_external_y:
-; X86_64:      __emutls_v.external_y
-; X86_64:      __emutls_get_address
+; X86_64:        __emutls_v.external_y@GOTPCREL(%rip)
+; X86_64:        __emutls_get_address
 ; X86_64-LABEL:  get_internal_y:
-; X86_64:      __emutls_v.internal_y
-; X86_64:      __emutls_get_address
-; X86_64-NOT:   __emutls_t.external_x
-; X86_64-NOT:   __emutls_v.external_x:
+; X86_64:        __emutls_v.internal_y(%rip)
+; X86_64:        __emutls_get_address
+; X86_64-NOT:    __emutls_t.external_x
+; X86_64-NOT:    __emutls_v.external_x:
+; X86_64:        .globl __emutls_v.external_y
 ; X86_64:        .align 8
 ; X86_64-LABEL:  __emutls_v.external_y:
 ; X86_64-NEXT:   .quad 1
 ; X86_64-NEXT:   .quad 2
 ; X86_64-NEXT:   .quad 0
 ; X86_64-NEXT:   .quad __emutls_t.external_y
 ; X86_64-NOT:    __emutls_v.external_x:
 ; X86_64:        .section .rodata,
 ; X86_64-LABEL:  __emutls_t.external_y:
 ; X86_64-NEXT:   .byte 7
-; X86_64:        .data
+; X86_64:        .data{{$}}
+; X86_64-NOT:    .globl
 ; X86_64:        .align 8
 ; X86_64-LABEL:  __emutls_v.internal_y:
 ; X86_64-NEXT:   .quad 8
 ; X86_64-NEXT:   .quad 16
 ; X86_64-NEXT:   .quad 0
 ; X86_64-NEXT:   .quad __emutls_t.internal_y
 ; X86_64:        .section .rodata,
 ; X86_64-LABEL:  __emutls_t.internal_y:
 ; X86_64-NEXT:   .quad 9