Pre-commit test for D151696.

[FreddyYe]

Summary

Meanwhile this patch added missing tests for supported CPU names
of cpu_dispatch/specific attribute and added more CHECKs for
resolver function.

[FreddyYe]

As mentioned in https://reviews.llvm.org/D151696, ping here, too. I want to land this patch first so that I could add some new Intel CPUs in this test supported in https://reviews.llvm.org/D151696

[FreddyYe]

Added more checks for resolver function.

[FreddyYe]

ping for review.

[pengfei]

clang/test/CodeGen/attr-cpuspecific-cpus.c

2–3

Is it only to check no compile warning/error? Should we add a -verify?

9

_MSC_VER or _WIN64?

[FreddyYe]

address comments.

[FreddyYe]

It came to me a better style:

ATTR(cpu_specific(generic)) void CPU1(void){}
ATTR(cpu_specific(pentium_pro)) void CPU2(void){}
ATTR(cpu_specific(pentium_mmx)) void CPU3(void){}
ATTR(cpu_specific(pentium_ii)) void CPU4(void){}
ATTR(cpu_specific(pentium_iii)) void CPU5(void){}
ATTR(cpu_specific(pentium_iii_no_xmm_regs)) void CPU6(void){}
...

My purpose here is only to check if the cpu name string is valid for cpu_specific. So this also looks good, though it doesn't do the multiversion. I'll change into this style if no objections.

clang/test/CodeGen/attr-cpuspecific-cpus.c

2–3

Yes, that's my purpose. Will do.

9

Good catch.

[FreddyYe]

Change into a more simplified style.

[pengfei]

LGTM.

[skan]

clang/test/CodeGen/attr-cpuspecific-cpus.c

13

Shouldn't we use the same function name?

[FreddyYe]

clang/test/CodeGen/attr-cpuspecific-cpus.c

13

Emmm... it would involve a new problem that some aliased cpu names would result a diagnostic like this:

definition with same mangled name 'CPU.H' as another definition

This is expected but my original purpose here is only to check if cpu name strings are valid. If you prefer, I can change into a style that makes the non-alias CPU names use the same function and makes the aliased ones' function names indexed. WDYT?

[skan]

clang/test/CodeGen/attr-cpuspecific-cpus.c

13

That would make sense to me.

[FreddyYe]

Seperate ALIAS CPUs.

[skan]

LGTM

clang/test/CodeGen/attr-cpuspecific-cpus.c

+// RUN: %clang_cc1 -verify -triple x86_64-linux-gnu -emit-llvm -o - %s
+// RUN: %clang_cc1 -verify -triple x86_64-windows-pc -fms-compatibility -emit-llvm -o - %s
+
+// expected-no-diagnostics
+
+#ifdef _WIN64
+#define ATTR(X) __declspec(X)
+#else
+#define ATTR(X) __attribute__((X))
+#endif // _WIN64
+
+ATTR(cpu_specific(generic)) void CPU(void){}
+ATTR(cpu_specific(pentium)) void CPU(void){}
+ATTR(cpu_specific(pentium_pro)) void CPU(void){}
+ATTR(cpu_specific(pentium_mmx)) void CPU(void){}
+ATTR(cpu_specific(pentium_ii)) void CPU(void){}
+ATTR(cpu_specific(pentium_iii)) void CPU(void){}
+ATTR(cpu_specific(pentium_4)) void CPU(void){}
+ATTR(cpu_specific(pentium_m)) void CPU(void){}
+ATTR(cpu_specific(pentium_4_sse3)) void CPU(void){}
+ATTR(cpu_specific(core_2_duo_ssse3)) void CPU(void){}
+ATTR(cpu_specific(core_2_duo_sse4_1)) void CPU(void){}
+ATTR(cpu_specific(atom)) void CPU(void){}
+ATTR(cpu_specific(atom_sse4_2)) void CPU(void){}
+ATTR(cpu_specific(core_i7_sse4_2)) void CPU(void){}
+ATTR(cpu_specific(core_aes_pclmulqdq)) void CPU(void){}
+ATTR(cpu_specific(atom_sse4_2_movbe)) void CPU(void){}
+ATTR(cpu_specific(goldmont)) void CPU(void){}
+ATTR(cpu_specific(sandybridge)) void CPU(void){}
+ATTR(cpu_specific(ivybridge)) void CPU(void){}
+ATTR(cpu_specific(haswell)) void CPU(void){}
+ATTR(cpu_specific(core_4th_gen_avx_tsx)) void CPU(void){}
+ATTR(cpu_specific(broadwell)) void CPU(void){}
+ATTR(cpu_specific(core_5th_gen_avx_tsx)) void CPU(void){}
+ATTR(cpu_specific(knl)) void CPU(void){}
+ATTR(cpu_specific(skylake)) void CPU(void){}
+ATTR(cpu_specific(skylake_avx512)) void CPU(void){}
+ATTR(cpu_specific(cannonlake)) void CPU(void){}
+ATTR(cpu_specific(knm)) void CPU(void){}
+
+// ALIAS CPUs
+ATTR(cpu_specific(pentium_iii_no_xmm_regs)) void CPU0(void){}
+ATTR(cpu_specific(core_2nd_gen_avx)) void CPU1(void){}
+ATTR(cpu_specific(core_3rd_gen_avx)) void CPU2(void){}
+ATTR(cpu_specific(core_4th_gen_avx)) void CPU3(void){}
+ATTR(cpu_specific(core_5th_gen_avx)) void CPU4(void){}
+ATTR(cpu_specific(mic_avx512)) void CPU5(void){}

clang/test/CodeGen/attr-cpuspecific.c

 // RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,LINUX
 // RUN: %clang_cc1 -triple x86_64-windows-pc -fms-compatibility -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,WINDOWS
 
 #ifdef _WIN64
 #define ATTR(X) __declspec(X)
 #else
 #define ATTR(X) __attribute__((X))
-#endif // _MSC_VER
+#endif // _WIN64
 
 // Each version should have an IFunc and an alias.
 // LINUX: @SingleVersion = weak_odr alias void (), ptr @SingleVersion.ifunc
 // LINUX: @TwoVersions = weak_odr alias void (), ptr @TwoVersions.ifunc
 // LINUX: @OrderDispatchUsageSpecific = weak_odr alias void (), ptr @OrderDispatchUsageSpecific.ifunc
 // LINUX: @TwoVersionsSameAttr = weak_odr alias void (), ptr @TwoVersionsSameAttr.ifunc
 // LINUX: @ThreeVersionsSameAttr = weak_odr alias void (), ptr @ThreeVersionsSameAttr.ifunc
 // LINUX: @OrderSpecificUsageDispatch = weak_odr alias void (), ptr @OrderSpecificUsageDispatch.ifunc

 void SingleVersion(void){}
 // LINUX: define{{.*}} void @SingleVersion.S() #[[S:[0-9]+]]
 // WINDOWS: define dso_local void @SingleVersion.S() #[[S:[0-9]+]]
 
 ATTR(cpu_dispatch(ivybridge))
 void SingleVersion(void);
 // LINUX: define weak_odr ptr @SingleVersion.resolver()
 // LINUX: call void @__cpu_indicator_init
+// LINUX: %[[FEAT_INIT:.+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0), align 4
+// LINUX: %[[FEAT_JOIN:.+]] = and i32 %[[FEAT_INIT]], 1023
+// LINUX: %[[FEAT_CHECK:.+]] = icmp eq i32 %[[FEAT_JOIN]], 1023
 // LINUX: ret ptr @SingleVersion.S
 // LINUX: call void @llvm.trap
 // LINUX: unreachable
 
 // WINDOWS: define weak_odr dso_local void @SingleVersion() comdat
 // WINDOWS: call void @__cpu_indicator_init()
+// WINDOWS: %[[FEAT_INIT:.+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0), align 4
+// WINDOWS: %[[FEAT_JOIN:.+]] = and i32 %[[FEAT_INIT]], 1023
+// WINDOWS: %[[FEAT_CHECK:.+]] = icmp eq i32 %[[FEAT_JOIN]], 1023
 // WINDOWS: call void @SingleVersion.S()
 // WINDOWS-NEXT: ret void
 // WINDOWS: call void @llvm.trap
 // WINDOWS: unreachable
 
 ATTR(cpu_specific(ivybridge))
 void NotCalled(void){}
 // LINUX: define{{.*}} void @NotCalled.S() #[[S]]
 // WINDOWS: define dso_local void @NotCalled.S() #[[S:[0-9]+]]
 
 // Done before any of the implementations.  Also has an undecorated forward
 // declaration.
 void TwoVersions(void);
 
 ATTR(cpu_dispatch(ivybridge, knl))
 void TwoVersions(void);
 // LINUX: define weak_odr ptr @TwoVersions.resolver()
 // LINUX: call void @__cpu_indicator_init
+// LINUX: %[[FEAT_INIT:.+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0), align 4
+// LINUX: %[[FEAT_JOIN:.+]] = and i32 %[[FEAT_INIT]], 58836991
+// LINUX: %[[FEAT_CHECK:.+]] = icmp eq i32 %[[FEAT_JOIN]], 58836991
 // LINUX: ret ptr @TwoVersions.Z
 // LINUX: ret ptr @TwoVersions.S
 // LINUX: call void @llvm.trap
 // LINUX: unreachable
 
 // WINDOWS: define weak_odr dso_local void @TwoVersions() comdat
 // WINDOWS: call void @__cpu_indicator_init()
+// WINDOWS: %[[FEAT_INIT:.+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0), align 4
+// WINDOWS: %[[FEAT_JOIN:.+]] = and i32 %[[FEAT_INIT]], 58836991
+// WINDOWS: %[[FEAT_CHECK:.+]] = icmp eq i32 %[[FEAT_JOIN]], 58836991
 // WINDOWS: call void @TwoVersions.Z()
 // WINDOWS-NEXT: ret void
 // WINDOWS: call void @TwoVersions.S()
 // WINDOWS-NEXT: ret void
 // WINDOWS: call void @llvm.trap
 // WINDOWS: unreachable
 
 ATTR(cpu_specific(ivybridge))