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Show First 20 Lines • Show All 2,666 Lines • ▼ Show 20 Lines	unsigned X86TargetLowering::getVectorTypeBreakdownForCallingConv(
if (VT == MVT::v64i1 && Subtarget.hasBWI() && !Subtarget.useAVX512Regs() &&		if (VT == MVT::v64i1 && Subtarget.hasBWI() && !Subtarget.useAVX512Regs() &&
CC != CallingConv::X86_RegCall) {		CC != CallingConv::X86_RegCall) {
RegisterVT = MVT::v32i8;		RegisterVT = MVT::v32i8;
IntermediateVT = MVT::v32i1;		IntermediateVT = MVT::v32i1;
NumIntermediates = 2;		NumIntermediates = 2;
return 2;		return 2;
}		}

		// Split vNbf16 vectors according to vNf16.
		if (VT.isVector() && VT.getVectorElementType() == MVT::bf16)
		VT = VT.changeVectorElementType(MVT::f16);

return TargetLowering::getVectorTypeBreakdownForCallingConv(Context, CC, VT, IntermediateVT,		return TargetLowering::getVectorTypeBreakdownForCallingConv(Context, CC, VT, IntermediateVT,
NumIntermediates, RegisterVT);		NumIntermediates, RegisterVT);
}		}

EVT X86TargetLowering::getSetCCResultType(const DataLayout &DL,		EVT X86TargetLowering::getSetCCResultType(const DataLayout &DL,
LLVMContext& Context,		LLVMContext& Context,
EVT VT) const {		EVT VT) const {
if (!VT.isVector())		if (!VT.isVector())
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llvm/test/CodeGen/X86/bfloat.ll

	Show First 20 Lines • Show All 559 Lines • ▼ Show 20 Lines
	; BF16-NEXT: vmovd %xmm0, %ecx			; BF16-NEXT: vmovd %xmm0, %ecx
	; BF16-NEXT: vmovd %ecx, %xmm0			; BF16-NEXT: vmovd %ecx, %xmm0
	; BF16-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0			; BF16-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0
	; BF16-NEXT: retq			; BF16-NEXT: retq
	%1 = insertelement <2 x bfloat> undef, bfloat %a, i64 0			%1 = insertelement <2 x bfloat> undef, bfloat %a, i64 0
	%2 = insertelement <2 x bfloat> %1, bfloat %b, i64 1			%2 = insertelement <2 x bfloat> %1, bfloat %b, i64 1
	ret <2 x bfloat> %2			ret <2 x bfloat> %2
	}			}

				define <32 x bfloat> @pr63017() {
				; SSE2-LABEL: pr63017:
				; SSE2: # %bb.0:
				; SSE2-NEXT: xorps %xmm0, %xmm0
				; SSE2-NEXT: xorps %xmm1, %xmm1
				; SSE2-NEXT: xorps %xmm2, %xmm2
				; SSE2-NEXT: xorps %xmm3, %xmm3
				; SSE2-NEXT: retq
				;
				; BF16-LABEL: pr63017:
				; BF16: # %bb.0:
				; BF16-NEXT: vxorps %xmm0, %xmm0, %xmm0
				; BF16-NEXT: retq
				ret <32 x bfloat> zeroinitializer
				}