[RISCV] Add more cost model tests for fixed vector casts. NFC

[craig.topper]

Summary

This covers a full mix of legal and illegal types. I've reduce
the fixed vector length from 128 to 256.

[fakepaper56]

LGTM.

llvm/test/Analysis/CostModel/RISCV/cast.ll

 ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
-; RUN: opt < %s -mtriple=riscv32 -mattr=+v,+zfh,+experimental-zvfh -riscv-v-vector-bits-min=256 -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s --check-prefix=RISCV32
-; RUN: opt < %s -mtriple=riscv64 -mattr=+v,+zfh,+experimental-zvfh -riscv-v-vector-bits-min=256 -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s --check-prefix=RISCV64
+; RUN: opt < %s -mtriple=riscv32 -mattr=+v,+zfh,+experimental-zvfh -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s
+; RUN: opt < %s -mtriple=riscv64 -mattr=+v,+zfh,+experimental-zvfh -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s
 
-define void @ext() {
-; RISCV32-LABEL: 'ext'
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i8i16 = sext <4 x i8> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z4i8i16 = zext <4 x i8> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i8i32 = sext <4 x i8> undef to <4 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z4i8i32 = zext <4 x i8> undef to <4 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i8i64 = sext <4 x i8> undef to <4 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z4i8i64 = zext <4 x i8> undef to <4 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i16i32 = sext <4 x i16> undef to <4 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z4i16i32 = zext <4 x i16> undef to <4 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i16i64 = sext <4 x i16> undef to <4 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z4i16i64 = zext <4 x i16> undef to <4 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i32i64 = sext <4 x i32> undef to <4 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z4i32i64 = zext <4 x i32> undef to <4 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i8 = sext <4 x i1> undef to <4 x i8>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z4i1i8 = zext <4 x i1> undef to <4 x i8>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i16 = sext <4 x i1> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z4i1i16 = zext <4 x i1> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i32 = sext <4 x i1> undef to <4 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z4i1i32 = zext <4 x i1> undef to <4 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i64 = sext <4 x i1> undef to <4 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z4i1i64 = zext <4 x i1> undef to <4 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8i8i16 = sext <8 x i8> undef to <8 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z8i8i16 = zext <8 x i8> undef to <8 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8i8i32 = sext <8 x i8> undef to <8 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z8i8i32 = zext <8 x i8> undef to <8 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8i8i64 = sext <8 x i8> undef to <8 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z8i8i64 = zext <8 x i8> undef to <8 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8i16i32 = sext <8 x i16> undef to <8 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z8i16i32 = zext <8 x i16> undef to <8 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8i16i64 = sext <8 x i16> undef to <8 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z8i16i64 = zext <8 x i16> undef to <8 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s8i1i8 = sext <8 x i1> undef to <8 x i8>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z8i1i8 = zext <8 x i1> undef to <8 x i8>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s8i1i16 = sext <8 x i1> undef to <8 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z8i1i16 = zext <8 x i1> undef to <8 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s8i1i32 = sext <8 x i1> undef to <8 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z8i1i32 = zext <8 x i1> undef to <8 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s8i1i64 = sext <8 x i1> undef to <8 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z8i1i64 = zext <8 x i1> undef to <8 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
+define void @sext() {
+; CHECK-LABEL: 'sext'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2i16 = sext <2 x i8> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2i32 = sext <2 x i8> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2i64 = sext <2 x i8> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2i32 = sext <2 x i16> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2i64 = sext <2 x i16> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2i64 = sext <2 x i32> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i1_v2i8 = sext <2 x i1> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i1_v2i16 = sext <2 x i1> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i1_v2i32 = sext <2 x i1> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i1_v2i64 = sext <2 x i1> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4i16 = sext <4 x i8> undef to <4 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4i32 = sext <4 x i8> undef to <4 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4i64 = sext <4 x i8> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4i32 = sext <4 x i16> undef to <4 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4i64 = sext <4 x i16> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4i64 = sext <4 x i32> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i1_v4i8 = sext <4 x i1> undef to <4 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i1_v4i16 = sext <4 x i1> undef to <4 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i1_v4i32 = sext <4 x i1> undef to <4 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i1_v4i64 = sext <4 x i1> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8i16 = sext <8 x i8> undef to <8 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8i32 = sext <8 x i8> undef to <8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8i64 = sext <8 x i8> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8i32 = sext <8 x i16> undef to <8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8i64 = sext <8 x i16> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8i64 = sext <8 x i32> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i1_v8i8 = sext <8 x i1> undef to <8 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i1_v8i16 = sext <8 x i1> undef to <8 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i1_v8i32 = sext <8 x i1> undef to <8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i1_v8i64 = sext <8 x i1> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i8_v16i16 = sext <16 x i8> undef to <16 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i8_v16i32 = sext <16 x i8> undef to <16 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i8_v16i64 = sext <16 x i8> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16i32 = sext <16 x i16> undef to <16 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16i64 = sext <16 x i16> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16i64 = sext <16 x i32> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i1_v16i8 = sext <16 x i1> undef to <16 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i1_v16i16 = sext <16 x i1> undef to <16 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i1_v16i32 = sext <16 x i1> undef to <16 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i1_v16i64 = sext <16 x i1> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i8_v32i16 = sext <32 x i8> undef to <32 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i8_v32i32 = sext <32 x i8> undef to <32 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i8_v32i64 = sext <32 x i8> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32i32 = sext <32 x i16> undef to <32 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i16_v32i64 = sext <32 x i16> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i32_v32i64 = sext <32 x i32> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i1_v32i8 = sext <32 x i1> undef to <32 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i1_v32i16 = sext <32 x i1> undef to <32 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i1_v32i32 = sext <32 x i1> undef to <32 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32i1_v32i64 = sext <32 x i1> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v64i8_v64i16 = sext <64 x i8> undef to <64 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64i8_v64i32 = sext <64 x i8> undef to <64 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v64i8_v64i64 = sext <64 x i8> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64i16_v64i32 = sext <64 x i16> undef to <64 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v64i16_v64i64 = sext <64 x i16> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v64i32_v64i64 = sext <64 x i32> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v64i1_v64i8 = sext <64 x i1> undef to <64 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v64i1_v64i16 = sext <64 x i1> undef to <64 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v64i1_v64i32 = sext <64 x i1> undef to <64 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64i1_v64i64 = sext <64 x i1> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v128i8_v128i16 = sext <128 x i8> undef to <128 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v128i8_v128i32 = sext <128 x i8> undef to <128 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v128i8_v128i64 = sext <128 x i8> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v128i16_v128i32 = sext <128 x i16> undef to <128 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %v128i16_v128i64 = sext <128 x i16> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v128i32_v128i64 = sext <128 x i32> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v128i1_v128i8 = sext <128 x i1> undef to <128 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v128i1_v128i16 = sext <128 x i1> undef to <128 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v128i1_v128i32 = sext <128 x i1> undef to <128 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %v128i1_v128i64 = sext <128 x i1> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v256i8_v256i16 = sext <256 x i8> undef to <256 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %v256i8_v256i32 = sext <256 x i8> undef to <256 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %v256i8_v256i64 = sext <256 x i8> undef to <256 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v256i16_v256i32 = sext <256 x i16> undef to <256 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v256i16_v256i64 = sext <256 x i16> undef to <256 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v256i32_v256i64 = sext <256 x i32> undef to <256 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v256i1_v256i8 = sext <256 x i1> undef to <256 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %v256i1_v256i16 = sext <256 x i1> undef to <256 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v256i1_v256i32 = sext <256 x i1> undef to <256 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 46 for instruction: %v256i1_v256i64 = sext <256 x i1> undef to <256 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
 ;
-; RISCV64-LABEL: 'ext'
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i8i16 = sext <4 x i8> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z4i8i16 = zext <4 x i8> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i8i32 = sext <4 x i8> undef to <4 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z4i8i32 = zext <4 x i8> undef to <4 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i8i64 = sext <4 x i8> undef to <4 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z4i8i64 = zext <4 x i8> undef to <4 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i16i32 = sext <4 x i16> undef to <4 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z4i16i32 = zext <4 x i16> undef to <4 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i16i64 = sext <4 x i16> undef to <4 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z4i16i64 = zext <4 x i16> undef to <4 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i32i64 = sext <4 x i32> undef to <4 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z4i32i64 = zext <4 x i32> undef to <4 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i8 = sext <4 x i1> undef to <4 x i8>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z4i1i8 = zext <4 x i1> undef to <4 x i8>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i16 = sext <4 x i1> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z4i1i16 = zext <4 x i1> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i32 = sext <4 x i1> undef to <4 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z4i1i32 = zext <4 x i1> undef to <4 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i64 = sext <4 x i1> undef to <4 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z4i1i64 = zext <4 x i1> undef to <4 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8i8i16 = sext <8 x i8> undef to <8 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z8i8i16 = zext <8 x i8> undef to <8 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8i8i32 = sext <8 x i8> undef to <8 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z8i8i32 = zext <8 x i8> undef to <8 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8i8i64 = sext <8 x i8> undef to <8 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z8i8i64 = zext <8 x i8> undef to <8 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8i16i32 = sext <8 x i16> undef to <8 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z8i16i32 = zext <8 x i16> undef to <8 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8i16i64 = sext <8 x i16> undef to <8 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %z8i16i64 = zext <8 x i16> undef to <8 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s8i1i8 = sext <8 x i1> undef to <8 x i8>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z8i1i8 = zext <8 x i1> undef to <8 x i8>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s8i1i16 = sext <8 x i1> undef to <8 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z8i1i16 = zext <8 x i1> undef to <8 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s8i1i32 = sext <8 x i1> undef to <8 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z8i1i32 = zext <8 x i1> undef to <8 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s8i1i64 = sext <8 x i1> undef to <8 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %z8i1i64 = zext <8 x i1> undef to <8 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
+  %v2i8_v2i16 = sext <2 x i8> undef to <2 x i16>
+  %v2i8_v2i32 = sext <2 x i8> undef to <2 x i32>
+  %v2i8_v2i64 = sext <2 x i8> undef to <2 x i64>
+  %v2i16_v2i32 = sext <2 x i16> undef to <2 x i32>
+  %v2i16_v2i64 = sext <2 x i16> undef to <2 x i64>
+  %v2i32_v2i64 = sext <2 x i32> undef to <2 x i64>
+  %v2i1_v2i8 = sext <2 x i1> undef to <2 x i8>
+  %v2i1_v2i16 = sext <2 x i1> undef to <2 x i16>
+  %v2i1_v2i32 = sext <2 x i1> undef to <2 x i32>
+  %v2i1_v2i64 = sext <2 x i1> undef to <2 x i64>
+
+  %v4i8_v4i16 = sext <4 x i8> undef to <4 x i16>
+  %v4i8_v4i32 = sext <4 x i8> undef to <4 x i32>
+  %v4i8_v4i64 = sext <4 x i8> undef to <4 x i64>
+  %v4i16_v4i32 = sext <4 x i16> undef to <4 x i32>
+  %v4i16_v4i64 = sext <4 x i16> undef to <4 x i64>
+  %v4i32_v4i64 = sext <4 x i32> undef to <4 x i64>
+  %v4i1_v4i8 = sext <4 x i1> undef to <4 x i8>
+  %v4i1_v4i16 = sext <4 x i1> undef to <4 x i16>
+  %v4i1_v4i32 = sext <4 x i1> undef to <4 x i32>
+  %v4i1_v4i64 = sext <4 x i1> undef to <4 x i64>
+
+  %v8i8_v8i16 = sext <8 x i8> undef to <8 x i16>
+  %v8i8_v8i32 = sext <8 x i8> undef to <8 x i32>
+  %v8i8_v8i64 = sext <8 x i8> undef to <8 x i64>
+  %v8i16_v8i32 = sext <8 x i16> undef to <8 x i32>
+  %v8i16_v8i64 = sext <8 x i16> undef to <8 x i64>
+  %v8i32_v8i64 = sext <8 x i32> undef to <8 x i64>
+  %v8i1_v8i8 = sext <8 x i1> undef to <8 x i8>
+  %v8i1_v8i16 = sext <8 x i1> undef to <8 x i16>
+  %v8i1_v8i32 = sext <8 x i1> undef to <8 x i32>
+  %v8i1_v8i64 = sext <8 x i1> undef to <8 x i64>
+
+  %v16i8_v16i16 = sext <16 x i8> undef to <16 x i16>
+  %v16i8_v16i32 = sext <16 x i8> undef to <16 x i32>
+  %v16i8_v16i64 = sext <16 x i8> undef to <16 x i64>
+  %v16i16_v16i32 = sext <16 x i16> undef to <16 x i32>
+  %v16i16_v16i64 = sext <16 x i16> undef to <16 x i64>
+  %v16i32_v16i64 = sext <16 x i32> undef to <16 x i64>
+  %v16i1_v16i8 = sext <16 x i1> undef to <16 x i8>
+  %v16i1_v16i16 = sext <16 x i1> undef to <16 x i16>
+  %v16i1_v16i32 = sext <16 x i1> undef to <16 x i32>
+  %v16i1_v16i64 = sext <16 x i1> undef to <16 x i64>
+
+  %v32i8_v32i16 = sext <32 x i8> undef to <32 x i16>
+  %v32i8_v32i32 = sext <32 x i8> undef to <32 x i32>
+  %v32i8_v32i64 = sext <32 x i8> undef to <32 x i64>
+  %v32i16_v32i32 = sext <32 x i16> undef to <32 x i32>
+  %v32i16_v32i64 = sext <32 x i16> undef to <32 x i64>
+  %v32i32_v32i64 = sext <32 x i32> undef to <32 x i64>
+  %v32i1_v32i8 = sext <32 x i1> undef to <32 x i8>
+  %v32i1_v32i16 = sext <32 x i1> undef to <32 x i16>
+  %v32i1_v32i32 = sext <32 x i1> undef to <32 x i32>
+  %v32i1_v32i64 = sext <32 x i1> undef to <32 x i64>
+
+  %v64i8_v64i16 = sext <64 x i8> undef to <64 x i16>
+  %v64i8_v64i32 = sext <64 x i8> undef to <64 x i32>
+  %v64i8_v64i64 = sext <64 x i8> undef to <64 x i64>
+  %v64i16_v64i32 = sext <64 x i16> undef to <64 x i32>
+  %v64i16_v64i64 = sext <64 x i16> undef to <64 x i64>
+  %v64i32_v64i64 = sext <64 x i32> undef to <64 x i64>
+  %v64i1_v64i8 = sext <64 x i1> undef to <64 x i8>
+  %v64i1_v64i16 = sext <64 x i1> undef to <64 x i16>
+  %v64i1_v64i32 = sext <64 x i1> undef to <64 x i32>
+  %v64i1_v64i64 = sext <64 x i1> undef to <64 x i64>
+
+  %v128i8_v128i16 = sext <128 x i8> undef to <128 x i16>
+  %v128i8_v128i32 = sext <128 x i8> undef to <128 x i32>
+  %v128i8_v128i64 = sext <128 x i8> undef to <128 x i64>
+  %v128i16_v128i32 = sext <128 x i16> undef to <128 x i32>
+  %v128i16_v128i64 = sext <128 x i16> undef to <128 x i64>
+  %v128i32_v128i64 = sext <128 x i32> undef to <128 x i64>
+  %v128i1_v128i8 = sext <128 x i1> undef to <128 x i8>
+  %v128i1_v128i16 = sext <128 x i1> undef to <128 x i16>
+  %v128i1_v128i32 = sext <128 x i1> undef to <128 x i32>
+  %v128i1_v128i64 = sext <128 x i1> undef to <128 x i64>
+
+  %v256i8_v256i16 = sext <256 x i8> undef to <256 x i16>
+  %v256i8_v256i32 = sext <256 x i8> undef to <256 x i32>
+  %v256i8_v256i64 = sext <256 x i8> undef to <256 x i64>
+  %v256i16_v256i32 = sext <256 x i16> undef to <256 x i32>
+  %v256i16_v256i64 = sext <256 x i16> undef to <256 x i64>
+  %v256i32_v256i64 = sext <256 x i32> undef to <256 x i64>
+  %v256i1_v256i8 = sext <256 x i1> undef to <256 x i8>
+  %v256i1_v256i16 = sext <256 x i1> undef to <256 x i16>
+  %v256i1_v256i32 = sext <256 x i1> undef to <256 x i32>
+  %v256i1_v256i64 = sext <256 x i1> undef to <256 x i64>
+
+  ret void
+}
+
+define void @zext() {
+; CHECK-LABEL: 'zext'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2i16 = zext <2 x i8> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2i32 = zext <2 x i8> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2i64 = zext <2 x i8> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2i32 = zext <2 x i16> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2i64 = zext <2 x i16> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2i64 = zext <2 x i32> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i1_v2i8 = zext <2 x i1> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i1_v2i16 = zext <2 x i1> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i1_v2i32 = zext <2 x i1> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i1_v2i64 = zext <2 x i1> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4i16 = zext <4 x i8> undef to <4 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4i32 = zext <4 x i8> undef to <4 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4i64 = zext <4 x i8> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4i32 = zext <4 x i16> undef to <4 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4i64 = zext <4 x i16> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4i64 = zext <4 x i32> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i1_v4i8 = zext <4 x i1> undef to <4 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i1_v4i16 = zext <4 x i1> undef to <4 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i1_v4i32 = zext <4 x i1> undef to <4 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i1_v4i64 = zext <4 x i1> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8i16 = zext <8 x i8> undef to <8 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8i32 = zext <8 x i8> undef to <8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8i64 = zext <8 x i8> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8i32 = zext <8 x i16> undef to <8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8i64 = zext <8 x i16> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8i64 = zext <8 x i32> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i1_v8i8 = zext <8 x i1> undef to <8 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i1_v8i16 = zext <8 x i1> undef to <8 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i1_v8i32 = zext <8 x i1> undef to <8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i1_v8i64 = zext <8 x i1> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i8_v16i16 = zext <16 x i8> undef to <16 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i8_v16i32 = zext <16 x i8> undef to <16 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i8_v16i64 = zext <16 x i8> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16i32 = zext <16 x i16> undef to <16 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16i64 = zext <16 x i16> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16i64 = zext <16 x i32> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i1_v16i8 = zext <16 x i1> undef to <16 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i1_v16i16 = zext <16 x i1> undef to <16 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i1_v16i32 = zext <16 x i1> undef to <16 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i1_v16i64 = zext <16 x i1> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i8_v32i16 = zext <32 x i8> undef to <32 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i8_v32i32 = zext <32 x i8> undef to <32 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i8_v32i64 = zext <32 x i8> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32i32 = zext <32 x i16> undef to <32 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i16_v32i64 = zext <32 x i16> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i32_v32i64 = zext <32 x i32> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i1_v32i8 = zext <32 x i1> undef to <32 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i1_v32i16 = zext <32 x i1> undef to <32 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i1_v32i32 = zext <32 x i1> undef to <32 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32i1_v32i64 = zext <32 x i1> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v64i8_v64i16 = zext <64 x i8> undef to <64 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64i8_v64i32 = zext <64 x i8> undef to <64 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v64i8_v64i64 = zext <64 x i8> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64i16_v64i32 = zext <64 x i16> undef to <64 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v64i16_v64i64 = zext <64 x i16> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v64i32_v64i64 = zext <64 x i32> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v64i1_v64i8 = zext <64 x i1> undef to <64 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v64i1_v64i16 = zext <64 x i1> undef to <64 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v64i1_v64i32 = zext <64 x i1> undef to <64 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64i1_v64i64 = zext <64 x i1> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v128i8_v128i16 = zext <128 x i8> undef to <128 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v128i8_v128i32 = zext <128 x i8> undef to <128 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v128i8_v128i64 = zext <128 x i8> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v128i16_v128i32 = zext <128 x i16> undef to <128 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %v128i16_v128i64 = zext <128 x i16> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v128i32_v128i64 = zext <128 x i32> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v128i1_v128i8 = zext <128 x i1> undef to <128 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v128i1_v128i16 = zext <128 x i1> undef to <128 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v128i1_v128i32 = zext <128 x i1> undef to <128 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %v128i1_v128i64 = zext <128 x i1> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v256i8_v256i16 = zext <256 x i8> undef to <256 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %v256i8_v256i32 = zext <256 x i8> undef to <256 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %v256i8_v256i64 = zext <256 x i8> undef to <256 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v256i16_v256i32 = zext <256 x i16> undef to <256 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v256i16_v256i64 = zext <256 x i16> undef to <256 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v256i32_v256i64 = zext <256 x i32> undef to <256 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v256i1_v256i8 = zext <256 x i1> undef to <256 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %v256i1_v256i16 = zext <256 x i1> undef to <256 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v256i1_v256i32 = zext <256 x i1> undef to <256 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 46 for instruction: %v256i1_v256i64 = zext <256 x i1> undef to <256 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
 ;
-  %s4i8i16 = sext <4 x i8>  undef to <4 x i16>
-  %z4i8i16 = zext <4 x i8>  undef to <4 x i16>
-  %s4i8i32 = sext <4 x i8>  undef to <4 x i32>
-  %z4i8i32 = zext <4 x i8>  undef to <4 x i32>
-  %s4i8i64 = sext <4 x i8>  undef to <4 x i64>
-  %z4i8i64 = zext <4 x i8>  undef to <4 x i64>
-  %s4i16i32 = sext <4 x i16> undef to <4 x i32>
-  %z4i16i32 = zext <4 x i16> undef to <4 x i32>
-  %s4i16i64 = sext <4 x i16> undef to <4 x i64>
-  %z4i16i64 = zext <4 x i16> undef to <4 x i64>
-  %s4i32i64 = sext <4 x i32> undef to <4 x i64>
-  %z4i32i64 = zext <4 x i32> undef to <4 x i64>
-  %s4i1i8 = sext <4 x i1>  undef to <4 x i8>
-  %z4i1i8 = zext <4 x i1>  undef to <4 x i8>
-  %s4i1i16 = sext <4 x i1>  undef to <4 x i16>
-  %z4i1i16 = zext <4 x i1>  undef to <4 x i16>
-  %s4i1i32 = sext <4 x i1>  undef to <4 x i32>
-  %z4i1i32 = zext <4 x i1>  undef to <4 x i32>
-  %s4i1i64 = sext <4 x i1>  undef to <4 x i64>
-  %z4i1i64 = zext <4 x i1>  undef to <4 x i64>
-
-  %s8i8i16 = sext <8 x i8>  undef to <8 x i16>
-  %z8i8i16 = zext <8 x i8>  undef to <8 x i16>
-  %s8i8i32 = sext <8 x i8>  undef to <8 x i32>
-  %z8i8i32 = zext <8 x i8>  undef to <8 x i32>
-  %s8i8i64 = sext <8 x i8>  undef to <8 x i64>
-  %z8i8i64 = zext <8 x i8>  undef to <8 x i64>
-  %s8i16i32 = sext <8 x i16> undef to <8 x i32>
-  %z8i16i32 = zext <8 x i16> undef to <8 x i32>
-  %s8i16i64 = sext <8 x i16> undef to <8 x i64>
-  %z8i16i64 = zext <8 x i16> undef to <8 x i64>
-  %s8i1i8 = sext <8 x i1>  undef to <8 x i8>
-  %z8i1i8 = zext <8 x i1>  undef to <8 x i8>
-  %s8i1i16 = sext <8 x i1>  undef to <8 x i16>
-  %z8i1i16 = zext <8 x i1>  undef to <8 x i16>
-  %s8i1i32 = sext <8 x i1>  undef to <8 x i32>
-  %z8i1i32 = zext <8 x i1>  undef to <8 x i32>
-  %s8i1i64 = sext <8 x i1>  undef to <8 x i64>
-  %z8i1i64 = zext <8 x i1>  undef to <8 x i64>
+  %v2i8_v2i16 = zext <2 x i8> undef to <2 x i16>
+  %v2i8_v2i32 = zext <2 x i8> undef to <2 x i32>
+  %v2i8_v2i64 = zext <2 x i8> undef to <2 x i64>
+  %v2i16_v2i32 = zext <2 x i16> undef to <2 x i32>
+  %v2i16_v2i64 = zext <2 x i16> undef to <2 x i64>
+  %v2i32_v2i64 = zext <2 x i32> undef to <2 x i64>
+  %v2i1_v2i8 = zext <2 x i1> undef to <2 x i8>
+  %v2i1_v2i16 = zext <2 x i1> undef to <2 x i16>
+  %v2i1_v2i32 = zext <2 x i1> undef to <2 x i32>
+  %v2i1_v2i64 = zext <2 x i1> undef to <2 x i64>
+
+  %v4i8_v4i16 = zext <4 x i8> undef to <4 x i16>
+  %v4i8_v4i32 = zext <4 x i8> undef to <4 x i32>
+  %v4i8_v4i64 = zext <4 x i8> undef to <4 x i64>
+  %v4i16_v4i32 = zext <4 x i16> undef to <4 x i32>
+  %v4i16_v4i64 = zext <4 x i16> undef to <4 x i64>
+  %v4i32_v4i64 = zext <4 x i32> undef to <4 x i64>
+  %v4i1_v4i8 = zext <4 x i1> undef to <4 x i8>
+  %v4i1_v4i16 = zext <4 x i1> undef to <4 x i16>
+  %v4i1_v4i32 = zext <4 x i1> undef to <4 x i32>
+  %v4i1_v4i64 = zext <4 x i1> undef to <4 x i64>
+
+  %v8i8_v8i16 = zext <8 x i8> undef to <8 x i16>
+  %v8i8_v8i32 = zext <8 x i8> undef to <8 x i32>
+  %v8i8_v8i64 = zext <8 x i8> undef to <8 x i64>
+  %v8i16_v8i32 = zext <8 x i16> undef to <8 x i32>
+  %v8i16_v8i64 = zext <8 x i16> undef to <8 x i64>
+  %v8i32_v8i64 = zext <8 x i32> undef to <8 x i64>
+  %v8i1_v8i8 = zext <8 x i1> undef to <8 x i8>
+  %v8i1_v8i16 = zext <8 x i1> undef to <8 x i16>
+  %v8i1_v8i32 = zext <8 x i1> undef to <8 x i32>
+  %v8i1_v8i64 = zext <8 x i1> undef to <8 x i64>
+
+  %v16i8_v16i16 = zext <16 x i8> undef to <16 x i16>
+  %v16i8_v16i32 = zext <16 x i8> undef to <16 x i32>
+  %v16i8_v16i64 = zext <16 x i8> undef to <16 x i64>
+  %v16i16_v16i32 = zext <16 x i16> undef to <16 x i32>
+  %v16i16_v16i64 = zext <16 x i16> undef to <16 x i64>
+  %v16i32_v16i64 = zext <16 x i32> undef to <16 x i64>
+  %v16i1_v16i8 = zext <16 x i1> undef to <16 x i8>
+  %v16i1_v16i16 = zext <16 x i1> undef to <16 x i16>
+  %v16i1_v16i32 = zext <16 x i1> undef to <16 x i32>
+  %v16i1_v16i64 = zext <16 x i1> undef to <16 x i64>
+
+  %v32i8_v32i16 = zext <32 x i8> undef to <32 x i16>
+  %v32i8_v32i32 = zext <32 x i8> undef to <32 x i32>
+  %v32i8_v32i64 = zext <32 x i8> undef to <32 x i64>
+  %v32i16_v32i32 = zext <32 x i16> undef to <32 x i32>
+  %v32i16_v32i64 = zext <32 x i16> undef to <32 x i64>
+  %v32i32_v32i64 = zext <32 x i32> undef to <32 x i64>
+  %v32i1_v32i8 = zext <32 x i1> undef to <32 x i8>
+  %v32i1_v32i16 = zext <32 x i1> undef to <32 x i16>
+  %v32i1_v32i32 = zext <32 x i1> undef to <32 x i32>
+  %v32i1_v32i64 = zext <32 x i1> undef to <32 x i64>
+
+  %v64i8_v64i16 = zext <64 x i8> undef to <64 x i16>
+  %v64i8_v64i32 = zext <64 x i8> undef to <64 x i32>
+  %v64i8_v64i64 = zext <64 x i8> undef to <64 x i64>
+  %v64i16_v64i32 = zext <64 x i16> undef to <64 x i32>
+  %v64i16_v64i64 = zext <64 x i16> undef to <64 x i64>
+  %v64i32_v64i64 = zext <64 x i32> undef to <64 x i64>
+  %v64i1_v64i8 = zext <64 x i1> undef to <64 x i8>
+  %v64i1_v64i16 = zext <64 x i1> undef to <64 x i16>
+  %v64i1_v64i32 = zext <64 x i1> undef to <64 x i32>
+  %v64i1_v64i64 = zext <64 x i1> undef to <64 x i64>
+
+  %v128i8_v128i16 = zext <128 x i8> undef to <128 x i16>
+  %v128i8_v128i32 = zext <128 x i8> undef to <128 x i32>
+  %v128i8_v128i64 = zext <128 x i8> undef to <128 x i64>
+  %v128i16_v128i32 = zext <128 x i16> undef to <128 x i32>
+  %v128i16_v128i64 = zext <128 x i16> undef to <128 x i64>
+  %v128i32_v128i64 = zext <128 x i32> undef to <128 x i64>
+  %v128i1_v128i8 = zext <128 x i1> undef to <128 x i8>
+  %v128i1_v128i16 = zext <128 x i1> undef to <128 x i16>
+  %v128i1_v128i32 = zext <128 x i1> undef to <128 x i32>
+  %v128i1_v128i64 = zext <128 x i1> undef to <128 x i64>
+
+  %v256i8_v256i16 = zext <256 x i8> undef to <256 x i16>
+  %v256i8_v256i32 = zext <256 x i8> undef to <256 x i32>
+  %v256i8_v256i64 = zext <256 x i8> undef to <256 x i64>
+  %v256i16_v256i32 = zext <256 x i16> undef to <256 x i32>
+  %v256i16_v256i64 = zext <256 x i16> undef to <256 x i64>
+  %v256i32_v256i64 = zext <256 x i32> undef to <256 x i64>
+  %v256i1_v256i8 = zext <256 x i1> undef to <256 x i8>
+  %v256i1_v256i16 = zext <256 x i1> undef to <256 x i16>
+  %v256i1_v256i32 = zext <256 x i1> undef to <256 x i32>
+  %v256i1_v256i64 = zext <256 x i1> undef to <256 x i64>
+
   ret void
 }
 
 define void @trunc() {
-; RISCV32-LABEL: 'trunc'
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i8i16 = trunc <4 x i16> undef to <4 x i8>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i8i32 = trunc <4 x i32> undef to <4 x i8>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %s4i8i64 = trunc <4 x i64> undef to <4 x i8>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i16i32 = trunc <4 x i32> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i16i64 = trunc <4 x i64> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i32i64 = trunc <4 x i64> undef to <4 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i8 = trunc <4 x i8> undef to <4 x i1>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i16 = trunc <4 x i16> undef to <4 x i1>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i32 = trunc <4 x i32> undef to <4 x i1>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i64 = trunc <4 x i64> undef to <4 x i1>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
+; CHECK-LABEL: 'trunc'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2i8 = trunc <2 x i16> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32_v2i8 = trunc <2 x i32> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i64_v2i8 = trunc <2 x i64> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2i16 = trunc <2 x i32> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2i16 = trunc <2 x i64> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i64_v2i32 = trunc <2 x i64> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8_v2i1 = trunc <2 x i8> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i16_v2i1 = trunc <2 x i16> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32_v2i1 = trunc <2 x i32> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2i1 = trunc <2 x i64> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4i8 = trunc <4 x i16> undef to <4 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i32_v4i8 = trunc <4 x i32> undef to <4 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4i8 = trunc <4 x i64> undef to <4 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4i16 = trunc <4 x i32> undef to <4 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4i16 = trunc <4 x i64> undef to <4 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i64_v4i32 = trunc <4 x i64> undef to <4 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4i1 = trunc <4 x i8> undef to <4 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i16_v4i1 = trunc <4 x i16> undef to <4 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i32_v4i1 = trunc <4 x i32> undef to <4 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4i1 = trunc <4 x i64> undef to <4 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8i8 = trunc <8 x i16> undef to <8 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i32_v8i8 = trunc <8 x i32> undef to <8 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8i64_v8i8 = trunc <8 x i64> undef to <8 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8i16 = trunc <8 x i32> undef to <8 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8i16 = trunc <8 x i64> undef to <8 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i64_v8i32 = trunc <8 x i64> undef to <8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i8_v8i1 = trunc <8 x i8> undef to <8 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8i1 = trunc <8 x i16> undef to <8 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i32_v8i1 = trunc <8 x i32> undef to <8 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8i1 = trunc <8 x i64> undef to <8 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16i8 = trunc <2 x i16> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16i8 = trunc <2 x i32> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16i64_v16i8 = trunc <2 x i64> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16i16 = trunc <2 x i32> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16i16 = trunc <2 x i64> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i64_v16i32 = trunc <2 x i64> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16i1 = trunc <2 x i8> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16i1 = trunc <2 x i16> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16i1 = trunc <2 x i32> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16i1 = trunc <2 x i64> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32i8 = trunc <16 x i16> undef to <16 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i32_v32i8 = trunc <16 x i32> undef to <16 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i64_v32i8 = trunc <16 x i64> undef to <16 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i32_v32i16 = trunc <16 x i32> undef to <16 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i64_v32i16 = trunc <16 x i64> undef to <16 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i64_v32i32 = trunc <16 x i64> undef to <16 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i8_v32i1 = trunc <16 x i8> undef to <16 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i16_v32i1 = trunc <16 x i16> undef to <16 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i32_v32i1 = trunc <16 x i32> undef to <16 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i64_v32i1 = trunc <16 x i64> undef to <16 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v64i16_v64i8 = trunc <64 x i16> undef to <64 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v64i32_v64i8 = trunc <64 x i32> undef to <64 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v64i64_v64i8 = trunc <64 x i64> undef to <64 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64i32_v64i16 = trunc <64 x i32> undef to <64 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64i16 = trunc <64 x i64> undef to <64 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v64i64_v64i32 = trunc <64 x i64> undef to <64 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v64i8_v64i1 = trunc <64 x i8> undef to <64 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v64i16_v64i1 = trunc <64 x i16> undef to <64 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v64i32_v64i1 = trunc <64 x i32> undef to <64 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64i1 = trunc <64 x i64> undef to <64 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v128i16_v128i8 = trunc <128 x i16> undef to <128 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v128i32_v128i8 = trunc <128 x i32> undef to <128 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %v128i64_v128i8 = trunc <128 x i64> undef to <128 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v128i32_v128i16 = trunc <128 x i32> undef to <128 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v128i64_v128i16 = trunc <128 x i64> undef to <128 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v128i64_v128i32 = trunc <128 x i64> undef to <128 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v128i8_v128i1 = trunc <128 x i8> undef to <128 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v128i16_v128i1 = trunc <128 x i16> undef to <128 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v128i32_v128i1 = trunc <128 x i32> undef to <128 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %v128i64_v128i1 = trunc <128 x i64> undef to <128 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v256i16_v256i8 = trunc <256 x i16> undef to <256 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v256i32_v256i8 = trunc <256 x i32> undef to <256 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 62 for instruction: %v256i64_v256i8 = trunc <256 x i64> undef to <256 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v256i32_v256i16 = trunc <256 x i32> undef to <256 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 44 for instruction: %v256i64_v256i16 = trunc <256 x i64> undef to <256 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v256i64_v256i32 = trunc <256 x i64> undef to <256 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v256i8_v256i1 = trunc <256 x i8> undef to <256 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %v256i16_v256i1 = trunc <256 x i16> undef to <256 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v256i32_v256i1 = trunc <256 x i32> undef to <256 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 46 for instruction: %v256i64_v256i1 = trunc <256 x i64> undef to <256 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
 ;
-; RISCV64-LABEL: 'trunc'
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i8i16 = trunc <4 x i16> undef to <4 x i8>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i8i32 = trunc <4 x i32> undef to <4 x i8>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %s4i8i64 = trunc <4 x i64> undef to <4 x i8>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i16i32 = trunc <4 x i32> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i16i64 = trunc <4 x i64> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4i32i64 = trunc <4 x i64> undef to <4 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i8 = trunc <4 x i8> undef to <4 x i1>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i16 = trunc <4 x i16> undef to <4 x i1>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i32 = trunc <4 x i32> undef to <4 x i1>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s4i1i64 = trunc <4 x i64> undef to <4 x i1>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
-;
-  %s4i8i16 = trunc <4 x i16> undef to <4 x i8>
-  %s4i8i32 = trunc <4 x i32> undef to <4 x i8>
-  %s4i8i64 = trunc <4 x i64> undef to <4 x i8>
-  %s4i16i32 = trunc <4 x i32> undef to <4 x i16>
-  %s4i16i64 = trunc <4 x i64> undef to <4 x i16>
-  %s4i32i64 = trunc <4 x i64> undef to <4 x i32>
-  %s4i1i8 = trunc <4 x i8> undef to <4 x i1>
-  %s4i1i16 = trunc <4 x i16> undef to <4 x i1>
-  %s4i1i32 = trunc <4 x i32> undef to <4 x i1>
-  %s4i1i64 = trunc <4 x i64> undef to <4 x i1>
+  %v2i16_v2i8 = trunc <2 x i16> undef to <2 x i8>
+  %v2i32_v2i8 = trunc <2 x i32> undef to <2 x i8>
+  %v2i64_v2i8 = trunc <2 x i64> undef to <2 x i8>
+  %v2i32_v2i16 = trunc <2 x i32> undef to <2 x i16>
+  %v2i64_v2i16 = trunc <2 x i64> undef to <2 x i16>
+  %v2i64_v2i32 = trunc <2 x i64> undef to <2 x i32>
+  %v2i8_v2i1 = trunc <2 x i8> undef to <2 x i1>
+  %v2i16_v2i1 = trunc <2 x i16> undef to <2 x i1>
+  %v2i32_v2i1 = trunc <2 x i32> undef to <2 x i1>
+  %v2i64_v2i1 = trunc <2 x i64> undef to <2 x i1>
+
+  %v4i16_v4i8 = trunc <4 x i16> undef to <4 x i8>
+  %v4i32_v4i8 = trunc <4 x i32> undef to <4 x i8>
+  %v4i64_v4i8 = trunc <4 x i64> undef to <4 x i8>
+  %v4i32_v4i16 = trunc <4 x i32> undef to <4 x i16>
+  %v4i64_v4i16 = trunc <4 x i64> undef to <4 x i16>
+  %v4i64_v4i32 = trunc <4 x i64> undef to <4 x i32>
+  %v4i8_v4i1 = trunc <4 x i8> undef to <4 x i1>
+  %v4i16_v4i1 = trunc <4 x i16> undef to <4 x i1>
+  %v4i32_v4i1 = trunc <4 x i32> undef to <4 x i1>
+  %v4i64_v4i1 = trunc <4 x i64> undef to <4 x i1>
+
+  %v8i16_v8i8 = trunc <8 x i16> undef to <8 x i8>
+  %v8i32_v8i8 = trunc <8 x i32> undef to <8 x i8>
+  %v8i64_v8i8 = trunc <8 x i64> undef to <8 x i8>
+  %v8i32_v8i16 = trunc <8 x i32> undef to <8 x i16>
+  %v8i64_v8i16 = trunc <8 x i64> undef to <8 x i16>
+  %v8i64_v8i32 = trunc <8 x i64> undef to <8 x i32>
+  %v8i8_v8i1 = trunc <8 x i8> undef to <8 x i1>
+  %v8i16_v8i1 = trunc <8 x i16> undef to <8 x i1>
+  %v8i32_v8i1 = trunc <8 x i32> undef to <8 x i1>
+  %v8i64_v8i1 = trunc <8 x i64> undef to <8 x i1>
+
+  %v16i16_v16i8 = trunc <2 x i16> undef to <2 x i8>
+  %v16i32_v16i8 = trunc <2 x i32> undef to <2 x i8>
+  %v16i64_v16i8 = trunc <2 x i64> undef to <2 x i8>
+  %v16i32_v16i16 = trunc <2 x i32> undef to <2 x i16>
+  %v16i64_v16i16 = trunc <2 x i64> undef to <2 x i16>
+  %v16i64_v16i32 = trunc <2 x i64> undef to <2 x i32>
+  %v16i8_v16i1 = trunc <2 x i8> undef to <2 x i1>
+  %v16i16_v16i1 = trunc <2 x i16> undef to <2 x i1>
+  %v16i32_v16i1 = trunc <2 x i32> undef to <2 x i1>
+  %v16i64_v16i1 = trunc <2 x i64> undef to <2 x i1>
+
+  %v32i16_v32i8 = trunc <16 x i16> undef to <16 x i8>
+  %v32i32_v32i8 = trunc <16 x i32> undef to <16 x i8>
+  %v32i64_v32i8 = trunc <16 x i64> undef to <16 x i8>
+  %v32i32_v32i16 = trunc <16 x i32> undef to <16 x i16>
+  %v32i64_v32i16 = trunc <16 x i64> undef to <16 x i16>
+  %v32i64_v32i32 = trunc <16 x i64> undef to <16 x i32>
+  %v32i8_v32i1 = trunc <16 x i8> undef to <16 x i1>
+  %v32i16_v32i1 = trunc <16 x i16> undef to <16 x i1>
+  %v32i32_v32i1 = trunc <16 x i32> undef to <16 x i1>
+  %v32i64_v32i1 = trunc <16 x i64> undef to <16 x i1>
+
+  %v64i16_v64i8 = trunc <64 x i16> undef to <64 x i8>
+  %v64i32_v64i8 = trunc <64 x i32> undef to <64 x i8>
+  %v64i64_v64i8 = trunc <64 x i64> undef to <64 x i8>
+  %v64i32_v64i16 = trunc <64 x i32> undef to <64 x i16>
+  %v64i64_v64i16 = trunc <64 x i64> undef to <64 x i16>
+  %v64i64_v64i32 = trunc <64 x i64> undef to <64 x i32>
+  %v64i8_v64i1 = trunc <64 x i8> undef to <64 x i1>
+  %v64i16_v64i1 = trunc <64 x i16> undef to <64 x i1>
+  %v64i32_v64i1 = trunc <64 x i32> undef to <64 x i1>
+  %v64i64_v64i1 = trunc <64 x i64> undef to <64 x i1>
+
+  %v128i16_v128i8 = trunc <128 x i16> undef to <128 x i8>
+  %v128i32_v128i8 = trunc <128 x i32> undef to <128 x i8>
+  %v128i64_v128i8 = trunc <128 x i64> undef to <128 x i8>
+  %v128i32_v128i16 = trunc <128 x i32> undef to <128 x i16>
+  %v128i64_v128i16 = trunc <128 x i64> undef to <128 x i16>
+  %v128i64_v128i32 = trunc <128 x i64> undef to <128 x i32>
+  %v128i8_v128i1 = trunc <128 x i8> undef to <128 x i1>
+  %v128i16_v128i1 = trunc <128 x i16> undef to <128 x i1>
+  %v128i32_v128i1 = trunc <128 x i32> undef to <128 x i1>
+  %v128i64_v128i1 = trunc <128 x i64> undef to <128 x i1>
+
+  %v256i16_v256i8 = trunc <256 x i16> undef to <256 x i8>
+  %v256i32_v256i8 = trunc <256 x i32> undef to <256 x i8>
+  %v256i64_v256i8 = trunc <256 x i64> undef to <256 x i8>
+  %v256i32_v256i16 = trunc <256 x i32> undef to <256 x i16>
+  %v256i64_v256i16 = trunc <256 x i64> undef to <256 x i16>
+  %v256i64_v256i32 = trunc <256 x i64> undef to <256 x i32>
+  %v256i8_v256i1 = trunc <256 x i8> undef to <256 x i1>
+  %v256i16_v256i1 = trunc <256 x i16> undef to <256 x i1>
+  %v256i32_v256i1 = trunc <256 x i32> undef to <256 x i1>
+  %v256i64_v256i1 = trunc <256 x i64> undef to <256 x i1>
+
   ret void
 }
 
 define void @fpext() {
-; RISCV32-LABEL: 'fpext'
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v0 = fpext <8 x half> undef to <8 x float>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v1 = fpext <8 x half> undef to <8 x double>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2 = fpext <8 x float> undef to <8 x double>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
-;
-; RISCV64-LABEL: 'fpext'
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v0 = fpext <8 x half> undef to <8 x float>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v1 = fpext <8 x half> undef to <8 x double>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2 = fpext <8 x float> undef to <8 x double>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
+; CHECK-LABEL: 'fpext'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2f32 = fpext <2 x half> undef to <2 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2f64 = fpext <2 x half> undef to <2 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2f64 = fpext <2 x float> undef to <2 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4f32 = fpext <4 x half> undef to <4 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4f16_v4f64 = fpext <4 x half> undef to <4 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4f64 = fpext <4 x float> undef to <4 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8f32 = fpext <8 x half> undef to <8 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8f64 = fpext <8 x half> undef to <8 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8f64 = fpext <8 x float> undef to <8 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16f32 = fpext <16 x half> undef to <16 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16f64 = fpext <16 x half> undef to <16 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16f64 = fpext <16 x float> undef to <16 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32f32 = fpext <32 x half> undef to <32 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32f16_v32f64 = fpext <32 x half> undef to <32 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32f32_v32f64 = fpext <32 x float> undef to <32 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64f16_v64f32 = fpext <64 x half> undef to <64 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64f16_v64f64 = fpext <64 x half> undef to <64 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v64f32_v64f64 = fpext <64 x float> undef to <64 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v128f16_v128f32 = fpext <128 x half> undef to <128 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v128f16_v128f64 = fpext <128 x half> undef to <128 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v128f32_v128f64 = fpext <128 x float> undef to <128 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
 ;
-  %v0 = fpext <8 x half>  undef to <8 x float>
-  %v1 = fpext <8 x half>  undef to <8 x double>
-  %v2 = fpext <8 x float> undef to <8 x double>
+  %v2f16_v2f32 = fpext <2 x half> undef to <2 x float>
+  %v2f16_v2f64 = fpext <2 x half> undef to <2 x double>
+  %v2f32_v2f64 = fpext <2 x float> undef to <2 x double>
+
+  %v4f16_v4f32 = fpext <4 x half> undef to <4 x float>
+  %v4f16_v4f64 = fpext <4 x half> undef to <4 x double>
+  %v4f32_v4f64 = fpext <4 x float> undef to <4 x double>
+
+  %v8f16_v8f32 = fpext <8 x half> undef to <8 x float>
+  %v8f16_v8f64 = fpext <8 x half> undef to <8 x double>
+  %v8f32_v8f64 = fpext <8 x float> undef to <8 x double>
+
+  %v16f16_v16f32 = fpext <16 x half> undef to <16 x float>
+  %v16f16_v16f64 = fpext <16 x half> undef to <16 x double>
+  %v16f32_v16f64 = fpext <16 x float> undef to <16 x double>
+
+  %v32f16_v32f32 = fpext <32 x half> undef to <32 x float>
+  %v32f16_v32f64 = fpext <32 x half> undef to <32 x double>
+  %v32f32_v32f64 = fpext <32 x float> undef to <32 x double>
+
+  %v64f16_v64f32 = fpext <64 x half> undef to <64 x float>
+  %v64f16_v64f64 = fpext <64 x half> undef to <64 x double>
+  %v64f32_v64f64 = fpext <64 x float> undef to <64 x double>
+
+  %v128f16_v128f32 = fpext <128 x half> undef to <128 x float>
+  %v128f16_v128f64 = fpext <128 x half> undef to <128 x double>
+  %v128f32_v128f64 = fpext <128 x float> undef to <128 x double>
+
   ret void
 }
 
-define void @ftrunc() {
-; RISCV32-LABEL: 'ftrunc'
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v0 = fptrunc <8 x float> undef to <8 x half>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v1 = fptrunc <8 x double> undef to <8 x half>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2 = fptrunc <8 x double> undef to <8 x float>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
+define void @fptrunc() {
+; CHECK-LABEL: 'fptrunc'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2f16 = fptrunc <2 x float> undef to <2 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2f64_v2f16 = fptrunc <2 x double> undef to <2 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f64_v2f32 = fptrunc <2 x double> undef to <2 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4f16 = fptrunc <4 x float> undef to <4 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4f16 = fptrunc <4 x double> undef to <4 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4f32 = fptrunc <4 x double> undef to <4 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8f16 = fptrunc <8 x float> undef to <8 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8f16 = fptrunc <8 x double> undef to <8 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f64_v8f32 = fptrunc <8 x double> undef to <8 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16f16 = fptrunc <16 x float> undef to <16 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16f64_v16f16 = fptrunc <16 x double> undef to <16 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f64_v16f32 = fptrunc <16 x double> undef to <16 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32f32_v32f16 = fptrunc <32 x float> undef to <32 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32f64_v32f16 = fptrunc <32 x double> undef to <32 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32f64_v32f32 = fptrunc <32 x double> undef to <32 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64f32_v64f16 = fptrunc <64 x float> undef to <64 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64f64_v64f16 = fptrunc <64 x double> undef to <64 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v64f64_v64f32 = fptrunc <64 x double> undef to <64 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v128f32_v128f16 = fptrunc <128 x float> undef to <128 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v128f64_v128f16 = fptrunc <128 x double> undef to <128 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v128f64_v128f32 = fptrunc <128 x double> undef to <128 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
 ;
-; RISCV64-LABEL: 'ftrunc'
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v0 = fptrunc <8 x float> undef to <8 x half>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v1 = fptrunc <8 x double> undef to <8 x half>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2 = fptrunc <8 x double> undef to <8 x float>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
-;
-  %v0 = fptrunc <8 x float> undef to <8 x half>
-  %v1 = fptrunc <8 x double> undef to <8 x half>
-  %v2 = fptrunc <8 x double> undef to <8 x float>
+  %v2f32_v2f16 = fptrunc <2 x float> undef to <2 x half>
+  %v2f64_v2f16 = fptrunc <2 x double> undef to <2 x half>
+  %v2f64_v2f32 = fptrunc <2 x double> undef to <2 x float>
+
+  %v4f32_v4f16 = fptrunc <4 x float> undef to <4 x half>
+  %v4f64_v4f16 = fptrunc <4 x double> undef to <4 x half>
+  %v4f64_v4f32 = fptrunc <4 x double> undef to <4 x float>
+
+  %v8f32_v8f16 = fptrunc <8 x float> undef to <8 x half>
+  %v8f64_v8f16 = fptrunc <8 x double> undef to <8 x half>
+  %v8f64_v8f32 = fptrunc <8 x double> undef to <8 x float>
+
+  %v16f32_v16f16 = fptrunc <16 x float> undef to <16 x half>
+  %v16f64_v16f16 = fptrunc <16 x double> undef to <16 x half>
+  %v16f64_v16f32 = fptrunc <16 x double> undef to <16 x float>
+
+  %v32f32_v32f16 = fptrunc <32 x float> undef to <32 x half>
+  %v32f64_v32f16 = fptrunc <32 x double> undef to <32 x half>
+  %v32f64_v32f32 = fptrunc <32 x double> undef to <32 x float>
+
+  %v64f32_v64f16 = fptrunc <64 x float> undef to <64 x half>
+  %v64f64_v64f16 = fptrunc <64 x double> undef to <64 x half>
+  %v64f64_v64f32 = fptrunc <64 x double> undef to <64 x float>
+
+  %v128f32_v128f16 = fptrunc <128 x float> undef to <128 x half>
+  %v128f64_v128f16 = fptrunc <128 x double> undef to <128 x half>
+  %v128f64_v128f32 = fptrunc <128 x double> undef to <128 x float>
+
   ret void
 }
 
-define void @fp_to_int() {
-; RISCV32-LABEL: 'fp_to_int'
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s0 = fptosi <4 x half> undef to <4 x i8>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s1 = fptosi <4 x float> undef to <4 x i8>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %s2 = fptosi <4 x double> undef to <4 x i8>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s3 = fptosi <4 x half> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4 = fptosi <4 x float> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s5 = fptosi <4 x double> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s6 = fptosi <4 x half> undef to <4 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s7 = fptosi <4 x float> undef to <4 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8 = fptosi <4 x double> undef to <4 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s9 = fptosi <4 x half> undef to <4 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s10 = fptosi <4 x float> undef to <4 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s11 = fptosi <4 x double> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %s12 = fptosi <4 x double> undef to <4 x i1>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u0 = fptoui <4 x half> undef to <4 x i8>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u1 = fptoui <4 x float> undef to <4 x i8>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %u2 = fptoui <4 x double> undef to <4 x i8>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u3 = fptoui <4 x half> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u4 = fptoui <4 x float> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u5 = fptoui <4 x double> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u6 = fptoui <4 x half> undef to <4 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u7 = fptoui <4 x float> undef to <4 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u8 = fptoui <4 x double> undef to <4 x i32>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u9 = fptoui <4 x half> undef to <4 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u10 = fptoui <4 x float> undef to <4 x i64>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u11 = fptoui <4 x double> undef to <4 x i16>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %u12 = fptoui <4 x double> undef to <4 x i1>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
+define void @fptosi() {
+; CHECK-LABEL: 'fptosi'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i8 = fptosi <2 x half> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2f32_v2i8 = fptosi <2 x float> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2f64_v2i8 = fptosi <2 x double> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i16 = fptosi <2 x half> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i16 = fptosi <2 x float> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2f64_v2i16 = fptosi <2 x double> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i32 = fptosi <2 x half> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i32 = fptosi <2 x float> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f64_v2i32 = fptosi <2 x double> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptosi <2 x half> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i64 = fptosi <2 x float> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f64_v2i64 = fptosi <2 x double> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i1 = fptosi <2 x half> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2f32_v2i1 = fptosi <2 x float> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2f64_v2i1 = fptosi <2 x double> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i8 = fptosi <4 x half> undef to <4 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i8 = fptosi <4 x float> undef to <4 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i8 = fptosi <4 x double> undef to <4 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i16 = fptosi <4 x half> undef to <4 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i16 = fptosi <4 x float> undef to <4 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i16 = fptosi <4 x double> undef to <4 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptosi <4 x half> undef to <4 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i32 = fptosi <4 x float> undef to <4 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i32 = fptosi <4 x double> undef to <4 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i64 = fptosi <4 x float> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i64 = fptosi <4 x double> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptosi <4 x half> undef to <4 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4f32_v4i1 = fptosi <4 x float> undef to <4 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i1 = fptosi <4 x double> undef to <4 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptosi <8 x half> undef to <8 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i8 = fptosi <8 x float> undef to <8 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i8 = fptosi <8 x double> undef to <8 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptosi <8 x half> undef to <8 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i16 = fptosi <8 x float> undef to <8 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i16 = fptosi <8 x double> undef to <8 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i32 = fptosi <8 x float> undef to <8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f64_v8i32 = fptosi <8 x double> undef to <8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i64 = fptosi <8 x float> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f64_v8i64 = fptosi <8 x double> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptosi <8 x half> undef to <8 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8f32_v8i1 = fptosi <8 x float> undef to <8 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i1 = fptosi <8 x double> undef to <8 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptosi <16 x half> undef to <16 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i8 = fptosi <16 x float> undef to <16 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16f64_v16i8 = fptosi <16 x double> undef to <16 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i16 = fptosi <16 x float> undef to <16 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16f64_v16i16 = fptosi <16 x double> undef to <16 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i32 = fptosi <16 x float> undef to <16 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f64_v16i32 = fptosi <16 x double> undef to <16 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i64 = fptosi <16 x float> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f64_v16i64 = fptosi <16 x double> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptosi <16 x half> undef to <16 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i1 = fptosi <16 x float> undef to <16 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16f64_v16i1 = fptosi <16 x double> undef to <16 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32f32_v32i8 = fptosi <32 x float> undef to <32 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v32f64_v32i8 = fptosi <32 x double> undef to <32 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32f32_v32i16 = fptosi <32 x float> undef to <32 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32f64_v32i16 = fptosi <32 x double> undef to <32 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32f32_v32i32 = fptosi <32 x float> undef to <32 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32f64_v32i32 = fptosi <32 x double> undef to <32 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32f32_v32i64 = fptosi <32 x float> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32f64_v32i64 = fptosi <32 x double> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32f32_v32i1 = fptosi <32 x float> undef to <32 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v32f64_v32i1 = fptosi <32 x double> undef to <32 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v64f32_v64i8 = fptosi <64 x float> undef to <64 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v64f64_v64i8 = fptosi <64 x double> undef to <64 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64f32_v64i16 = fptosi <64 x float> undef to <64 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64f64_v64i16 = fptosi <64 x double> undef to <64 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v64f32_v64i32 = fptosi <64 x float> undef to <64 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v64f64_v64i32 = fptosi <64 x double> undef to <64 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v64f32_v64i64 = fptosi <64 x float> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v64f64_v64i64 = fptosi <64 x double> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v64f32_v64i1 = fptosi <64 x float> undef to <64 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v64f64_v64i1 = fptosi <64 x double> undef to <64 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v128f32_v128i8 = fptosi <128 x float> undef to <128 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %v128f64_v128i8 = fptosi <128 x double> undef to <128 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptosi <128 x half> undef to <128 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v128f32_v128i16 = fptosi <128 x float> undef to <128 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v128f64_v128i16 = fptosi <128 x double> undef to <128 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v128f32_v128i32 = fptosi <128 x float> undef to <128 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v128f64_v128i32 = fptosi <128 x double> undef to <128 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v128f32_v128i64 = fptosi <128 x float> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v128f64_v128i64 = fptosi <128 x double> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v128f32_v128i1 = fptosi <128 x float> undef to <128 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %v128f64_v128i1 = fptosi <128 x double> undef to <128 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
 ;
-; RISCV64-LABEL: 'fp_to_int'
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s0 = fptosi <4 x half> undef to <4 x i8>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s1 = fptosi <4 x float> undef to <4 x i8>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %s2 = fptosi <4 x double> undef to <4 x i8>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s3 = fptosi <4 x half> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4 = fptosi <4 x float> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s5 = fptosi <4 x double> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s6 = fptosi <4 x half> undef to <4 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s7 = fptosi <4 x float> undef to <4 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8 = fptosi <4 x double> undef to <4 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s9 = fptosi <4 x half> undef to <4 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s10 = fptosi <4 x float> undef to <4 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s11 = fptosi <4 x double> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %s12 = fptosi <4 x double> undef to <4 x i1>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u0 = fptoui <4 x half> undef to <4 x i8>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u1 = fptoui <4 x float> undef to <4 x i8>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %u2 = fptoui <4 x double> undef to <4 x i8>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u3 = fptoui <4 x half> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u4 = fptoui <4 x float> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u5 = fptoui <4 x double> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u6 = fptoui <4 x half> undef to <4 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u7 = fptoui <4 x float> undef to <4 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u8 = fptoui <4 x double> undef to <4 x i32>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u9 = fptoui <4 x half> undef to <4 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u10 = fptoui <4 x float> undef to <4 x i64>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u11 = fptoui <4 x double> undef to <4 x i16>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %u12 = fptoui <4 x double> undef to <4 x i1>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
+  %v2f16_v2i8 = fptosi <2 x half> undef to <2 x i8>
+  %v2f32_v2i8 = fptosi <2 x float> undef to <2 x i8>
+  %v2f64_v2i8 = fptosi <2 x double> undef to <2 x i8>
+  %v2f16_v2i16 = fptosi <2 x half> undef to <2 x i16>
+  %v2f32_v2i16 = fptosi <2 x float> undef to <2 x i16>
+  %v2f64_v2i16 = fptosi <2 x double> undef to <2 x i16>
+  %v2f16_v2i32 = fptosi <2 x half> undef to <2 x i32>
+  %v2f32_v2i32 = fptosi <2 x float> undef to <2 x i32>
+  %v2f64_v2i32 = fptosi <2 x double> undef to <2 x i32>
+  %v2f16_v2i64 = fptosi <2 x half> undef to <2 x i64>
+  %v2f32_v2i64 = fptosi <2 x float> undef to <2 x i64>
+  %v2f64_v2i64 = fptosi <2 x double> undef to <2 x i64>
+  %v2f16_v2i1 = fptosi <2 x half> undef to <2 x i1>
+  %v2f32_v2i1 = fptosi <2 x float> undef to <2 x i1>
+  %v2f64_v2i1 = fptosi <2 x double> undef to <2 x i1>
+
+  %v4f16_v4i8 = fptosi <4 x half> undef to <4 x i8>
+  %v4f32_v4i8 = fptosi <4 x float> undef to <4 x i8>
+  %v4f64_v4i8 = fptosi <4 x double> undef to <4 x i8>
+  %v4f16_v4i16 = fptosi <4 x half> undef to <4 x i16>
+  %v4f32_v4i16 = fptosi <4 x float> undef to <4 x i16>
+  %v4f64_v4i16 = fptosi <4 x double> undef to <4 x i16>
+  %v4f16_v4i32 = fptosi <4 x half> undef to <4 x i32>
+  %v4f32_v4i32 = fptosi <4 x float> undef to <4 x i32>
+  %v4f64_v4i32 = fptosi <4 x double> undef to <4 x i32>
+  %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
+  %v4f32_v4i64 = fptosi <4 x float> undef to <4 x i64>
+  %v4f64_v4i64 = fptosi <4 x double> undef to <4 x i64>
+  %v4f16_v4i1 = fptosi <4 x half> undef to <4 x i1>
+  %v4f32_v4i1 = fptosi <4 x float> undef to <4 x i1>
+  %v4f64_v4i1 = fptosi <4 x double> undef to <4 x i1>
+
+  %v8f16_v8i8 = fptosi <8 x half> undef to <8 x i8>
+  %v8f32_v8i8 = fptosi <8 x float> undef to <8 x i8>
+  %v8f64_v8i8 = fptosi <8 x double> undef to <8 x i8>
+  %v8f16_v8i16 = fptosi <8 x half> undef to <8 x i16>
+  %v8f32_v8i16 = fptosi <8 x float> undef to <8 x i16>
+  %v8f64_v8i16 = fptosi <8 x double> undef to <8 x i16>
+  %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
+  %v8f32_v8i32 = fptosi <8 x float> undef to <8 x i32>
+  %v8f64_v8i32 = fptosi <8 x double> undef to <8 x i32>
+  %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
+  %v8f32_v8i64 = fptosi <8 x float> undef to <8 x i64>
+  %v8f64_v8i64 = fptosi <8 x double> undef to <8 x i64>
+  %v8f16_v8i1 = fptosi <8 x half> undef to <8 x i1>
+  %v8f32_v8i1 = fptosi <8 x float> undef to <8 x i1>
+  %v8f64_v8i1 = fptosi <8 x double> undef to <8 x i1>
+
+  %v16f16_v16i8 = fptosi <16 x half> undef to <16 x i8>
+  %v16f32_v16i8 = fptosi <16 x float> undef to <16 x i8>
+  %v16f64_v16i8 = fptosi <16 x double> undef to <16 x i8>
+  %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
+  %v16f32_v16i16 = fptosi <16 x float> undef to <16 x i16>
+  %v16f64_v16i16 = fptosi <16 x double> undef to <16 x i16>
+  %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
+  %v16f32_v16i32 = fptosi <16 x float> undef to <16 x i32>
+  %v16f64_v16i32 = fptosi <16 x double> undef to <16 x i32>
+  %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
+  %v16f32_v16i64 = fptosi <16 x float> undef to <16 x i64>
+  %v16f64_v16i64 = fptosi <16 x double> undef to <16 x i64>
+  %v16f16_v16i1 = fptosi <16 x half> undef to <16 x i1>
+  %v16f32_v16i1 = fptosi <16 x float> undef to <16 x i1>
+  %v16f64_v16i1 = fptosi <16 x double> undef to <16 x i1>
+
+  %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
+  %v32f32_v32i8 = fptosi <32 x float> undef to <32 x i8>
+  %v32f64_v32i8 = fptosi <32 x double> undef to <32 x i8>
+  %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
+  %v32f32_v32i16 = fptosi <32 x float> undef to <32 x i16>
+  %v32f64_v32i16 = fptosi <32 x double> undef to <32 x i16>
+  %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
+  %v32f32_v32i32 = fptosi <32 x float> undef to <32 x i32>
+  %v32f64_v32i32 = fptosi <32 x double> undef to <32 x i32>
+  %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
+  %v32f32_v32i64 = fptosi <32 x float> undef to <32 x i64>
+  %v32f64_v32i64 = fptosi <32 x double> undef to <32 x i64>
+  %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
+  %v32f32_v32i1 = fptosi <32 x float> undef to <32 x i1>
+  %v32f64_v32i1 = fptosi <32 x double> undef to <32 x i1>
+
+  %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
+  %v64f32_v64i8 = fptosi <64 x float> undef to <64 x i8>
+  %v64f64_v64i8 = fptosi <64 x double> undef to <64 x i8>
+  %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
+  %v64f32_v64i16 = fptosi <64 x float> undef to <64 x i16>
+  %v64f64_v64i16 = fptosi <64 x double> undef to <64 x i16>
+  %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
+  %v64f32_v64i32 = fptosi <64 x float> undef to <64 x i32>
+  %v64f64_v64i32 = fptosi <64 x double> undef to <64 x i32>
+  %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
+  %v64f32_v64i64 = fptosi <64 x float> undef to <64 x i64>
+  %v64f64_v64i64 = fptosi <64 x double> undef to <64 x i64>
+  %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
+  %v64f32_v64i1 = fptosi <64 x float> undef to <64 x i1>
+  %v64f64_v64i1 = fptosi <64 x double> undef to <64 x i1>
+
+  %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
+  %v128f32_v128i8 = fptosi <128 x float> undef to <128 x i8>
+  %v128f64_v128i8 = fptosi <128 x double> undef to <128 x i8>
+  %v128f16_v128i16 = fptosi <128 x half> undef to <128 x i16>
+  %v128f32_v128i16 = fptosi <128 x float> undef to <128 x i16>
+  %v128f64_v128i16 = fptosi <128 x double> undef to <128 x i16>
+  %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
+  %v128f32_v128i32 = fptosi <128 x float> undef to <128 x i32>
+  %v128f64_v128i32 = fptosi <128 x double> undef to <128 x i32>
+  %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
+  %v128f32_v128i64 = fptosi <128 x float> undef to <128 x i64>
+  %v128f64_v128i64 = fptosi <128 x double> undef to <128 x i64>
+  %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
+  %v128f32_v128i1 = fptosi <128 x float> undef to <128 x i1>
+  %v128f64_v128i1 = fptosi <128 x double> undef to <128 x i1>
+
+  ret void
+}
+
+define void @fptoui() {
+; CHECK-LABEL: 'fptoui'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i8 = fptoui <2 x half> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2f32_v2i8 = fptoui <2 x float> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2f64_v2i8 = fptoui <2 x double> undef to <2 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i16 = fptoui <2 x half> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i16 = fptoui <2 x float> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2f64_v2i16 = fptoui <2 x double> undef to <2 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i32 = fptoui <2 x half> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i32 = fptoui <2 x float> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f64_v2i32 = fptoui <2 x double> undef to <2 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptoui <2 x half> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i64 = fptoui <2 x float> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2f64_v2i64 = fptoui <2 x double> undef to <2 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i1 = fptoui <2 x half> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2f32_v2i1 = fptoui <2 x float> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2f64_v2i1 = fptoui <2 x double> undef to <2 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i8 = fptoui <4 x half> undef to <4 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i8 = fptoui <4 x float> undef to <4 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i8 = fptoui <4 x double> undef to <4 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i16 = fptoui <4 x half> undef to <4 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i16 = fptoui <4 x float> undef to <4 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i16 = fptoui <4 x double> undef to <4 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptoui <4 x half> undef to <4 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i32 = fptoui <4 x float> undef to <4 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i32 = fptoui <4 x double> undef to <4 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i64 = fptoui <4 x float> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i64 = fptoui <4 x double> undef to <4 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptoui <4 x half> undef to <4 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4f32_v4i1 = fptoui <4 x float> undef to <4 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i1 = fptoui <4 x double> undef to <4 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptoui <8 x half> undef to <8 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i8 = fptoui <8 x float> undef to <8 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i8 = fptoui <8 x double> undef to <8 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptoui <8 x half> undef to <8 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i16 = fptoui <8 x float> undef to <8 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i16 = fptoui <8 x double> undef to <8 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i32 = fptoui <8 x float> undef to <8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f64_v8i32 = fptoui <8 x double> undef to <8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i64 = fptoui <8 x float> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8f64_v8i64 = fptoui <8 x double> undef to <8 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptoui <8 x half> undef to <8 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8f32_v8i1 = fptoui <8 x float> undef to <8 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i1 = fptoui <8 x double> undef to <8 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptoui <16 x half> undef to <16 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i8 = fptoui <16 x float> undef to <16 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16f64_v16i8 = fptoui <16 x double> undef to <16 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i16 = fptoui <16 x float> undef to <16 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16f64_v16i16 = fptoui <16 x double> undef to <16 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i32 = fptoui <16 x float> undef to <16 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f64_v16i32 = fptoui <16 x double> undef to <16 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i64 = fptoui <16 x float> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16f64_v16i64 = fptoui <16 x double> undef to <16 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptoui <16 x half> undef to <16 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i1 = fptoui <16 x float> undef to <16 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16f64_v16i1 = fptoui <16 x double> undef to <16 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32f32_v32i8 = fptoui <32 x float> undef to <32 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v32f64_v32i8 = fptoui <32 x double> undef to <32 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32f32_v32i16 = fptoui <32 x float> undef to <32 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32f64_v32i16 = fptoui <32 x double> undef to <32 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32f32_v32i32 = fptoui <32 x float> undef to <32 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32f64_v32i32 = fptoui <32 x double> undef to <32 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32f32_v32i64 = fptoui <32 x float> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32f64_v32i64 = fptoui <32 x double> undef to <32 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32f32_v32i1 = fptoui <32 x float> undef to <32 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v32f64_v32i1 = fptoui <32 x double> undef to <32 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v64f32_v64i8 = fptoui <64 x float> undef to <64 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v64f64_v64i8 = fptoui <64 x double> undef to <64 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64f32_v64i16 = fptoui <64 x float> undef to <64 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64f64_v64i16 = fptoui <64 x double> undef to <64 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v64f32_v64i32 = fptoui <64 x float> undef to <64 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v64f64_v64i32 = fptoui <64 x double> undef to <64 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v64f32_v64i64 = fptoui <64 x float> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v64f64_v64i64 = fptoui <64 x double> undef to <64 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v64f32_v64i1 = fptoui <64 x float> undef to <64 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v64f64_v64i1 = fptoui <64 x double> undef to <64 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v128f32_v128i8 = fptoui <128 x float> undef to <128 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %v128f64_v128i8 = fptoui <128 x double> undef to <128 x i8>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptoui <128 x half> undef to <128 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v128f32_v128i16 = fptoui <128 x float> undef to <128 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v128f64_v128i16 = fptoui <128 x double> undef to <128 x i16>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v128f32_v128i32 = fptoui <128 x float> undef to <128 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v128f64_v128i32 = fptoui <128 x double> undef to <128 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v128f32_v128i64 = fptoui <128 x float> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v128f64_v128i64 = fptoui <128 x double> undef to <128 x i64>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v128f32_v128i1 = fptoui <128 x float> undef to <128 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %v128f64_v128i1 = fptoui <128 x double> undef to <128 x i1>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
 ;
-  %s0 = fptosi <4 x half> undef to <4 x i8>
-  %s1 = fptosi <4 x float> undef to <4 x i8>
-  %s2 = fptosi <4 x double> undef to <4 x i8>
-  %s3 = fptosi <4 x half> undef to <4 x i16>
-  %s4 = fptosi <4 x float> undef to <4 x i16>
-  %s5 = fptosi <4 x double> undef to <4 x i16>
-  %s6 = fptosi <4 x half> undef to <4 x i32>
-  %s7 = fptosi <4 x float> undef to <4 x i32>
-  %s8 = fptosi <4 x double> undef to <4 x i32>
-  %s9 = fptosi <4 x half> undef to <4 x i64>
-  %s10 = fptosi <4 x float> undef to <4 x i64>
-  %s11 = fptosi <4 x double> undef to <4 x i16>
-  %s12 = fptosi <4 x double> undef to <4 x i1>
-
-  %u0 = fptoui <4 x half> undef to <4 x i8>
-  %u1 = fptoui <4 x float> undef to <4 x i8>
-  %u2 = fptoui <4 x double> undef to <4 x i8>
-  %u3 = fptoui <4 x half> undef to <4 x i16>
-  %u4 = fptoui <4 x float> undef to <4 x i16>
-  %u5 = fptoui <4 x double> undef to <4 x i16>
-  %u6 = fptoui <4 x half> undef to <4 x i32>
-  %u7 = fptoui <4 x float> undef to <4 x i32>
-  %u8 = fptoui <4 x double> undef to <4 x i32>
-  %u9 = fptoui <4 x half> undef to <4 x i64>
-  %u10 = fptoui <4 x float> undef to <4 x i64>
-  %u11 = fptoui <4 x double> undef to <4 x i16>
-  %u12 = fptoui <4 x double> undef to <4 x i1>
+  %v2f16_v2i8 = fptoui <2 x half> undef to <2 x i8>
+  %v2f32_v2i8 = fptoui <2 x float> undef to <2 x i8>
+  %v2f64_v2i8 = fptoui <2 x double> undef to <2 x i8>
+  %v2f16_v2i16 = fptoui <2 x half> undef to <2 x i16>
+  %v2f32_v2i16 = fptoui <2 x float> undef to <2 x i16>
+  %v2f64_v2i16 = fptoui <2 x double> undef to <2 x i16>
+  %v2f16_v2i32 = fptoui <2 x half> undef to <2 x i32>
+  %v2f32_v2i32 = fptoui <2 x float> undef to <2 x i32>
+  %v2f64_v2i32 = fptoui <2 x double> undef to <2 x i32>
+  %v2f16_v2i64 = fptoui <2 x half> undef to <2 x i64>
+  %v2f32_v2i64 = fptoui <2 x float> undef to <2 x i64>
+  %v2f64_v2i64 = fptoui <2 x double> undef to <2 x i64>
+  %v2f16_v2i1 = fptoui <2 x half> undef to <2 x i1>
+  %v2f32_v2i1 = fptoui <2 x float> undef to <2 x i1>
+  %v2f64_v2i1 = fptoui <2 x double> undef to <2 x i1>
+
+  %v4f16_v4i8 = fptoui <4 x half> undef to <4 x i8>
+  %v4f32_v4i8 = fptoui <4 x float> undef to <4 x i8>
+  %v4f64_v4i8 = fptoui <4 x double> undef to <4 x i8>
+  %v4f16_v4i16 = fptoui <4 x half> undef to <4 x i16>
+  %v4f32_v4i16 = fptoui <4 x float> undef to <4 x i16>
+  %v4f64_v4i16 = fptoui <4 x double> undef to <4 x i16>
+  %v4f16_v4i32 = fptoui <4 x half> undef to <4 x i32>
+  %v4f32_v4i32 = fptoui <4 x float> undef to <4 x i32>
+  %v4f64_v4i32 = fptoui <4 x double> undef to <4 x i32>
+  %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
+  %v4f32_v4i64 = fptoui <4 x float> undef to <4 x i64>
+  %v4f64_v4i64 = fptoui <4 x double> undef to <4 x i64>
+  %v4f16_v4i1 = fptoui <4 x half> undef to <4 x i1>
+  %v4f32_v4i1 = fptoui <4 x float> undef to <4 x i1>
+  %v4f64_v4i1 = fptoui <4 x double> undef to <4 x i1>
+
+  %v8f16_v8i8 = fptoui <8 x half> undef to <8 x i8>
+  %v8f32_v8i8 = fptoui <8 x float> undef to <8 x i8>
+  %v8f64_v8i8 = fptoui <8 x double> undef to <8 x i8>
+  %v8f16_v8i16 = fptoui <8 x half> undef to <8 x i16>
+  %v8f32_v8i16 = fptoui <8 x float> undef to <8 x i16>
+  %v8f64_v8i16 = fptoui <8 x double> undef to <8 x i16>
+  %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
+  %v8f32_v8i32 = fptoui <8 x float> undef to <8 x i32>
+  %v8f64_v8i32 = fptoui <8 x double> undef to <8 x i32>
+  %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
+  %v8f32_v8i64 = fptoui <8 x float> undef to <8 x i64>
+  %v8f64_v8i64 = fptoui <8 x double> undef to <8 x i64>
+  %v8f16_v8i1 = fptoui <8 x half> undef to <8 x i1>
+  %v8f32_v8i1 = fptoui <8 x float> undef to <8 x i1>
+  %v8f64_v8i1 = fptoui <8 x double> undef to <8 x i1>
+
+  %v16f16_v16i8 = fptoui <16 x half> undef to <16 x i8>
+  %v16f32_v16i8 = fptoui <16 x float> undef to <16 x i8>
+  %v16f64_v16i8 = fptoui <16 x double> undef to <16 x i8>
+  %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
+  %v16f32_v16i16 = fptoui <16 x float> undef to <16 x i16>
+  %v16f64_v16i16 = fptoui <16 x double> undef to <16 x i16>
+  %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
+  %v16f32_v16i32 = fptoui <16 x float> undef to <16 x i32>
+  %v16f64_v16i32 = fptoui <16 x double> undef to <16 x i32>
+  %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
+  %v16f32_v16i64 = fptoui <16 x float> undef to <16 x i64>
+  %v16f64_v16i64 = fptoui <16 x double> undef to <16 x i64>
+  %v16f16_v16i1 = fptoui <16 x half> undef to <16 x i1>
+  %v16f32_v16i1 = fptoui <16 x float> undef to <16 x i1>
+  %v16f64_v16i1 = fptoui <16 x double> undef to <16 x i1>
+
+  %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
+  %v32f32_v32i8 = fptoui <32 x float> undef to <32 x i8>
+  %v32f64_v32i8 = fptoui <32 x double> undef to <32 x i8>
+  %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
+  %v32f32_v32i16 = fptoui <32 x float> undef to <32 x i16>
+  %v32f64_v32i16 = fptoui <32 x double> undef to <32 x i16>
+  %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
+  %v32f32_v32i32 = fptoui <32 x float> undef to <32 x i32>
+  %v32f64_v32i32 = fptoui <32 x double> undef to <32 x i32>
+  %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
+  %v32f32_v32i64 = fptoui <32 x float> undef to <32 x i64>
+  %v32f64_v32i64 = fptoui <32 x double> undef to <32 x i64>
+  %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
+  %v32f32_v32i1 = fptoui <32 x float> undef to <32 x i1>
+  %v32f64_v32i1 = fptoui <32 x double> undef to <32 x i1>
+
+  %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
+  %v64f32_v64i8 = fptoui <64 x float> undef to <64 x i8>
+  %v64f64_v64i8 = fptoui <64 x double> undef to <64 x i8>
+  %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
+  %v64f32_v64i16 = fptoui <64 x float> undef to <64 x i16>
+  %v64f64_v64i16 = fptoui <64 x double> undef to <64 x i16>
+  %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
+  %v64f32_v64i32 = fptoui <64 x float> undef to <64 x i32>
+  %v64f64_v64i32 = fptoui <64 x double> undef to <64 x i32>
+  %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
+  %v64f32_v64i64 = fptoui <64 x float> undef to <64 x i64>
+  %v64f64_v64i64 = fptoui <64 x double> undef to <64 x i64>
+  %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
+  %v64f32_v64i1 = fptoui <64 x float> undef to <64 x i1>
+  %v64f64_v64i1 = fptoui <64 x double> undef to <64 x i1>
+
+  %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
+  %v128f32_v128i8 = fptoui <128 x float> undef to <128 x i8>
+  %v128f64_v128i8 = fptoui <128 x double> undef to <128 x i8>
+  %v128f16_v128i16 = fptoui <128 x half> undef to <128 x i16>
+  %v128f32_v128i16 = fptoui <128 x float> undef to <128 x i16>
+  %v128f64_v128i16 = fptoui <128 x double> undef to <128 x i16>
+  %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
+  %v128f32_v128i32 = fptoui <128 x float> undef to <128 x i32>
+  %v128f64_v128i32 = fptoui <128 x double> undef to <128 x i32>
+  %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
+  %v128f32_v128i64 = fptoui <128 x float> undef to <128 x i64>
+  %v128f64_v128i64 = fptoui <128 x double> undef to <128 x i64>
+  %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
+  %v128f32_v128i1 = fptoui <128 x float> undef to <128 x i1>
+  %v128f64_v128i1 = fptoui <128 x double> undef to <128 x i1>
 
   ret void
 }
 
-define void @int_to_fp() {
-; RISCV32-LABEL: 'int_to_fp'
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s0 = sitofp <4 x i8> undef to <4 x half>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s1 = sitofp <4 x i8> undef to <4 x float>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s2 = sitofp <4 x i8> undef to <4 x double>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s3 = sitofp <4 x i16> undef to <4 x half>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4 = sitofp <4 x i16> undef to <4 x float>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s5 = sitofp <4 x i16> undef to <4 x double>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s6 = sitofp <4 x i32> undef to <4 x half>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s7 = sitofp <4 x i32> undef to <4 x float>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8 = sitofp <4 x i32> undef to <4 x double>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s9 = sitofp <4 x i64> undef to <4 x half>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s10 = sitofp <4 x i64> undef to <4 x float>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s11 = sitofp <4 x i16> undef to <4 x double>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %s12 = sitofp <4 x i1> undef to <4 x double>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u0 = uitofp <4 x i8> undef to <4 x half>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u1 = uitofp <4 x i8> undef to <4 x float>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u2 = uitofp <4 x i8> undef to <4 x double>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u3 = uitofp <4 x i16> undef to <4 x half>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u4 = uitofp <4 x i16> undef to <4 x float>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u5 = uitofp <4 x i16> undef to <4 x double>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u6 = uitofp <4 x i32> undef to <4 x half>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u7 = uitofp <4 x i32> undef to <4 x float>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u8 = uitofp <4 x i32> undef to <4 x double>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u9 = uitofp <4 x i64> undef to <4 x half>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u10 = uitofp <4 x i64> undef to <4 x float>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u11 = uitofp <4 x i16> undef to <4 x double>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %u12 = uitofp <4 x i1> undef to <4 x double>
-; RISCV32-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
+define void @sitofp() {
+; CHECK-LABEL: 'sitofp'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2f16 = sitofp <2 x i8> undef to <2 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8_v2f32 = sitofp <2 x i8> undef to <2 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8_v2f64 = sitofp <2 x i8> undef to <2 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f16 = sitofp <2 x i16> undef to <2 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f32 = sitofp <2 x i16> undef to <2 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i16_v2f64 = sitofp <2 x i16> undef to <2 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f16 = sitofp <2 x i32> undef to <2 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f32 = sitofp <2 x i32> undef to <2 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f64 = sitofp <2 x i32> undef to <2 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = sitofp <2 x i64> undef to <2 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i64_v2f32 = sitofp <2 x i64> undef to <2 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f64 = sitofp <2 x i16> undef to <2 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f16 = sitofp <2 x i1> undef to <2 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f32 = sitofp <2 x i1> undef to <2 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f64 = sitofp <2 x i1> undef to <2 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = sitofp <4 x i8> undef to <4 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f32 = sitofp <4 x i8> undef to <4 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f64 = sitofp <4 x i8> undef to <4 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = sitofp <4 x i16> undef to <4 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f32 = sitofp <4 x i16> undef to <4 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i16_v4f64 = sitofp <4 x i16> undef to <4 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = sitofp <4 x i32> undef to <4 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f32 = sitofp <4 x i32> undef to <4 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f64 = sitofp <4 x i32> undef to <4 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f16 = sitofp <4 x i64> undef to <4 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i64_v4f32 = sitofp <4 x i64> undef to <4 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f64 = sitofp <4 x i16> undef to <4 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = sitofp <4 x i1> undef to <4 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f32 = sitofp <4 x i1> undef to <4 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f64 = sitofp <4 x i1> undef to <4 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = sitofp <8 x i8> undef to <8 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i8_v8f32 = sitofp <8 x i8> undef to <8 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i8_v8f64 = sitofp <8 x i8> undef to <8 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = sitofp <8 x i16> undef to <8 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f32 = sitofp <8 x i16> undef to <8 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f64 = sitofp <8 x i16> undef to <8 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = sitofp <8 x i32> undef to <8 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f32 = sitofp <8 x i32> undef to <8 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f64 = sitofp <8 x i32> undef to <8 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i64_v8f32 = sitofp <8 x i64> undef to <8 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f64 = sitofp <8 x i16> undef to <8 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = sitofp <8 x i1> undef to <8 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f32 = sitofp <8 x i1> undef to <8 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f64 = sitofp <8 x i1> undef to <8 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f32 = sitofp <16 x i8> undef to <16 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f64 = sitofp <16 x i8> undef to <16 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16f32 = sitofp <16 x i16> undef to <16 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f64 = sitofp <16 x i16> undef to <16 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f32 = sitofp <16 x i32> undef to <16 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f64 = sitofp <16 x i32> undef to <16 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i64_v16f32 = sitofp <16 x i64> undef to <16 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16f64 = sitofp <16 x i16> undef to <16 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f32 = sitofp <16 x i1> undef to <16 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f64 = sitofp <16 x i1> undef to <16 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i8_v32f32 = sitofp <32 x i8> undef to <32 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32i8_v32f64 = sitofp <32 x i8> undef to <32 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32f32 = sitofp <32 x i16> undef to <32 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32i16_v32f64 = sitofp <32 x i16> undef to <32 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i32_v32f32 = sitofp <32 x i32> undef to <32 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i32_v32f64 = sitofp <32 x i32> undef to <32 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i64_v32f32 = sitofp <32 x i64> undef to <32 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32i64_v32f64 = sitofp <32 x i16> undef to <32 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i1_v32f32 = sitofp <32 x i1> undef to <32 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v32i1_v32f64 = sitofp <32 x i1> undef to <32 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v64i8_v64f32 = sitofp <64 x i8> undef to <64 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64i8_v64f64 = sitofp <64 x i8> undef to <64 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64i16_v64f32 = sitofp <64 x i16> undef to <64 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64i16_v64f64 = sitofp <64 x i16> undef to <64 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v64i32_v64f32 = sitofp <64 x i32> undef to <64 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v64i32_v64f64 = sitofp <64 x i32> undef to <64 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v64i64_v64f32 = sitofp <64 x i64> undef to <64 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64f64 = sitofp <64 x i16> undef to <64 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v64i1_v64f32 = sitofp <64 x i1> undef to <64 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v64i1_v64f64 = sitofp <64 x i1> undef to <64 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v128i8_v128f32 = sitofp <128 x i8> undef to <128 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %v128i8_v128f64 = sitofp <128 x i8> undef to <128 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v128i16_v128f32 = sitofp <128 x i16> undef to <128 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v128i16_v128f64 = sitofp <128 x i16> undef to <128 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v128i32_v128f32 = sitofp <128 x i32> undef to <128 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v128i32_v128f64 = sitofp <128 x i32> undef to <128 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v128i64_v128f32 = sitofp <128 x i64> undef to <128 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v128i64_v128f64 = sitofp <128 x i16> undef to <128 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v128i1_v128f32 = sitofp <128 x i1> undef to <128 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %v128i1_v128f64 = sitofp <128 x i1> undef to <128 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
 ;
-; RISCV64-LABEL: 'int_to_fp'
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s0 = sitofp <4 x i8> undef to <4 x half>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s1 = sitofp <4 x i8> undef to <4 x float>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s2 = sitofp <4 x i8> undef to <4 x double>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s3 = sitofp <4 x i16> undef to <4 x half>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s4 = sitofp <4 x i16> undef to <4 x float>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s5 = sitofp <4 x i16> undef to <4 x double>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s6 = sitofp <4 x i32> undef to <4 x half>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s7 = sitofp <4 x i32> undef to <4 x float>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s8 = sitofp <4 x i32> undef to <4 x double>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s9 = sitofp <4 x i64> undef to <4 x half>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %s10 = sitofp <4 x i64> undef to <4 x float>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %s11 = sitofp <4 x i16> undef to <4 x double>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %s12 = sitofp <4 x i1> undef to <4 x double>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u0 = uitofp <4 x i8> undef to <4 x half>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u1 = uitofp <4 x i8> undef to <4 x float>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u2 = uitofp <4 x i8> undef to <4 x double>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u3 = uitofp <4 x i16> undef to <4 x half>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u4 = uitofp <4 x i16> undef to <4 x float>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u5 = uitofp <4 x i16> undef to <4 x double>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u6 = uitofp <4 x i32> undef to <4 x half>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u7 = uitofp <4 x i32> undef to <4 x float>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u8 = uitofp <4 x i32> undef to <4 x double>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u9 = uitofp <4 x i64> undef to <4 x half>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %u10 = uitofp <4 x i64> undef to <4 x float>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %u11 = uitofp <4 x i16> undef to <4 x double>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %u12 = uitofp <4 x i1> undef to <4 x double>
-; RISCV64-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
+  %v2i8_v2f16 = sitofp <2 x i8> undef to <2 x half>
+  %v2i8_v2f32 = sitofp <2 x i8> undef to <2 x float>
+  %v2i8_v2f64 = sitofp <2 x i8> undef to <2 x double>
+  %v2i16_v2f16 = sitofp <2 x i16> undef to <2 x half>
+  %v2i16_v2f32 = sitofp <2 x i16> undef to <2 x float>
+  %v2i16_v2f64 = sitofp <2 x i16> undef to <2 x double>
+  %v2i32_v2f16 = sitofp <2 x i32> undef to <2 x half>
+  %v2i32_v2f32 = sitofp <2 x i32> undef to <2 x float>
+  %v2i32_v2f64 = sitofp <2 x i32> undef to <2 x double>
+  %v2i64_v2f16 = sitofp <2 x i64> undef to <2 x half>
+  %v2i64_v2f32 = sitofp <2 x i64> undef to <2 x float>
+  %v2i64_v2f64 = sitofp <2 x i16> undef to <2 x double>
+  %v2i1_v2f16 = sitofp <2 x i1> undef to <2 x half>
+  %v2i1_v2f32 = sitofp <2 x i1> undef to <2 x float>
+  %v2i1_v2f64 = sitofp <2 x i1> undef to <2 x double>
+
+  %v4i8_v4f16 = sitofp <4 x i8> undef to <4 x half>
+  %v4i8_v4f32 = sitofp <4 x i8> undef to <4 x float>
+  %v4i8_v4f64 = sitofp <4 x i8> undef to <4 x double>
+  %v4i16_v4f16 = sitofp <4 x i16> undef to <4 x half>
+  %v4i16_v4f32 = sitofp <4 x i16> undef to <4 x float>
+  %v4i16_v4f64 = sitofp <4 x i16> undef to <4 x double>
+  %v4i32_v4f16 = sitofp <4 x i32> undef to <4 x half>
+  %v4i32_v4f32 = sitofp <4 x i32> undef to <4 x float>
+  %v4i32_v4f64 = sitofp <4 x i32> undef to <4 x double>
+  %v4i64_v4f16 = sitofp <4 x i64> undef to <4 x half>
+  %v4i64_v4f32 = sitofp <4 x i64> undef to <4 x float>
+  %v4i64_v4f64 = sitofp <4 x i16> undef to <4 x double>
+  %v4i1_v4f16 = sitofp <4 x i1> undef to <4 x half>
+  %v4i1_v4f32 = sitofp <4 x i1> undef to <4 x float>
+  %v4i1_v4f64 = sitofp <4 x i1> undef to <4 x double>
+
+  %v8i8_v8f16 = sitofp <8 x i8> undef to <8 x half>
+  %v8i8_v8f32 = sitofp <8 x i8> undef to <8 x float>
+  %v8i8_v8f64 = sitofp <8 x i8> undef to <8 x double>
+  %v8i16_v8f16 = sitofp <8 x i16> undef to <8 x half>
+  %v8i16_v8f32 = sitofp <8 x i16> undef to <8 x float>
+  %v8i16_v8f64 = sitofp <8 x i16> undef to <8 x double>
+  %v8i32_v8f16 = sitofp <8 x i32> undef to <8 x half>
+  %v8i32_v8f32 = sitofp <8 x i32> undef to <8 x float>
+  %v8i32_v8f64 = sitofp <8 x i32> undef to <8 x double>
+  %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
+  %v8i64_v8f32 = sitofp <8 x i64> undef to <8 x float>
+  %v8i64_v8f64 = sitofp <8 x i16> undef to <8 x double>
+  %v8i1_v8f16 = sitofp <8 x i1> undef to <8 x half>
+  %v8i1_v8f32 = sitofp <8 x i1> undef to <8 x float>
+  %v8i1_v8f64 = sitofp <8 x i1> undef to <8 x double>
+
+  %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
+  %v16i8_v16f32 = sitofp <16 x i8> undef to <16 x float>
+  %v16i8_v16f64 = sitofp <16 x i8> undef to <16 x double>
+  %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
+  %v16i16_v16f32 = sitofp <16 x i16> undef to <16 x float>
+  %v16i16_v16f64 = sitofp <16 x i16> undef to <16 x double>
+  %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
+  %v16i32_v16f32 = sitofp <16 x i32> undef to <16 x float>
+  %v16i32_v16f64 = sitofp <16 x i32> undef to <16 x double>
+  %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
+  %v16i64_v16f32 = sitofp <16 x i64> undef to <16 x float>
+  %v16i64_v16f64 = sitofp <16 x i16> undef to <16 x double>
+  %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
+  %v16i1_v16f32 = sitofp <16 x i1> undef to <16 x float>
+  %v16i1_v16f64 = sitofp <16 x i1> undef to <16 x double>
+
+  %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
+  %v32i8_v32f32 = sitofp <32 x i8> undef to <32 x float>
+  %v32i8_v32f64 = sitofp <32 x i8> undef to <32 x double>
+  %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
+  %v32i16_v32f32 = sitofp <32 x i16> undef to <32 x float>
+  %v32i16_v32f64 = sitofp <32 x i16> undef to <32 x double>
+  %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
+  %v32i32_v32f32 = sitofp <32 x i32> undef to <32 x float>
+  %v32i32_v32f64 = sitofp <32 x i32> undef to <32 x double>
+  %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
+  %v32i64_v32f32 = sitofp <32 x i64> undef to <32 x float>
+  %v32i64_v32f64 = sitofp <32 x i16> undef to <32 x double>
+  %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
+  %v32i1_v32f32 = sitofp <32 x i1> undef to <32 x float>
+  %v32i1_v32f64 = sitofp <32 x i1> undef to <32 x double>
+
+  %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
+  %v64i8_v64f32 = sitofp <64 x i8> undef to <64 x float>
+  %v64i8_v64f64 = sitofp <64 x i8> undef to <64 x double>
+  %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
+  %v64i16_v64f32 = sitofp <64 x i16> undef to <64 x float>
+  %v64i16_v64f64 = sitofp <64 x i16> undef to <64 x double>
+  %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
+  %v64i32_v64f32 = sitofp <64 x i32> undef to <64 x float>
+  %v64i32_v64f64 = sitofp <64 x i32> undef to <64 x double>
+  %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
+  %v64i64_v64f32 = sitofp <64 x i64> undef to <64 x float>
+  %v64i64_v64f64 = sitofp <64 x i16> undef to <64 x double>
+  %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
+  %v64i1_v64f32 = sitofp <64 x i1> undef to <64 x float>
+  %v64i1_v64f64 = sitofp <64 x i1> undef to <64 x double>
+
+  %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
+  %v128i8_v128f32 = sitofp <128 x i8> undef to <128 x float>
+  %v128i8_v128f64 = sitofp <128 x i8> undef to <128 x double>
+  %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
+  %v128i16_v128f32 = sitofp <128 x i16> undef to <128 x float>
+  %v128i16_v128f64 = sitofp <128 x i16> undef to <128 x double>
+  %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
+  %v128i32_v128f32 = sitofp <128 x i32> undef to <128 x float>
+  %v128i32_v128f64 = sitofp <128 x i32> undef to <128 x double>
+  %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
+  %v128i64_v128f32 = sitofp <128 x i64> undef to <128 x float>
+  %v128i64_v128f64 = sitofp <128 x i16> undef to <128 x double>
+  %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
+  %v128i1_v128f32 = sitofp <128 x i1> undef to <128 x float>
+  %v128i1_v128f64 = sitofp <128 x i1> undef to <128 x double>
+
+  ret void
+}
+
+define void @uitofp() {
+; CHECK-LABEL: 'uitofp'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2f16 = uitofp <2 x i8> undef to <2 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8_v2f32 = uitofp <2 x i8> undef to <2 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8_v2f64 = uitofp <2 x i8> undef to <2 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f16 = uitofp <2 x i16> undef to <2 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f32 = uitofp <2 x i16> undef to <2 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i16_v2f64 = uitofp <2 x i16> undef to <2 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f16 = uitofp <2 x i32> undef to <2 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f32 = uitofp <2 x i32> undef to <2 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f64 = uitofp <2 x i32> undef to <2 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = uitofp <2 x i64> undef to <2 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i64_v2f32 = uitofp <2 x i64> undef to <2 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f64 = uitofp <2 x i16> undef to <2 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f16 = uitofp <2 x i1> undef to <2 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f32 = uitofp <2 x i1> undef to <2 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f64 = uitofp <2 x i1> undef to <2 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = uitofp <4 x i8> undef to <4 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f32 = uitofp <4 x i8> undef to <4 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f64 = uitofp <4 x i8> undef to <4 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = uitofp <4 x i16> undef to <4 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f32 = uitofp <4 x i16> undef to <4 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i16_v4f64 = uitofp <4 x i16> undef to <4 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = uitofp <4 x i32> undef to <4 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f32 = uitofp <4 x i32> undef to <4 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f64 = uitofp <4 x i32> undef to <4 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f16 = uitofp <4 x i64> undef to <4 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v4i64_v4f32 = uitofp <4 x i64> undef to <4 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f64 = uitofp <4 x i16> undef to <4 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = uitofp <4 x i1> undef to <4 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f32 = uitofp <4 x i1> undef to <4 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f64 = uitofp <4 x i1> undef to <4 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = uitofp <8 x i8> undef to <8 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i8_v8f32 = uitofp <8 x i8> undef to <8 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i8_v8f64 = uitofp <8 x i8> undef to <8 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = uitofp <8 x i16> undef to <8 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f32 = uitofp <8 x i16> undef to <8 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f64 = uitofp <8 x i16> undef to <8 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = uitofp <8 x i32> undef to <8 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f32 = uitofp <8 x i32> undef to <8 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f64 = uitofp <8 x i32> undef to <8 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v8i64_v8f32 = uitofp <8 x i64> undef to <8 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f64 = uitofp <8 x i16> undef to <8 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = uitofp <8 x i1> undef to <8 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f32 = uitofp <8 x i1> undef to <8 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f64 = uitofp <8 x i1> undef to <8 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f32 = uitofp <16 x i8> undef to <16 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f64 = uitofp <16 x i8> undef to <16 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16f32 = uitofp <16 x i16> undef to <16 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f64 = uitofp <16 x i16> undef to <16 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f32 = uitofp <16 x i32> undef to <16 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f64 = uitofp <16 x i32> undef to <16 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v16i64_v16f32 = uitofp <16 x i64> undef to <16 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16f64 = uitofp <16 x i16> undef to <16 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f32 = uitofp <16 x i1> undef to <16 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f64 = uitofp <16 x i1> undef to <16 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v32i8_v32f32 = uitofp <32 x i8> undef to <32 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32i8_v32f64 = uitofp <32 x i8> undef to <32 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32f32 = uitofp <32 x i16> undef to <32 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32i16_v32f64 = uitofp <32 x i16> undef to <32 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v32i32_v32f32 = uitofp <32 x i32> undef to <32 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i32_v32f64 = uitofp <32 x i32> undef to <32 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i64_v32f32 = uitofp <32 x i64> undef to <32 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v32i64_v32f64 = uitofp <32 x i16> undef to <32 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v32i1_v32f32 = uitofp <32 x i1> undef to <32 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v32i1_v32f64 = uitofp <32 x i1> undef to <32 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v64i8_v64f32 = uitofp <64 x i8> undef to <64 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64i8_v64f64 = uitofp <64 x i8> undef to <64 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64i16_v64f32 = uitofp <64 x i16> undef to <64 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64i16_v64f64 = uitofp <64 x i16> undef to <64 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v64i32_v64f32 = uitofp <64 x i32> undef to <64 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v64i32_v64f64 = uitofp <64 x i32> undef to <64 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v64i64_v64f32 = uitofp <64 x i64> undef to <64 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64f64 = uitofp <64 x i16> undef to <64 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v64i1_v64f32 = uitofp <64 x i1> undef to <64 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v64i1_v64f64 = uitofp <64 x i1> undef to <64 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v128i8_v128f32 = uitofp <128 x i8> undef to <128 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %v128i8_v128f64 = uitofp <128 x i8> undef to <128 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v128i16_v128f32 = uitofp <128 x i16> undef to <128 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v128i16_v128f64 = uitofp <128 x i16> undef to <128 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v128i32_v128f32 = uitofp <128 x i32> undef to <128 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v128i32_v128f64 = uitofp <128 x i32> undef to <128 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v128i64_v128f32 = uitofp <128 x i64> undef to <128 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %v128i64_v128f64 = uitofp <128 x i16> undef to <128 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v128i1_v128f32 = uitofp <128 x i1> undef to <128 x float>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %v128i1_v128f64 = uitofp <128 x i1> undef to <128 x double>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
 ;
-  %s0 = sitofp <4 x i8> undef to <4 x half>
-  %s1 = sitofp <4 x i8> undef to <4 x float>
-  %s2 = sitofp <4 x i8> undef to <4 x double>
-  %s3 = sitofp <4 x i16> undef to <4 x half>
-  %s4 = sitofp <4 x i16> undef to <4 x float>
-  %s5 = sitofp <4 x i16> undef to <4 x double>
-  %s6 = sitofp <4 x i32> undef to <4 x half>
-  %s7 = sitofp <4 x i32> undef to <4 x float>
-  %s8 = sitofp <4 x i32> undef to <4 x double>
-  %s9 = sitofp <4 x i64> undef to <4 x half>
-  %s10 = sitofp <4 x i64> undef to <4 x float>
-  %s11 = sitofp <4 x i16> undef to <4 x double>
-  %s12 = sitofp <4 x i1> undef to <4 x double>
-
-  %u0 = uitofp <4 x i8> undef to <4 x half>
-  %u1 = uitofp <4 x i8> undef to <4 x float>
-  %u2 = uitofp <4 x i8> undef to <4 x double>
-  %u3 = uitofp <4 x i16> undef to <4 x half>
-  %u4 = uitofp <4 x i16> undef to <4 x float>
-  %u5 = uitofp <4 x i16> undef to <4 x double>
-  %u6 = uitofp <4 x i32> undef to <4 x half>
-  %u7 = uitofp <4 x i32> undef to <4 x float>
-  %u8 = uitofp <4 x i32> undef to <4 x double>
-  %u9 = uitofp <4 x i64> undef to <4 x half>
-  %u10 = uitofp <4 x i64> undef to <4 x float>
-  %u11 = uitofp <4 x i16> undef to <4 x double>
-  %u12 = uitofp <4 x i1> undef to <4 x double>
+  %v2i8_v2f16 = uitofp <2 x i8> undef to <2 x half>
+  %v2i8_v2f32 = uitofp <2 x i8> undef to <2 x float>
+  %v2i8_v2f64 = uitofp <2 x i8> undef to <2 x double>
+  %v2i16_v2f16 = uitofp <2 x i16> undef to <2 x half>
+  %v2i16_v2f32 = uitofp <2 x i16> undef to <2 x float>
+  %v2i16_v2f64 = uitofp <2 x i16> undef to <2 x double>
+  %v2i32_v2f16 = uitofp <2 x i32> undef to <2 x half>
+  %v2i32_v2f32 = uitofp <2 x i32> undef to <2 x float>
+  %v2i32_v2f64 = uitofp <2 x i32> undef to <2 x double>
+  %v2i64_v2f16 = uitofp <2 x i64> undef to <2 x half>
+  %v2i64_v2f32 = uitofp <2 x i64> undef to <2 x float>
+  %v2i64_v2f64 = uitofp <2 x i16> undef to <2 x double>
+  %v2i1_v2f16 = uitofp <2 x i1> undef to <2 x half>
+  %v2i1_v2f32 = uitofp <2 x i1> undef to <2 x float>
+  %v2i1_v2f64 = uitofp <2 x i1> undef to <2 x double>
+
+  %v4i8_v4f16 = uitofp <4 x i8> undef to <4 x half>
+  %v4i8_v4f32 = uitofp <4 x i8> undef to <4 x float>
+  %v4i8_v4f64 = uitofp <4 x i8> undef to <4 x double>
+  %v4i16_v4f16 = uitofp <4 x i16> undef to <4 x half>
+  %v4i16_v4f32 = uitofp <4 x i16> undef to <4 x float>
+  %v4i16_v4f64 = uitofp <4 x i16> undef to <4 x double>
+  %v4i32_v4f16 = uitofp <4 x i32> undef to <4 x half>
+  %v4i32_v4f32 = uitofp <4 x i32> undef to <4 x float>
+  %v4i32_v4f64 = uitofp <4 x i32> undef to <4 x double>
+  %v4i64_v4f16 = uitofp <4 x i64> undef to <4 x half>
+  %v4i64_v4f32 = uitofp <4 x i64> undef to <4 x float>
+  %v4i64_v4f64 = uitofp <4 x i16> undef to <4 x double>
+  %v4i1_v4f16 = uitofp <4 x i1> undef to <4 x half>
+  %v4i1_v4f32 = uitofp <4 x i1> undef to <4 x float>
+  %v4i1_v4f64 = uitofp <4 x i1> undef to <4 x double>
+
+  %v8i8_v8f16 = uitofp <8 x i8> undef to <8 x half>
+  %v8i8_v8f32 = uitofp <8 x i8> undef to <8 x float>
+  %v8i8_v8f64 = uitofp <8 x i8> undef to <8 x double>
+  %v8i16_v8f16 = uitofp <8 x i16> undef to <8 x half>
+  %v8i16_v8f32 = uitofp <8 x i16> undef to <8 x float>
+  %v8i16_v8f64 = uitofp <8 x i16> undef to <8 x double>
+  %v8i32_v8f16 = uitofp <8 x i32> undef to <8 x half>
+  %v8i32_v8f32 = uitofp <8 x i32> undef to <8 x float>
+  %v8i32_v8f64 = uitofp <8 x i32> undef to <8 x double>
+  %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
+  %v8i64_v8f32 = uitofp <8 x i64> undef to <8 x float>
+  %v8i64_v8f64 = uitofp <8 x i16> undef to <8 x double>
+  %v8i1_v8f16 = uitofp <8 x i1> undef to <8 x half>
+  %v8i1_v8f32 = uitofp <8 x i1> undef to <8 x float>
+  %v8i1_v8f64 = uitofp <8 x i1> undef to <8 x double>
+
+  %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
+  %v16i8_v16f32 = uitofp <16 x i8> undef to <16 x float>
+  %v16i8_v16f64 = uitofp <16 x i8> undef to <16 x double>
+  %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
+  %v16i16_v16f32 = uitofp <16 x i16> undef to <16 x float>
+  %v16i16_v16f64 = uitofp <16 x i16> undef to <16 x double>
+  %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
+  %v16i32_v16f32 = uitofp <16 x i32> undef to <16 x float>
+  %v16i32_v16f64 = uitofp <16 x i32> undef to <16 x double>
+  %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
+  %v16i64_v16f32 = uitofp <16 x i64> undef to <16 x float>
+  %v16i64_v16f64 = uitofp <16 x i16> undef to <16 x double>
+  %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
+  %v16i1_v16f32 = uitofp <16 x i1> undef to <16 x float>
+  %v16i1_v16f64 = uitofp <16 x i1> undef to <16 x double>
+
+  %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
+  %v32i8_v32f32 = uitofp <32 x i8> undef to <32 x float>
+  %v32i8_v32f64 = uitofp <32 x i8> undef to <32 x double>
+  %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
+  %v32i16_v32f32 = uitofp <32 x i16> undef to <32 x float>
+  %v32i16_v32f64 = uitofp <32 x i16> undef to <32 x double>
+  %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
+  %v32i32_v32f32 = uitofp <32 x i32> undef to <32 x float>
+  %v32i32_v32f64 = uitofp <32 x i32> undef to <32 x double>
+  %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
+  %v32i64_v32f32 = uitofp <32 x i64> undef to <32 x float>
+  %v32i64_v32f64 = uitofp <32 x i16> undef to <32 x double>
+  %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
+  %v32i1_v32f32 = uitofp <32 x i1> undef to <32 x float>
+  %v32i1_v32f64 = uitofp <32 x i1> undef to <32 x double>
+
+  %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
+  %v64i8_v64f32 = uitofp <64 x i8> undef to <64 x float>
+  %v64i8_v64f64 = uitofp <64 x i8> undef to <64 x double>
+  %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
+  %v64i16_v64f32 = uitofp <64 x i16> undef to <64 x float>
+  %v64i16_v64f64 = uitofp <64 x i16> undef to <64 x double>
+  %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
+  %v64i32_v64f32 = uitofp <64 x i32> undef to <64 x float>
+  %v64i32_v64f64 = uitofp <64 x i32> undef to <64 x double>
+  %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
+  %v64i64_v64f32 = uitofp <64 x i64> undef to <64 x float>
+  %v64i64_v64f64 = uitofp <64 x i16> undef to <64 x double>
+  %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
+  %v64i1_v64f32 = uitofp <64 x i1> undef to <64 x float>
+  %v64i1_v64f64 = uitofp <64 x i1> undef to <64 x double>
+
+  %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
+  %v128i8_v128f32 = uitofp <128 x i8> undef to <128 x float>
+  %v128i8_v128f64 = uitofp <128 x i8> undef to <128 x double>
+  %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
+  %v128i16_v128f32 = uitofp <128 x i16> undef to <128 x float>
+  %v128i16_v128f64 = uitofp <128 x i16> undef to <128 x double>
+  %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
+  %v128i32_v128f32 = uitofp <128 x i32> undef to <128 x float>
+  %v128i32_v128f64 = uitofp <128 x i32> undef to <128 x double>
+  %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
+  %v128i64_v128f32 = uitofp <128 x i64> undef to <128 x float>
+  %v128i64_v128f64 = uitofp <128 x i16> undef to <128 x double>
+  %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
+  %v128i1_v128f32 = uitofp <128 x i1> undef to <128 x float>
+  %v128i1_v128f64 = uitofp <128 x i1> undef to <128 x double>
 
   ret void
 }