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Differential D149933

[RISCV] Add X1 as implicit def of cm.jalt.
ClosedPublic

Authored by craig.topper on May 5 2023, 12:13 AM.

Details

Reviewers
jrtc27
asb
VincentWu
Commits
rG913b95fb8085: [RISCV] Add X1 as implicit def of cm.jalt.
Summary

This instruction updates the RA register.

Diff Detail

Event Timeline

craig.topper created this revision.May 5 2023, 12:13 AM
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craig.topper requested review of this revision.May 5 2023, 12:13 AM
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Harbormaster completed remote builds in B230176: Diff 519754.May 5 2023, 12:59 AM
VincentWu accepted this revision.May 5 2023, 1:15 AM

LGTM

This revision is now accepted and ready to land.May 5 2023, 1:15 AM
Closed by commit rG913b95fb8085: [RISCV] Add X1 as implicit def of cm.jalt. (authored by craig.topper). · Explain WhyMay 5 2023, 10:09 AM
This revision was automatically updated to reflect the committed changes.
craig.topper added a commit: rG913b95fb8085: [RISCV] Add X1 as implicit def of cm.jalt..

Revision Contents

PathSize
llvm/
lib/
Target/
RISCV/
1 line

Diff 519916

llvm/lib/Target/RISCV/RISCVInstrInfoZc.td

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def CM_JT : RVInst16CJ<0b101, 0b10, (outs), (ins uimm5:$index), def CM_JT : RVInst16CJ<0b101, 0b10, (outs), (ins uimm5:$index),
"cm.jt", "$index">{ "cm.jt", "$index">{
bits<5> index; bits<5> index;
let Inst{12-7} = 0b000000; let Inst{12-7} = 0b000000;
let Inst{6-2} = index; let Inst{6-2} = index;
} }
let Defs = [X1] in
def CM_JALT : RVInst16CJ<0b101, 0b10, (outs), (ins uimm8ge32:$index), def CM_JALT : RVInst16CJ<0b101, 0b10, (outs), (ins uimm8ge32:$index),
"cm.jalt", "$index">{ "cm.jalt", "$index">{
bits<8> index; bits<8> index;
let Inst{12-10} = 0b000; let Inst{12-10} = 0b000;
let Inst{9-2} = index; let Inst{9-2} = index;
} }
} // DecoderNamespace = "RVZcmt", Predicates = [HasStdExtZcmt]... } // DecoderNamespace = "RVZcmt", Predicates = [HasStdExtZcmt]...
▲ Show 20 Lines • Show All 64 Lines • Show Last 20 Lines