[CodeGen] Support allocating of arguments by decreasing offsets

[barannikov88]

Summary

Previously, CCState::AllocateStack always allocated stack space by increasing
offsets. For targets with stack growing up (away from zero) it is more
convenient to allocate arguments by decreasing offsets, so that the first
argument is at the top of the stack. This is important when calling a function
with variable number of arguments: the callee does not know the size of the
stack, but must be able to access "fixed" arguments. For that to work, the
"fixed" arguments should have fixed offsets relative to the stack top, i.e. the
variadic arguments area should be at the stack bottom (at lowest addresses).

The in-tree target with stack growing up is AMDGPU, but it allocates
arguments by increasing addresses. It does not support variadic arguments.

A drive-by change is to promote stack size/offset to 64-bit integer.
This is what MachineFrameInfo expects.

[arsenm]

llvm/include/llvm/CodeGen/CallingConvLower.h

177–178

Is this really any different from StackGrowsUp/Down?

[barannikov88]

llvm/include/llvm/CodeGen/CallingConvLower.h

177–178

NegativeOffsets == true should be equivalent to StackGrowsUp,
but this is not the case for AMDGPU, which allocates objects at positive offsets.
I remember you saying it may change in the future. If that happens, this flag can be removed.

(I've update the description, it used the wrong terms.)

[arsenm]

llvm/unittests/CodeGen/CCStateTest.cpp

38

These should use EXPECT_EQ with swapped arguments

[barannikov88]

llvm/unittests/CodeGen/CCStateTest.cpp

38

@arsenm
I used ASSERT_EQ because if one of the checks fails, the rest will most likely fail too. That is, there is little point in continuing.
About swapping the operands -- I vaguely remember it was the preferred style, but I think it is no longer relevant (https://groups.google.com/a/chromium.org/g/chromium-dev/c/3aQU5iM5Ov0).
There seems to be no consistency in LLVM unit tests regarding the order of operands.

I was planning to apply the suggestion when pushing anyway, but forgot. Sorry about that.

llvm/include/llvm/CodeGen/CallingConvLower.h

static CCValAssign getReg(unsigned ValNo, MVT ValVT, unsigned RegNo,
     return Ret;
   }
 
   static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT, unsigned RegNo,
                                   MVT LocVT, LocInfo HTP) {
     return getReg(ValNo, ValVT, RegNo, LocVT, HTP, /*IsCustom=*/true);
   }
 
-  static CCValAssign getMem(unsigned ValNo, MVT ValVT, unsigned Offset,
+  static CCValAssign getMem(unsigned ValNo, MVT ValVT, int64_t Offset,
                             MVT LocVT, LocInfo HTP, bool IsCustom = false) {
     CCValAssign Ret(HTP, ValNo, ValVT, LocVT, IsCustom);
-    Ret.Data = int64_t(Offset);
+    Ret.Data = Offset;
     return Ret;
   }
 
-  static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT, unsigned Offset,
+  static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT, int64_t Offset,
                                   MVT LocVT, LocInfo HTP) {
     return getMem(ValNo, ValVT, Offset, LocVT, HTP, /*IsCustom=*/true);
   }
 
   static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT,
                                 LocInfo HTP, unsigned ExtraInfo = 0) {
     CCValAssign Ret(HTP, ValNo, ValVT, LocVT, false);
     Ret.Data = ExtraInfo;
     return Ret;
   }
 
   void convertToReg(unsigned RegNo) { Data = Register(RegNo); }
 
-  void convertToMem(unsigned Offset) { Data = int64_t(Offset); }
+  void convertToMem(int64_t Offset) { Data = Offset; }
 
   unsigned getValNo() const { return ValNo; }
   MVT getValVT() const { return ValVT; }
 
   bool isRegLoc() const { return std::holds_alternative<Register>(Data); }
   bool isMemLoc() const { return std::holds_alternative<int64_t>(Data); }
   bool isPendingLoc() const { return std::holds_alternative<unsigned>(Data); }
 
   bool needsCustom() const { return isCustom; }
 
   Register getLocReg() const { return std::get<Register>(Data); }
-  unsigned getLocMemOffset() const { return std::get<int64_t>(Data); }
+  int64_t getLocMemOffset() const { return std::get<int64_t>(Data); }
   unsigned getExtraInfo() const { return std::get<unsigned>(Data); }
 
   MVT getLocVT() const { return LocVT; }
 
   LocInfo getLocInfo() const { return HTP; }
   bool isExtInLoc() const {
     return (HTP == AExt || HTP == SExt || HTP == ZExt);
   }

 private:
   CallingConv::ID CallingConv;
   bool IsVarArg;
   bool AnalyzingMustTailForwardedRegs = false;
   MachineFunction &MF;
   const TargetRegisterInfo &TRI;
   SmallVectorImpl<CCValAssign> &Locs;
   LLVMContext &Context;
+  // True if arguments should be allocated at negative offsets.
+  bool NegativeOffsets;
 
-  unsigned StackSize;
+  uint64_t StackSize;
   Align MaxStackArgAlign;
   SmallVector<uint32_t, 16> UsedRegs;
   SmallVector<CCValAssign, 4> PendingLocs;
   SmallVector<ISD::ArgFlagsTy, 4> PendingArgFlags;
 
   // ByValInfo and SmallVector<ByValInfo, 4> ByValRegs:
   //
   // Vector of ByValInfo instances (ByValRegs) is introduced for byval registers
private:
   };
   SmallVector<ByValInfo, 4 > ByValRegs;
 
   // InRegsParamsProcessed - shows how many instances of ByValRegs was proceed
   // during argument analysis.
   unsigned InRegsParamsProcessed;
 
 public:
-  CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
-          SmallVectorImpl<CCValAssign> &locs, LLVMContext &C);
+  CCState(CallingConv::ID CC, bool IsVarArg, MachineFunction &MF,
+          SmallVectorImpl<CCValAssign> &Locs, LLVMContext &Context,
+          bool NegativeOffsets = false);
 
   void addLoc(const CCValAssign &V) {
     Locs.push_back(V);
   }
 
   LLVMContext &getContext() const { return Context; }
   MachineFunction &getMachineFunction() const { return MF; }
   CallingConv::ID getCallingConv() const { return CallingConv; }
   bool isVarArg() const { return IsVarArg; }
 
   /// Returns the size of the currently allocated portion of the stack.
-  unsigned getStackSize() const { return StackSize; }
+  uint64_t getStackSize() const { return StackSize; }
 
   /// getAlignedCallFrameSize - Return the size of the call frame needed to
   /// be able to store all arguments and such that the alignment requirement
   /// of each of the arguments is satisfied.
-  unsigned getAlignedCallFrameSize() const {
+  uint64_t getAlignedCallFrameSize() const {
     return alignTo(StackSize, MaxStackArgAlign);
   }
 
   /// isAllocated - Return true if the specified register (or an alias) is
   /// allocated.
   bool isAllocated(MCRegister Reg) const {
     return UsedRegs[Reg / 32] & (1 << (Reg & 31));
   }
MCRegister AllocateReg(ArrayRef<MCPhysReg> Regs, const MCPhysReg *ShadowRegs) {
     MCRegister Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
     MarkAllocated(Reg);
     MarkAllocated(ShadowReg);
     return Reg;
   }
 
   /// AllocateStack - Allocate a chunk of stack space with the specified size
   /// and alignment.
-  unsigned AllocateStack(unsigned Size, Align Alignment) {
-    StackSize = alignTo(StackSize, Alignment);
-    unsigned Result = StackSize;
-    StackSize += Size;
+  int64_t AllocateStack(unsigned Size, Align Alignment) {
+    int64_t Offset;
+    if (NegativeOffsets) {
+      StackSize = alignTo(StackSize + Size, Alignment);
+      Offset = -StackSize;
+    } else {
+      Offset = alignTo(StackSize, Alignment);
+      StackSize = Offset + Size;
+    }
     MaxStackArgAlign = std::max(Alignment, MaxStackArgAlign);
     ensureMaxAlignment(Alignment);
-    return Result;
+    return Offset;
   }
 
   void ensureMaxAlignment(Align Alignment);
 
   /// Version of AllocateStack with list of extra registers to be shadowed.
   /// Note that, unlike AllocateReg, this shadows ALL of the shadow registers.
-  unsigned AllocateStack(unsigned Size, Align Alignment,
-                         ArrayRef<MCPhysReg> ShadowRegs) {
+  int64_t AllocateStack(unsigned Size, Align Alignment,
     for (MCPhysReg Reg : ShadowRegs)
       MarkAllocated(Reg);
     return AllocateStack(Size, Alignment);
   }
 
   // HandleByVal - Allocate a stack slot large enough to pass an argument by
   // value. The size and alignment information of the argument is encoded in its
   // parameter attribute.

llvm/lib/CodeGen/CallingConvLower.cpp

 #include "llvm/MC/MCRegisterInfo.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/SaveAndRestore.h"
 #include "llvm/Support/raw_ostream.h"
 
 using namespace llvm;
 
-CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf,
-                 SmallVectorImpl<CCValAssign> &locs, LLVMContext &C)
-    : CallingConv(CC), IsVarArg(isVarArg), MF(mf),
-      TRI(*MF.getSubtarget().getRegisterInfo()), Locs(locs), Context(C) {
+CCState::CCState(CallingConv::ID CC, bool IsVarArg, MachineFunction &MF,
+                 SmallVectorImpl<CCValAssign> &Locs, LLVMContext &Context,
+                 bool NegativeOffsets)
+    : CallingConv(CC), IsVarArg(IsVarArg), MF(MF),
+      TRI(*MF.getSubtarget().getRegisterInfo()), Locs(Locs), Context(Context),
+      NegativeOffsets(NegativeOffsets) {
+
   // No stack is used.
   StackSize = 0;
 
   clearByValRegsInfo();
   UsedRegs.resize((TRI.getNumRegs()+31)/32);
 }
 
 /// Allocate space on the stack large enough to pass an argument by value.
 /// The size and alignment information of the argument is encoded in
 /// its parameter attribute.
 void CCState::HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT,
                           CCValAssign::LocInfo LocInfo, int MinSize,
                           Align MinAlign, ISD::ArgFlagsTy ArgFlags) {
   Align Alignment = ArgFlags.getNonZeroByValAlign();
   unsigned Size  = ArgFlags.getByValSize();
   if (MinSize > (int)Size)
     Size = MinSize;
   if (MinAlign > Alignment)
     Alignment = MinAlign;
   ensureMaxAlignment(Alignment);
   MF.getSubtarget().getTargetLowering()->HandleByVal(this, Size, Alignment);
   Size = unsigned(alignTo(Size, MinAlign));
-  unsigned Offset = AllocateStack(Size, Alignment);
+  uint64_t Offset = AllocateStack(Size, Alignment);
   addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
 }
 
 /// Mark a register and all of its aliases as allocated.
 void CCState::MarkAllocated(MCPhysReg Reg) {
   for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
     UsedRegs[*AI / 32] |= 1 << (*AI & 31);
 }
if (VT.isVector())
     return true; // Assume -msse-regparm might be in effect.
   if (!VT.isInteger())
     return false;
   return (CC == CallingConv::X86_VectorCall || CC == CallingConv::X86_FastCall);
 }
 
 void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
                                           MVT VT, CCAssignFn Fn) {
-  unsigned SavedStackSize = StackSize;
+  uint64_t SavedStackSize = StackSize;
   Align SavedMaxStackArgAlign = MaxStackArgAlign;
   unsigned NumLocs = Locs.size();
 
   // Set the 'inreg' flag if it is used for this calling convention.
   ISD::ArgFlagsTy Flags;
   if (isValueTypeInRegForCC(CallingConv, VT))
     Flags.setInReg();
 

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

if (VA.isMemLoc()) {
       HandleMemLoc();
       continue;
     }
   }
 
   // On AIX a minimum of 8 words is saved to the parameter save area.
   const unsigned MinParameterSaveArea = 8 * PtrByteSize;
   // Area that is at least reserved in the caller of this function.
-  unsigned CallerReservedArea =
-      std::max(CCInfo.getStackSize(), LinkageSize + MinParameterSaveArea);
+  unsigned CallerReservedArea = std::max<unsigned>(
+      CCInfo.getStackSize(), LinkageSize + MinParameterSaveArea);
 
   // Set the size that is at least reserved in caller of this function. Tail
   // call optimized function's reserved stack space needs to be aligned so
   // that taking the difference between two stack areas will result in an
   // aligned stack.
   CallerReservedArea =
       EnsureStackAlignment(Subtarget.getFrameLowering(), CallerReservedArea);
   FuncInfo->setMinReservedArea(CallerReservedArea);
SDValue PPCTargetLowering::LowerCall_AIX(
 
   // The prolog code of the callee may store up to 8 GPR argument registers to
   // the stack, allowing va_start to index over them in memory if the callee
   // is variadic.
   // Because we cannot tell if this is needed on the caller side, we have to
   // conservatively assume that it is needed.  As such, make sure we have at
   // least enough stack space for the caller to store the 8 GPRs.
   const unsigned MinParameterSaveAreaSize = 8 * PtrByteSize;
-  const unsigned NumBytes =
-      std::max(LinkageSize + MinParameterSaveAreaSize, CCInfo.getStackSize());
+  const unsigned NumBytes = std::max<unsigned>(
+      LinkageSize + MinParameterSaveAreaSize, CCInfo.getStackSize());
 
   // Adjust the stack pointer for the new arguments...
   // These operations are automatically eliminated by the prolog/epilog pass.
   Chain = DAG.getCALLSEQ_START(Chain, NumBytes, 0, dl);
   SDValue CallSeqStart = Chain;
 
   SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
   SmallVector<SDValue, 8> MemOpChains;

llvm/lib/Target/Sparc/SparcISelLowering.cpp

SparcTargetLowering::LowerCall_64(TargetLowering::CallLoweringInfo &CLI,
   CLI.IsTailCall = CLI.IsTailCall && IsEligibleForTailCallOptimization(
                                          CCInfo, CLI, DAG.getMachineFunction());
 
   // Get the size of the outgoing arguments stack space requirement.
   // The stack offset computed by CC_Sparc64 includes all arguments.
   // Called functions expect 6 argument words to exist in the stack frame, used
   // or not.
   unsigned StackReserved = 6 * 8u;
-  unsigned ArgsSize = std::max(StackReserved, CCInfo.getStackSize());
+  unsigned ArgsSize = std::max<unsigned>(StackReserved, CCInfo.getStackSize());
 
   // Keep stack frames 16-byte aligned.
   ArgsSize = alignTo(ArgsSize, 16);
 
   // Varargs calls require special treatment.
   if (CLI.IsVarArg)
     fixupVariableFloatArgs(ArgLocs, CLI.Outs);
 

llvm/unittests/CodeGen/CCStateTest.cpp

+//===- CCStateTest.cpp ----------------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/CodeGen/CallingConvLower.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/TargetFrameLowering.h"
+#include "llvm/CodeGen/TargetInstrInfo.h"
+#include "llvm/CodeGen/TargetLowering.h"
+#include "llvm/CodeGen/TargetRegisterInfo.h"
+#include "llvm/CodeGen/TargetSubtargetInfo.h"
+#include "llvm/IR/Module.h"
+#include "llvm/MC/TargetRegistry.h"
+#include "llvm/Target/TargetMachine.h"
+#include "gtest/gtest.h"
+
+using namespace llvm;
+
+namespace {
+
+#include "MFCommon.inc"
+
+TEST(CCStateTest, NegativeOffsets) {
+  LLVMContext Ctx;
+  Module Mod("Module", Ctx);
+  auto MF = createMachineFunction(Ctx, Mod);
+
+  SmallVector<CCValAssign, 8> Locs;
+  CCState Info(CallingConv::C, /*IsVarArg=*/false, *MF, Locs, Ctx,
+               /*NegativeOffsets=*/true);
+
+  ASSERT_EQ(Info.AllocateStack(1, Align(1)), -1);
+  ASSERT_EQ(Info.AllocateStack(1, Align(2)), -2);
+  ASSERT_EQ(Info.AllocateStack(1, Align(2)), -4);
+  ASSERT_EQ(Info.AllocateStack(1, Align(1)), -5);
+  ASSERT_EQ(Info.AllocateStack(2, Align(2)), -8);
+  ASSERT_EQ(Info.AllocateStack(2, Align(2)), -10);
+  ASSERT_EQ(Info.AllocateStack(2, Align(1)), -12);
+  ASSERT_EQ(Info.AllocateStack(1, Align(1)), -13);
+  ASSERT_EQ(Info.getStackSize(), 13u);
+  ASSERT_EQ(Info.getAlignedCallFrameSize(), 14u);
+}
+
+} // namespace

llvm/unittests/CodeGen/CMakeLists.txt

set(LLVM_LINK_COMPONENTS
   TargetParser
   )
 
 add_llvm_unittest(CodeGenTests
   AArch64SelectionDAGTest.cpp
   AllocationOrderTest.cpp
   AMDGPUMetadataTest.cpp
   AsmPrinterDwarfTest.cpp
+  CCStateTest.cpp
   DIEHashTest.cpp
   DIETest.cpp
   DwarfStringPoolEntryRefTest.cpp
   InstrRefLDVTest.cpp
   LowLevelTypeTest.cpp
   LexicalScopesTest.cpp
   MachineInstrBundleIteratorTest.cpp
   MachineInstrTest.cpp

llvm/utils/TableGen/CallingConvEmitter.cpp

if (Action->isSubClassOf("CCDelegateTo")) {
       O << IndentStr << "  State.addLoc(CCValAssign::getReg(ValNo, ValVT, "
         << "Reg, LocVT, LocInfo));\n";
       O << IndentStr << "  return false;\n";
       O << IndentStr << "}\n";
     } else if (Action->isSubClassOf("CCAssignToStack")) {
       int Size = Action->getValueAsInt("Size");
       int Align = Action->getValueAsInt("Align");
 
-      O << IndentStr << "unsigned Offset" << ++Counter
+      O << IndentStr << "int64_t Offset" << ++Counter
         << " = State.AllocateStack(";
       if (Size)
         O << Size << ", ";
       else
         O << "\n" << IndentStr
           << "  State.getMachineFunction().getDataLayout()."
              "getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())),"
              " ";
if (Action->isSubClassOf("CCDelegateTo")) {
       O << IndentStr << "static const MCPhysReg ShadowRegList"
           << ShadowRegListNumber << "[] = {\n";
       O << IndentStr << "  ";
       ListSeparator LS;
       for (unsigned i = 0, e = ShadowRegList->size(); i != e; ++i)
         O << LS << getQualifiedName(ShadowRegList->getElementAsRecord(i));
       O << "\n" << IndentStr << "};\n";
 
-      O << IndentStr << "unsigned Offset" << ++Counter
+      O << IndentStr << "int64_t Offset" << ++Counter
         << " = State.AllocateStack(" << Size << ", Align(" << Align << "), "
         << "ShadowRegList" << ShadowRegListNumber << ");\n";
       O << IndentStr << "State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset"
         << Counter << ", LocVT, LocInfo));\n";
       O << IndentStr << "return false;\n";
     } else if (Action->isSubClassOf("CCPromoteToType")) {
       Record *DestTy = Action->getValueAsDef("DestTy");
       MVT::SimpleValueType DestVT = getValueType(DestTy);