[PowerPC] Look through OR, AND, XOR instructions when checking a clear.

[stefanp]

Summary

This patch adds the additional step of looking through AND, OR, XOR
instructions when we check the number of leading zeros.

[shchenz]

llvm/lib/Target/PowerPC/PPCMIPeephole.cpp

231

typo? Seem the two operand of the min/max are the same.

[shchenz]

llvm/lib/Target/PowerPC/PPCMIPeephole.cpp

222

record form too?

[amyk]

llvm/lib/Target/PowerPC/PPCMIPeephole.cpp

224

Is it possible to pull out MI->getOperand(1).getReg() to be used in both cases?

227

Do we need PPC::OR8, too?

[stefanp]

Fixed the operands because they were not supposed to be the same.
Added the record forms.
Fixed the typo of having two XOR8 and no OR8.

[shchenz]

LGTM.

llvm/lib/Target/PowerPC/PPCMIPeephole.cpp

if (Opcode == PPC::LHZ   || Opcode == PPC::LHZX  ||
     return 48;
 
   if (Opcode == PPC::LBZ   || Opcode == PPC::LBZX  ||
       Opcode == PPC::LBZ8  || Opcode == PPC::LBZX8 ||
       Opcode == PPC::LBZU  || Opcode == PPC::LBZUX ||
       Opcode == PPC::LBZU8 || Opcode == PPC::LBZUX8)
     return 56;
 
+  if (Opcode == PPC::AND || Opcode == PPC::AND8 || Opcode == PPC::AND_rec ||
+      Opcode == PPC::AND8_rec)
+    return std::max(
+        getKnownLeadingZeroCount(MI->getOperand(1).getReg(), TII, MRI),
+        getKnownLeadingZeroCount(MI->getOperand(2).getReg(), TII, MRI));
+
+  if (Opcode == PPC::OR || Opcode == PPC::OR8 || Opcode == PPC::XOR ||
+      Opcode == PPC::XOR8 || Opcode == PPC::OR_rec ||
+      Opcode == PPC::OR8_rec || Opcode == PPC::XOR_rec ||
+      Opcode == PPC::XOR8_rec)
+    return std::min(
+        getKnownLeadingZeroCount(MI->getOperand(1).getReg(), TII, MRI),
+        getKnownLeadingZeroCount(MI->getOperand(2).getReg(), TII, MRI));
+
   if (TII->isZeroExtended(Reg, MRI))
     return 32;
 
   return 0;
 }
 
 // This function maintains a map for the pairs <TOC Save Instr, Keep>
 // Each time a new TOC save is encountered, it checks if any of the existing

llvm/test/CodeGen/PowerPC/ppc-clear-before-return.ll

 
 
 define dso_local i64 @test_xor(ptr nocapture noundef readonly %inp) local_unnamed_addr #0 {
 ; 64BIT-LABEL: test_xor:
 ; 64BIT:       # %bb.0: # %entry
 ; 64BIT-NEXT:    lbz r4, 0(r3)
 ; 64BIT-NEXT:    lbz r3, 1(r3)
 ; 64BIT-NEXT:    xor r3, r3, r4
-; 64BIT-NEXT:    clrldi r3, r3, 56
 ; 64BIT-NEXT:    blr
 ;
 ; 32BIT-LABEL: test_xor:
 ; 32BIT:       # %bb.0: # %entry
 ; 32BIT-NEXT:    mr r4, r3
 ; 32BIT-NEXT:    li r3, 0
 ; 32BIT-NEXT:    lbz r5, 0(r4)
 ; 32BIT-NEXT:    lbz r4, 1(r4)

 define dso_local i64 @test_xor2(ptr nocapture noundef readonly %inp) local_unnamed_addr #0 {
 ; 64BIT-LABEL: test_xor2:
 ; 64BIT:       # %bb.0: # %entry
 ; 64BIT-NEXT:    lbz r4, 0(r3)
 ; 64BIT-NEXT:    lbz r5, 1(r3)
 ; 64BIT-NEXT:    lbz r3, 2(r3)
 ; 64BIT-NEXT:    xor r4, r5, r4
 ; 64BIT-NEXT:    xor r3, r4, r3
-; 64BIT-NEXT:    clrldi r3, r3, 56
 ; 64BIT-NEXT:    blr
 ;
 ; 32BIT-LABEL: test_xor2:
 ; 32BIT:       # %bb.0: # %entry
 ; 32BIT-NEXT:    mr r4, r3
 ; 32BIT-NEXT:    li r3, 0
 ; 32BIT-NEXT:    lbz r5, 0(r4)
 ; 32BIT-NEXT:    lbz r6, 1(r4)

 }
 
 define dso_local i64 @test_or(ptr nocapture noundef readonly %inp) local_unnamed_addr #0 {
 ; 64BIT-LABEL: test_or:
 ; 64BIT:       # %bb.0: # %entry
 ; 64BIT-NEXT:    lbz r4, 0(r3)
 ; 64BIT-NEXT:    lbz r3, 1(r3)
 ; 64BIT-NEXT:    or r3, r3, r4
-; 64BIT-NEXT:    clrldi r3, r3, 56
 ; 64BIT-NEXT:    blr
 ;
 ; 32BIT-LABEL: test_or:
 ; 32BIT:       # %bb.0: # %entry
 ; 32BIT-NEXT:    mr r4, r3
 ; 32BIT-NEXT:    li r3, 0
 ; 32BIT-NEXT:    lbz r5, 0(r4)
 ; 32BIT-NEXT:    lbz r4, 1(r4)

 define dso_local i64 @test_or2(ptr nocapture noundef readonly %inp) local_unnamed_addr #0 {
 ; 64BIT-LABEL: test_or2:
 ; 64BIT:       # %bb.0: # %entry
 ; 64BIT-NEXT:    lbz r4, 0(r3)
 ; 64BIT-NEXT:    lbz r5, 1(r3)
 ; 64BIT-NEXT:    lbz r3, 2(r3)
 ; 64BIT-NEXT:    or r4, r5, r4
 ; 64BIT-NEXT:    or r3, r4, r3
-; 64BIT-NEXT:    clrldi r3, r3, 56
 ; 64BIT-NEXT:    blr
 ;
 ; 32BIT-LABEL: test_or2:
 ; 32BIT:       # %bb.0: # %entry
 ; 32BIT-NEXT:    mr r4, r3
 ; 32BIT-NEXT:    li r3, 0
 ; 32BIT-NEXT:    lbz r5, 0(r4)
 ; 32BIT-NEXT:    lbz r6, 1(r4)

 }
 
 define dso_local i64 @test_and(ptr nocapture noundef readonly %inp) local_unnamed_addr #0 {
 ; 64BIT-LABEL: test_and:
 ; 64BIT:       # %bb.0: # %entry
 ; 64BIT-NEXT:    lbz r4, 0(r3)
 ; 64BIT-NEXT:    lbz r3, 1(r3)
 ; 64BIT-NEXT:    and r3, r3, r4
-; 64BIT-NEXT:    clrldi r3, r3, 56
 ; 64BIT-NEXT:    blr
 ;
 ; 32BIT-LABEL: test_and:
 ; 32BIT:       # %bb.0: # %entry
 ; 32BIT-NEXT:    mr r4, r3
 ; 32BIT-NEXT:    li r3, 0
 ; 32BIT-NEXT:    lbz r5, 0(r4)
 ; 32BIT-NEXT:    lbz r4, 1(r4)

 define dso_local i64 @test_and2(ptr nocapture noundef readonly %inp) local_unnamed_addr #0 {
 ; 64BIT-LABEL: test_and2:
 ; 64BIT:       # %bb.0: # %entry
 ; 64BIT-NEXT:    lbz r4, 0(r3)
 ; 64BIT-NEXT:    lbz r5, 1(r3)
 ; 64BIT-NEXT:    lbz r3, 2(r3)
 ; 64BIT-NEXT:    and r4, r5, r4
 ; 64BIT-NEXT:    and r3, r4, r3
-; 64BIT-NEXT:    clrldi r3, r3, 56
 ; 64BIT-NEXT:    blr
 ;
 ; 32BIT-LABEL: test_and2:
 ; 32BIT:       # %bb.0: # %entry
 ; 32BIT-NEXT:    mr r4, r3
 ; 32BIT-NEXT:    li r3, 0
 ; 32BIT-NEXT:    lbz r5, 0(r4)
 ; 32BIT-NEXT:    lbz r6, 1(r4)

 ; 64BIT:       # %bb.0: # %entry
 ; 64BIT-NEXT:    lbz r4, 0(r3)
 ; 64BIT-NEXT:    lbz r5, 1(r3)
 ; 64BIT-NEXT:    lbz r6, 2(r3)
 ; 64BIT-NEXT:    lbz r3, 3(r3)
 ; 64BIT-NEXT:    and r4, r5, r4
 ; 64BIT-NEXT:    xor r4, r4, r6
 ; 64BIT-NEXT:    or r3, r4, r3
-; 64BIT-NEXT:    clrldi r3, r3, 56
 ; 64BIT-NEXT:    blr
 ;
 ; 32BIT-LABEL: test_mixed:
 ; 32BIT:       # %bb.0: # %entry
 ; 32BIT-NEXT:    mr r4, r3
 ; 32BIT-NEXT:    li r3, 0
 ; 32BIT-NEXT:    lbz r5, 0(r4)
 ; 32BIT-NEXT:    lbz r6, 1(r4)

 ; 64BIT:       # %bb.0: # %entry
 ; 64BIT-NEXT:    lbz r5, 0(r3)
 ; 64BIT-NEXT:    lhz r6, 2(r4)
 ; 64BIT-NEXT:    lbz r3, 2(r3)
 ; 64BIT-NEXT:    lhz r4, 6(r4)
 ; 64BIT-NEXT:    and r5, r6, r5
 ; 64BIT-NEXT:    xor r3, r5, r3
 ; 64BIT-NEXT:    or r3, r3, r4
-; 64BIT-NEXT:    clrldi r3, r3, 48
 ; 64BIT-NEXT:    blr
 ;
 ; 32BIT-LABEL: test_mixedtype:
 ; 32BIT:       # %bb.0: # %entry
 ; 32BIT-NEXT:    lbz r5, 0(r3)
 ; 32BIT-NEXT:    lhz r6, 2(r4)
 ; 32BIT-NEXT:    lbz r3, 2(r3)
 ; 32BIT-NEXT:    lhz r4, 6(r4)