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Differential D148386

[MCParser] Reject processor-specific section flags not known by the current target
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Authored by MaskRay on Apr 14 2023, 3:14 PM.

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Reviewers
aeubanks
Commits
rGa4ad6a3b2db0: [MCParser] Reject processor-specific section flags not known by the current…
Summary

Catch accidentally used flags and match MCSectionELF.cpp.

Diff Detail

Event Timeline

MaskRay created this revision.Apr 14 2023, 3:14 PM
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MaskRay requested review of this revision.Apr 14 2023, 3:14 PM
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MaskRay mentioned this in D27449: [ARM] Implement execute-only support in CodeGen.Apr 14 2023, 3:18 PM
aeubanks accepted this revision.Apr 14 2023, 4:00 PM
This revision is now accepted and ready to land.Apr 14 2023, 4:00 PM
MaskRay edited the summary of this revision. (Show Details)Apr 14 2023, 4:05 PM
This revision was landed with ongoing or failed builds.Apr 14 2023, 4:06 PM
Closed by commit rGa4ad6a3b2db0: [MCParser] Reject processor-specific section flags not known by the current… (authored by MaskRay). · Explain Why
This revision was automatically updated to reflect the committed changes.
MaskRay added a commit: rGa4ad6a3b2db0: [MCParser] Reject processor-specific section flags not known by the current….
Harbormaster completed remote builds in B225742: Diff 513764.Apr 14 2023, 4:29 PM
Amir mentioned this in D148511: [BOLT][test] Update AArch64/r_aarch64_prelxx.s test.Apr 17 2023, 3:42 AM
zequanwu added a subscriber: zequanwu.Apr 17 2023, 1:57 PM

Hi, this is causing bolt/test/AArch64/r_aarch64_prelxx.s to fail:

/usr/local/google/home/zequanwu/workspace/llvm-project/bolt/test/AArch64/r_aarch64_prelxx.s:46:22: error: unknown flag
.section .dummy, "da"
                     ^
zequanwu added a comment.Apr 17 2023, 1:58 PM
In D148386#4275491, @zequanwu wrote:

Hi, this is causing bolt/test/AArch64/r_aarch64_prelxx.s to fail:

/usr/local/google/home/zequanwu/workspace/llvm-project/bolt/test/AArch64/r_aarch64_prelxx.s:46:22: error: unknown flag
.section .dummy, "da"
                     ^

NVM, https://reviews.llvm.org/D148511 fixes it.

Amir mentioned this in rG286b5071f1b5: [BOLT][test] Update AArch64/r_aarch64_prelxx.s test.Apr 17 2023, 2:33 PM

Revision Contents

PathSize
llvm/
lib/
MC/
MCParser/
8 lines
test/
MC/
ELF/
14 lines

Diff 513785

llvm/lib/MC/MCParser/ELFAsmParser.cpp

Show First 20 Lines • Show All 311 Lines • ▼ Show 20 Lines case 'M':
break; break;
case 'S': case 'S':
flags |= ELF::SHF_STRINGS; flags |= ELF::SHF_STRINGS;
break; break;
case 'T': case 'T':
flags |= ELF::SHF_TLS; flags |= ELF::SHF_TLS;
break; break;
case 'c': case 'c':
if (TT.getArch() != Triple::xcore)
return -1U;
flags |= ELF::XCORE_SHF_CP_SECTION; flags |= ELF::XCORE_SHF_CP_SECTION;
break; break;
case 'd': case 'd':
if (TT.getArch() != Triple::xcore)
return -1U;
flags |= ELF::XCORE_SHF_DP_SECTION; flags |= ELF::XCORE_SHF_DP_SECTION;
break; break;
case 'y': case 'y':
if (!(TT.isARM() || TT.isThumb()))
return -1U;
flags |= ELF::SHF_ARM_PURECODE; flags |= ELF::SHF_ARM_PURECODE;
break; break;
case 's': case 's':
if (TT.getArch() != Triple::hexagon)
return -1U;
flags |= ELF::SHF_HEX_GPREL; flags |= ELF::SHF_HEX_GPREL;
break; break;
case 'G': case 'G':
flags |= ELF::SHF_GROUP; flags |= ELF::SHF_GROUP;
break; break;
case 'R': case 'R':
if (TT.isOSSolaris()) if (TT.isOSSolaris())
flags |= ELF::SHF_SUNW_NODISCARD; flags |= ELF::SHF_SUNW_NODISCARD;
▲ Show 20 Lines • Show All 592 Lines • Show Last 20 Lines

llvm/test/MC/ELF/section-flags-unknown.s

  • This file was added.
## Some section flags are processor-specific. Reject them for other targets.
# RUN: not llvm-mc -triple=x86_64 %s -o /dev/null 2>&1 | FileCheck %s --implicit-check-not=error:
# CHECK: {{.*}}.s:[[# @LINE+1]]:34: error: unknown flag
.section XCORE_SHF_CP_SECTION,"c",@progbits
# CHECK: {{.*}}.s:[[# @LINE+1]]:34: error: unknown flag
.section XCORE_SHF_CP_SECTION,"d",@progbits
# CHECK: {{.*}}.s:[[# @LINE+1]]:27: error: unknown flag
.section SHF_HEX_GPREL,"s",@progbits
# CHECK: {{.*}}.s:[[# @LINE+1]]:30: error: unknown flag
.section SHF_ARM_PURECODE,"y",@progbits