[PowerPC] Fix the xxperm swap requirements

[maryammo]

Summary

This patch is to fix the xxperm vector operand swap condition so that the
single-use operand is in V2 to prevent copying, it also fixes the subtarget
condition to exploit the xpperm.

[stefanp]

I realize that a lot of test cases have changed but it would be good to add the test case that is specific to this opportunity where the copy is removed.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

10237–10240

nit:
Too many // .

Also, this comment needs to do a better job explaining why we want to avoid having the input with multiple uses as the second input to XXPERM. ie. That we have one input that is also an output for XXPERM and so that input must be clobbered.

llvm/test/CodeGen/PowerPC/pre-inc-disable.ll

140

Here we are replacing lfiwzx with lxsiwzx.
This could technically be a (very minor...) performance hit as we are now using an operation that is 5 cycles instead of 4.
I guess the upside is that we have a wider range of result registers.

182

Here it is the same idea as above. We are replacing a 4 cycle with a 5 cycle.

[maryammo]

Address review comments

[stefanp]

I have only one nit and that can be fixed on commit.
Otherwise LGTM.

llvm/test/CodeGen/PowerPC/xxperm-swap.ll

97

nit:
See if you can cut this list down. There are a lot of tests that have only required nounwind.
After you cut down the list make sure that the test still passes.

[nemanjai]

llvm/test/CodeGen/PowerPC/xxperm-swap.ll

2

Nit: it appears that the checks were produced bu update_llc_test_checks.py yet the comment saying so at the top of the file is not present (removed?). If you're using it to produce the checks, please leave it in place as it signals to future maintainers that it is safe to use it to update the test if needed.

97

+1

[maryammo]

Cut down the fn attributes and use update_llc_test_checks.py to generate checks

[maryammo]

This comment was removed by maryammo.

llvm/test/CodeGen/PowerPC/pre-inc-disable.ll

140

Thanks, I am just not sure about the solution if there is any?

[maryammo]

The patch is causing bot failures which did not show up at the time of posting this:
https://lab.llvm.org/buildbot/#/builders/16/builds/46086/steps/6/logs/FAIL__LLVM__pr61315_ll
TEST 'LLVM :: CodeGen/PowerPC/pr61315.ll' FAILED
I will post another patch to update that test accordingly.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

SDValue PPCTargetLowering::LowerVPERM(SDValue Op, SelectionDAG &DAG,
   bool isLittleEndian = Subtarget.isLittleEndian();
   bool isPPC64 = Subtarget.isPPC64();
 
   // Only need to place items backwards in LE,
   // the mask will be properly calculated.
   if (isLittleEndian)
     std::swap(V1, V2);
 
-  if (Subtarget.isISA3_0() && (V1->hasOneUse() || V2->hasOneUse())) {
+  if (Subtarget.hasVSX() && Subtarget.hasP9Vector() &&
+      (V1->hasOneUse() || V2->hasOneUse())) {
     LLVM_DEBUG(dbgs() << "At least one of two input vectors are dead - using "
                          "XXPERM instead\n");
     Opcode = PPCISD::XXPERM;
 
-    // if V2 is dead, then we swap V1 and V2 so we can
-    // use V2 as the destination instead.
-    if (!V1->hasOneUse() && V2->hasOneUse()) {
+    // The second input to XXPERM is also an output so if the second input has
+    // multiple uses then copying is necessary, as a result we want the
+    // single-use operand to be used as the second input to prevent copying.
+    if (!V2->hasOneUse() && V1->hasOneUse()) {
       std::swap(V1, V2);
       NeedSwap = !NeedSwap;
     }
   }
 
   // The SHUFFLE_VECTOR mask is almost exactly what we want for vperm, except
   // that it is in input element units, not in bytes.  Convert now.
 

llvm/test/CodeGen/PowerPC/pre-inc-disable.ll

entry:
   store <4 x i32> %11, ptr undef, align 16
   ret void
 }
 
 define void @test32(ptr nocapture readonly %pix2, i32 signext %i_pix2) {
 ; P9LE-LABEL: test32:
 ; P9LE:       # %bb.0: # %entry
 ; P9LE-NEXT:    add 5, 3, 4
-; P9LE-NEXT:    lfiwzx 0, 3, 4
+; P9LE-NEXT:    lxsiwzx 2, 3, 4
 ; P9LE-NEXT:    addis 3, 2, .LCPI1_0@toc@ha
-; P9LE-NEXT:    xxlxor 3, 3, 3
+; P9LE-NEXT:    xxlxor 0, 0, 0
 ; P9LE-NEXT:    vspltisw 4, 8
 ; P9LE-NEXT:    addi 3, 3, .LCPI1_0@toc@l
 ; P9LE-NEXT:    lxv 1, 0(3)
 ; P9LE-NEXT:    li 3, 4
-; P9LE-NEXT:    xxlxor 2, 2, 2
 ; P9LE-NEXT:    vadduwm 4, 4, 4
-; P9LE-NEXT:    xxperm 3, 0, 1
-; P9LE-NEXT:    lfiwzx 0, 5, 3
+; P9LE-NEXT:    lxsiwzx 3, 5, 3
 ; P9LE-NEXT:    xxperm 2, 0, 1
-; P9LE-NEXT:    vnegw 2, 2
-; P9LE-NEXT:    vslw 2, 2, 4
-; P9LE-NEXT:    vsubuwm 2, 2, 3
+; P9LE-NEXT:    xxperm 3, 0, 1
+; P9LE-NEXT:    vnegw 3, 3
+; P9LE-NEXT:    vslw 3, 3, 4
+; P9LE-NEXT:    vsubuwm 2, 3, 2
 ; P9LE-NEXT:    xxswapd 0, 2
 ; P9LE-NEXT:    stxv 0, 0(3)
 ; P9LE-NEXT:    blr
 ;
 ; P9BE-LABEL: test32:
 ; P9BE:       # %bb.0: # %entry
 ; P9BE-NEXT:    add 5, 3, 4
-; P9BE-NEXT:    lfiwzx 0, 3, 4
+; P9BE-NEXT:    lxsiwzx 2, 3, 4
 ; P9BE-NEXT:    addis 3, 2, .LCPI1_0@toc@ha
-; P9BE-NEXT:    xxlxor 3, 3, 3
+; P9BE-NEXT:    xxlxor 0, 0, 0
 ; P9BE-NEXT:    vspltisw 4, 8
 ; P9BE-NEXT:    addi 3, 3, .LCPI1_0@toc@l
 ; P9BE-NEXT:    lxv 1, 0(3)
 ; P9BE-NEXT:    li 3, 4
-; P9BE-NEXT:    xxlxor 2, 2, 2
 ; P9BE-NEXT:    vadduwm 4, 4, 4
-; P9BE-NEXT:    xxperm 3, 0, 1
-; P9BE-NEXT:    lfiwzx 0, 5, 3
+; P9BE-NEXT:    lxsiwzx 3, 5, 3
 ; P9BE-NEXT:    xxperm 2, 0, 1
-; P9BE-NEXT:    vnegw 2, 2
-; P9BE-NEXT:    vslw 2, 2, 4
-; P9BE-NEXT:    vsubuwm 2, 2, 3
+; P9BE-NEXT:    xxperm 3, 0, 1
+; P9BE-NEXT:    vnegw 3, 3
+; P9BE-NEXT:    vslw 3, 3, 4
+; P9BE-NEXT:    vsubuwm 2, 3, 2
 ; P9BE-NEXT:    xxswapd 0, 2
 ; P9BE-NEXT:    stxv 0, 0(3)
 ; P9BE-NEXT:    blr
 ;
 ; P9BE-AIX-LABEL: test32:
 ; P9BE-AIX:       # %bb.0: # %entry
 ; P9BE-AIX-NEXT:    add 5, 3, 4
-; P9BE-AIX-NEXT:    lfiwzx 0, 3, 4
+; P9BE-AIX-NEXT:    lxsiwzx 2, 3, 4
 ; P9BE-AIX-NEXT:    ld 3, L..C2(2) # %const.0
-; P9BE-AIX-NEXT:    xxlxor 3, 3, 3
-; P9BE-AIX-NEXT:    xxlxor 2, 2, 2
+; P9BE-AIX-NEXT:    xxlxor 0, 0, 0
 ; P9BE-AIX-NEXT:    vspltisw 4, 8
-; P9BE-AIX-NEXT:    vadduwm 4, 4, 4
 ; P9BE-AIX-NEXT:    lxv 1, 0(3)
 ; P9BE-AIX-NEXT:    li 3, 4
-; P9BE-AIX-NEXT:    xxperm 3, 0, 1
-; P9BE-AIX-NEXT:    lfiwzx 0, 5, 3
+; P9BE-AIX-NEXT:    vadduwm 4, 4, 4
+; P9BE-AIX-NEXT:    lxsiwzx 3, 5, 3
 ; P9BE-AIX-NEXT:    xxperm 2, 0, 1
-; P9BE-AIX-NEXT:    vnegw 2, 2
-; P9BE-AIX-NEXT:    vslw 2, 2, 4
-; P9BE-AIX-NEXT:    vsubuwm 2, 2, 3
+; P9BE-AIX-NEXT:    xxperm 3, 0, 1
+; P9BE-AIX-NEXT:    vnegw 3, 3
+; P9BE-AIX-NEXT:    vslw 3, 3, 4
+; P9BE-AIX-NEXT:    vsubuwm 2, 3, 2
 ; P9BE-AIX-NEXT:    xxswapd 0, 2
 ; P9BE-AIX-NEXT:    stxv 0, 0(3)
 ; P9BE-AIX-NEXT:    blr
 ;
 ; P9BE-AIX32-LABEL: test32:
 ; P9BE-AIX32:       # %bb.0: # %entry
 ; P9BE-AIX32-NEXT:    add 5, 3, 4
-; P9BE-AIX32-NEXT:    lfiwzx 0, 3, 4
+; P9BE-AIX32-NEXT:    lxsiwzx 2, 3, 4
 ; P9BE-AIX32-NEXT:    lwz 3, L..C2(2) # %const.0
-; P9BE-AIX32-NEXT:    xxlxor 3, 3, 3
-; P9BE-AIX32-NEXT:    xxlxor 2, 2, 2
+; P9BE-AIX32-NEXT:    xxlxor 0, 0, 0
 ; P9BE-AIX32-NEXT:    vspltisw 4, 8
-; P9BE-AIX32-NEXT:    vadduwm 4, 4, 4
 ; P9BE-AIX32-NEXT:    lxv 1, 0(3)
 ; P9BE-AIX32-NEXT:    li 3, 4
-; P9BE-AIX32-NEXT:    xxperm 3, 0, 1
-; P9BE-AIX32-NEXT:    lfiwzx 0, 5, 3
+; P9BE-AIX32-NEXT:    vadduwm 4, 4, 4
+; P9BE-AIX32-NEXT:    lxsiwzx 3, 5, 3
 ; P9BE-AIX32-NEXT:    xxperm 2, 0, 1
-; P9BE-AIX32-NEXT:    vnegw 2, 2
-; P9BE-AIX32-NEXT:    vslw 2, 2, 4
-; P9BE-AIX32-NEXT:    vsubuwm 2, 2, 3
+; P9BE-AIX32-NEXT:    xxperm 3, 0, 1
+; P9BE-AIX32-NEXT:    vnegw 3, 3
+; P9BE-AIX32-NEXT:    vslw 3, 3, 4
+; P9BE-AIX32-NEXT:    vsubuwm 2, 3, 2
 ; P9BE-AIX32-NEXT:    xxswapd 0, 2
 ; P9BE-AIX32-NEXT:    stxv 0, 0(3)
 ; P9BE-AIX32-NEXT:    blr
 entry:
   %idx.ext63 = sext i32 %i_pix2 to i64
   %add.ptr64 = getelementptr inbounds i8, ptr %pix2, i64 %idx.ext63
   %arrayidx5.1 = getelementptr inbounds i8, ptr %add.ptr64, i64 4
   %0 = load <4 x i8>, ptr %add.ptr64, align 1

 ; P9LE-NEXT:    bgelr+ 0
 ; P9LE-NEXT:  # %bb.1: # %if.then
 ;
 ; P9BE-LABEL: test16:
 ; P9BE:       # %bb.0: # %entry
 ; P9BE-NEXT:    sldi 4, 4, 1
 ; P9BE-NEXT:    li 7, 16
 ; P9BE-NEXT:    add 6, 3, 4
-; P9BE-NEXT:    lxsihzx 0, 6, 7
+; P9BE-NEXT:    lxsihzx 1, 3, 4
+; P9BE-NEXT:    addis 3, 2, .LCPI2_1@toc@ha
+; P9BE-NEXT:    lxsihzx 2, 6, 7
 ; P9BE-NEXT:    addis 6, 2, .LCPI2_0@toc@ha
+; P9BE-NEXT:    addi 3, 3, .LCPI2_1@toc@l
 ; P9BE-NEXT:    addi 6, 6, .LCPI2_0@toc@l
-; P9BE-NEXT:    lxv 1, 0(6)
+; P9BE-NEXT:    lxv 0, 0(6)
 ; P9BE-NEXT:    li 6, 0
-; P9BE-NEXT:    mtvsrwz 2, 6
-; P9BE-NEXT:    vmr 3, 2
-; P9BE-NEXT:    vsplth 4, 2, 3
-; P9BE-NEXT:    xxperm 3, 0, 1
-; P9BE-NEXT:    lxsihzx 0, 3, 4
-; P9BE-NEXT:    addis 3, 2, .LCPI2_1@toc@ha
-; P9BE-NEXT:    addi 3, 3, .LCPI2_1@toc@l
-; P9BE-NEXT:    xxperm 2, 0, 1
+; P9BE-NEXT:    mtvsrwz 3, 6
+; P9BE-NEXT:    xxperm 2, 3, 0
+; P9BE-NEXT:    xxperm 1, 3, 0
+; P9BE-NEXT:    vsplth 3, 3, 3
 ; P9BE-NEXT:    lxv 0, 0(3)
 ; P9BE-NEXT:    li 3, 0
-; P9BE-NEXT:    xxmrghw 2, 4, 2
-; P9BE-NEXT:    xxperm 3, 2, 0
-; P9BE-NEXT:    xxspltw 2, 3, 1
-; P9BE-NEXT:    vadduwm 2, 3, 2
+; P9BE-NEXT:    xxmrghw 3, 3, 1
+; P9BE-NEXT:    xxperm 2, 3, 0
+; P9BE-NEXT:    xxspltw 3, 2, 1
+; P9BE-NEXT:    vadduwm 2, 2, 3
 ; P9BE-NEXT:    vextuwlx 3, 3, 2
 ; P9BE-NEXT:    cmpw 3, 5
 ; P9BE-NEXT:    bgelr+ 0
 ; P9BE-NEXT:  # %bb.1: # %if.then
 ;
 ; P9BE-AIX-LABEL: test16:
 ; P9BE-AIX:       # %bb.0: # %entry
 ; P9BE-AIX-NEXT:    sldi 4, 4, 1
 ; P9BE-AIX-NEXT:    li 7, 16
 ; P9BE-AIX-NEXT:    add 6, 3, 4
-; P9BE-AIX-NEXT:    lxsihzx 0, 6, 7
-; P9BE-AIX-NEXT:    ld 6, L..C3(2) # %const.0
-; P9BE-AIX-NEXT:    lxv 1, 0(6)
+; P9BE-AIX-NEXT:    lxsihzx 1, 3, 4
+; P9BE-AIX-NEXT:    ld 3, L..C3(2) # %const.1
+; P9BE-AIX-NEXT:    lxsihzx 2, 6, 7
+; P9BE-AIX-NEXT:    ld 6, L..C4(2) # %const.0
+; P9BE-AIX-NEXT:    lxv 0, 0(6)
 ; P9BE-AIX-NEXT:    li 6, 0
-; P9BE-AIX-NEXT:    mtvsrwz 2, 6
-; P9BE-AIX-NEXT:    vmr 3, 2
-; P9BE-AIX-NEXT:    vsplth 4, 2, 3
-; P9BE-AIX-NEXT:    xxperm 3, 0, 1
-; P9BE-AIX-NEXT:    lxsihzx 0, 3, 4
-; P9BE-AIX-NEXT:    ld 3, L..C4(2) # %const.1
-; P9BE-AIX-NEXT:    xxperm 2, 0, 1
+; P9BE-AIX-NEXT:    mtvsrwz 3, 6
+; P9BE-AIX-NEXT:    xxperm 2, 3, 0
+; P9BE-AIX-NEXT:    xxperm 1, 3, 0
+; P9BE-AIX-NEXT:    vsplth 3, 3, 3
 ; P9BE-AIX-NEXT:    lxv 0, 0(3)
 ; P9BE-AIX-NEXT:    li 3, 0
-; P9BE-AIX-NEXT:    xxmrghw 2, 4, 2
-; P9BE-AIX-NEXT:    xxperm 3, 2, 0
-; P9BE-AIX-NEXT:    xxspltw 2, 3, 1
-; P9BE-AIX-NEXT:    vadduwm 2, 3, 2
+; P9BE-AIX-NEXT:    xxmrghw 3, 3, 1
+; P9BE-AIX-NEXT:    xxperm 2, 3, 0
+; P9BE-AIX-NEXT:    xxspltw 3, 2, 1
+; P9BE-AIX-NEXT:    vadduwm 2, 2, 3
 ; P9BE-AIX-NEXT:    vextuwlx 3, 3, 2
 ; P9BE-AIX-NEXT:    cmpw 3, 5
 ; P9BE-AIX-NEXT:    bgelr+ 0
 ; P9BE-AIX-NEXT:  # %bb.1: # %if.then
 ;
 ; P9BE-AIX32-LABEL: test16:
 ; P9BE-AIX32:       # %bb.0: # %entry
 ; P9BE-AIX32-NEXT:    slwi 4, 4, 1

 ; P9LE-NEXT:    cmpw 3, 5
 ; P9LE-NEXT:    bgelr+ 0
 ; P9LE-NEXT:  # %bb.1: # %if.then
 ;
 ; P9BE-LABEL: test8:
 ; P9BE:       # %bb.0: # %entry
 ; P9BE-NEXT:    add 6, 3, 4
 ; P9BE-NEXT:    li 7, 8
+; P9BE-NEXT:    lxsibzx 3, 3, 4
+; P9BE-NEXT:    addis 3, 2, .LCPI3_1@toc@ha
 ; P9BE-NEXT:    lxsibzx 0, 6, 7
 ; P9BE-NEXT:    addis 6, 2, .LCPI3_0@toc@ha
+; P9BE-NEXT:    addi 3, 3, .LCPI3_1@toc@l
 ; P9BE-NEXT:    addi 6, 6, .LCPI3_0@toc@l
 ; P9BE-NEXT:    lxv 1, 0(6)
 ; P9BE-NEXT:    li 6, 0
 ; P9BE-NEXT:    mtvsrwz 2, 6
-; P9BE-NEXT:    vspltb 3, 2, 7
 ; P9BE-NEXT:    xxperm 0, 2, 1
-; P9BE-NEXT:    lxsibzx 1, 3, 4
-; P9BE-NEXT:    addis 3, 2, .LCPI3_1@toc@ha
-; P9BE-NEXT:    addi 3, 3, .LCPI3_1@toc@l
-; P9BE-NEXT:    lxv 2, 0(3)
-; P9BE-NEXT:    addis 3, 2, .LCPI3_2@toc@ha
-; P9BE-NEXT:    addi 3, 3, .LCPI3_2@toc@l
-; P9BE-NEXT:    xxperm 2, 1, 2
-; P9BE-NEXT:    xxspltw 1, 3, 0
-; P9BE-NEXT:    vmrghh 2, 2, 3
-; P9BE-NEXT:    xxmrghw 2, 2, 0
+; P9BE-NEXT:    xxperm 3, 2, 1
+; P9BE-NEXT:    vspltb 2, 2, 7
+; P9BE-NEXT:    vmrghh 3, 3, 2
+; P9BE-NEXT:    xxspltw 1, 2, 0
+; P9BE-NEXT:    xxmrghw 3, 3, 0
 ; P9BE-NEXT:    lxv 0, 0(3)
 ; P9BE-NEXT:    li 3, 0
-; P9BE-NEXT:    xxperm 2, 1, 0
-; P9BE-NEXT:    xxspltw 3, 2, 1
-; P9BE-NEXT:    vadduwm 2, 2, 3
+; P9BE-NEXT:    xxperm 3, 1, 0
+; P9BE-NEXT:    xxspltw 2, 3, 1
+; P9BE-NEXT:    vadduwm 2, 3, 2
 ; P9BE-NEXT:    vextuwlx 3, 3, 2
 ; P9BE-NEXT:    cmpw 3, 5
 ; P9BE-NEXT:    bgelr+ 0
 ; P9BE-NEXT:  # %bb.1: # %if.then
 ;
 ; P9BE-AIX-LABEL: test8:
 ; P9BE-AIX:       # %bb.0: # %entry
 ; P9BE-AIX-NEXT:    add 6, 3, 4
 ; P9BE-AIX-NEXT:    li 7, 8
+; P9BE-AIX-NEXT:    lxsibzx 3, 3, 4
+; P9BE-AIX-NEXT:    ld 3, L..C5(2) # %const.1
 ; P9BE-AIX-NEXT:    lxsibzx 0, 6, 7
-; P9BE-AIX-NEXT:    ld 6, L..C5(2) # %const.0
+; P9BE-AIX-NEXT:    ld 6, L..C6(2) # %const.0
 ; P9BE-AIX-NEXT:    lxv 1, 0(6)
 ; P9BE-AIX-NEXT:    li 6, 0
 ; P9BE-AIX-NEXT:    mtvsrwz 2, 6
-; P9BE-AIX-NEXT:    vspltb 3, 2, 7
 ; P9BE-AIX-NEXT:    xxperm 0, 2, 1
-; P9BE-AIX-NEXT:    lxsibzx 1, 3, 4
-; P9BE-AIX-NEXT:    ld 3, L..C6(2) # %const.1
-; P9BE-AIX-NEXT:    lxv 2, 0(3)
-; P9BE-AIX-NEXT:    ld 3, L..C7(2) # %const.2
-; P9BE-AIX-NEXT:    xxperm 2, 1, 2
-; P9BE-AIX-NEXT:    xxspltw 1, 3, 0
-; P9BE-AIX-NEXT:    vmrghh 2, 2, 3
-; P9BE-AIX-NEXT:    xxmrghw 2, 2, 0
+; P9BE-AIX-NEXT:    xxperm 3, 2, 1
+; P9BE-AIX-NEXT:    vspltb 2, 2, 7
+; P9BE-AIX-NEXT:    vmrghh 3, 3, 2
+; P9BE-AIX-NEXT:    xxspltw 1, 2, 0
+; P9BE-AIX-NEXT:    xxmrghw 3, 3, 0
 ; P9BE-AIX-NEXT:    lxv 0, 0(3)
 ; P9BE-AIX-NEXT:    li 3, 0
-; P9BE-AIX-NEXT:    xxperm 2, 1, 0
-; P9BE-AIX-NEXT:    xxspltw 3, 2, 1
-; P9BE-AIX-NEXT:    vadduwm 2, 2, 3
+; P9BE-AIX-NEXT:    xxperm 3, 1, 0
+; P9BE-AIX-NEXT:    xxspltw 2, 3, 1
+; P9BE-AIX-NEXT:    vadduwm 2, 3, 2
 ; P9BE-AIX-NEXT:    vextuwlx 3, 3, 2
 ; P9BE-AIX-NEXT:    cmpw 3, 5
 ; P9BE-AIX-NEXT:    bgelr+ 0
 ; P9BE-AIX-NEXT:  # %bb.1: # %if.then
 ;
 ; P9BE-AIX32-LABEL: test8:
 ; P9BE-AIX32:       # %bb.0: # %entry
 ; P9BE-AIX32-NEXT:    add 6, 3, 4
 ; P9BE-AIX32-NEXT:    li 7, 8
+; P9BE-AIX32-NEXT:    lxsibzx 3, 3, 4
+; P9BE-AIX32-NEXT:    lwz 3, L..C4(2) # %const.1
 ; P9BE-AIX32-NEXT:    lxsibzx 0, 6, 7
-; P9BE-AIX32-NEXT:    lwz 6, L..C4(2) # %const.0
+; P9BE-AIX32-NEXT:    lwz 6, L..C5(2) # %const.0
 ; P9BE-AIX32-NEXT:    lxv 1, 0(6)
 ; P9BE-AIX32-NEXT:    li 6, 0
 ; P9BE-AIX32-NEXT:    mtvsrwz 2, 6
-; P9BE-AIX32-NEXT:    vspltb 3, 2, 7
 ; P9BE-AIX32-NEXT:    xxperm 0, 2, 1
-; P9BE-AIX32-NEXT:    lxsibzx 1, 3, 4
-; P9BE-AIX32-NEXT:    lwz 3, L..C5(2) # %const.1
-; P9BE-AIX32-NEXT:    lxv 2, 0(3)
-; P9BE-AIX32-NEXT:    lwz 3, L..C6(2) # %const.2
-; P9BE-AIX32-NEXT:    xxperm 2, 1, 2
-; P9BE-AIX32-NEXT:    xxspltw 1, 3, 0
-; P9BE-AIX32-NEXT:    vmrghh 2, 2, 3
-; P9BE-AIX32-NEXT:    xxmrghw 2, 2, 0
+; P9BE-AIX32-NEXT:    xxperm 3, 2, 1
+; P9BE-AIX32-NEXT:    vspltb 2, 2, 7
+; P9BE-AIX32-NEXT:    vmrghh 3, 3, 2
+; P9BE-AIX32-NEXT:    xxspltw 1, 2, 0
+; P9BE-AIX32-NEXT:    xxmrghw 3, 3, 0
 ; P9BE-AIX32-NEXT:    lxv 0, 0(3)
-; P9BE-AIX32-NEXT:    xxperm 2, 1, 0
-; P9BE-AIX32-NEXT:    xxspltw 3, 2, 1
-; P9BE-AIX32-NEXT:    vadduwm 2, 2, 3
+; P9BE-AIX32-NEXT:    xxperm 3, 1, 0
+; P9BE-AIX32-NEXT:    xxspltw 2, 3, 1
+; P9BE-AIX32-NEXT:    vadduwm 2, 3, 2
 ; P9BE-AIX32-NEXT:    stxv 2, -16(1)
 ; P9BE-AIX32-NEXT:    lwz 3, -16(1)
 ; P9BE-AIX32-NEXT:    cmpw 3, 5
 ; P9BE-AIX32-NEXT:    bgelr+ 0
 ; P9BE-AIX32-NEXT:  # %bb.1: # %if.then
 entry:
   %idxprom = sext i32 %delta to i64
   %add14 = add nsw i32 %delta, 8

llvm/test/CodeGen/PowerPC/v16i8_scalar_to_vector_shuffle.ll

 ; CHECK-LE-P8-NEXT:    lxvd2x vs1, 0, r5
 ; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
 ; CHECK-LE-P8-NEXT:    xxswapd v3, vs1
 ; CHECK-LE-P8-NEXT:    vperm v2, v4, v2, v3
 ; CHECK-LE-P8-NEXT:    blr
 ;
 ; CHECK-LE-P9-LABEL: test_none_v16i8:
 ; CHECK-LE-P9:       # %bb.0: # %entry
-; CHECK-LE-P9-NEXT:    mtfprd f0, r3
+; CHECK-LE-P9-NEXT:    mtvsrd v2, r3
 ; CHECK-LE-P9-NEXT:    addis r3, r2, .LCPI2_0@toc@ha
-; CHECK-LE-P9-NEXT:    lxv v2, 0(r4)
+; CHECK-LE-P9-NEXT:    lxv vs0, 0(r4)
 ; CHECK-LE-P9-NEXT:    addi r3, r3, .LCPI2_0@toc@l
 ; CHECK-LE-P9-NEXT:    lxv vs1, 0(r3)
 ; CHECK-LE-P9-NEXT:    xxperm v2, vs0, vs1
 ; CHECK-LE-P9-NEXT:    blr
 ;
 ; CHECK-BE-P8-LABEL: test_none_v16i8:
 ; CHECK-BE-P8:       # %bb.0: # %entry
 ; CHECK-BE-P8-NEXT:    addis r5, r2, .LCPI2_0@toc@ha
 ; CHECK-BE-P8-NEXT:    lxvw4x v2, 0, r4
 ; CHECK-BE-P8-NEXT:    mtvsrwz v4, r3
 ; CHECK-BE-P8-NEXT:    addi r5, r5, .LCPI2_0@toc@l
 ; CHECK-BE-P8-NEXT:    lxvw4x v3, 0, r5
 ; CHECK-BE-P8-NEXT:    vperm v2, v2, v4, v3
 ; CHECK-BE-P8-NEXT:    blr
 ;
 ; CHECK-BE-P9-LABEL: test_none_v16i8:
 ; CHECK-BE-P9:       # %bb.0: # %entry
-; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
+; CHECK-BE-P9-NEXT:    mtvsrwz v2, r3
 ; CHECK-BE-P9-NEXT:    addis r3, r2, .LCPI2_0@toc@ha
-; CHECK-BE-P9-NEXT:    lxv v2, 0(r4)
+; CHECK-BE-P9-NEXT:    lxv vs0, 0(r4)
 ; CHECK-BE-P9-NEXT:    addi r3, r3, .LCPI2_0@toc@l
 ; CHECK-BE-P9-NEXT:    lxv vs1, 0(r3)
 ; CHECK-BE-P9-NEXT:    xxperm v2, vs0, vs1
 ; CHECK-BE-P9-NEXT:    blr
 ;
 ; CHECK-AIX-64-P8-LABEL: test_none_v16i8:
 ; CHECK-AIX-64-P8:       # %bb.0: # %entry
 ; CHECK-AIX-64-P8-NEXT:    ld r5, L..C2(r2) # %const.0
 ; CHECK-AIX-64-P8-NEXT:    lxvw4x v2, 0, r4
 ; CHECK-AIX-64-P8-NEXT:    mtvsrwz v4, r3
 ; CHECK-AIX-64-P8-NEXT:    lxvw4x v3, 0, r5
 ; CHECK-AIX-64-P8-NEXT:    vperm v2, v2, v4, v3
 ; CHECK-AIX-64-P8-NEXT:    blr
 ;
 ; CHECK-AIX-64-P9-LABEL: test_none_v16i8:
 ; CHECK-AIX-64-P9:       # %bb.0: # %entry
-; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
+; CHECK-AIX-64-P9-NEXT:    mtvsrwz v2, r3
 ; CHECK-AIX-64-P9-NEXT:    ld r3, L..C1(r2) # %const.0
-; CHECK-AIX-64-P9-NEXT:    lxv v2, 0(r4)
+; CHECK-AIX-64-P9-NEXT:    lxv vs0, 0(r4)
 ; CHECK-AIX-64-P9-NEXT:    lxv vs1, 0(r3)
 ; CHECK-AIX-64-P9-NEXT:    xxperm v2, vs0, vs1
 ; CHECK-AIX-64-P9-NEXT:    blr
 ;
 ; CHECK-AIX-32-P8-LABEL: test_none_v16i8:
 ; CHECK-AIX-32-P8:       # %bb.0: # %entry
 ; CHECK-AIX-32-P8-NEXT:    addi r5, r1, -16
 ; CHECK-AIX-32-P8-NEXT:    lxvw4x v2, 0, r4

 ; CHECK-LE-P8-NEXT:    lxvd2x vs1, 0, r5
 ; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
 ; CHECK-LE-P8-NEXT:    xxswapd v3, vs1
 ; CHECK-LE-P8-NEXT:    vperm v2, v4, v2, v3
 ; CHECK-LE-P8-NEXT:    blr
 ;
 ; CHECK-LE-P9-LABEL: test_none_v8i16:
 ; CHECK-LE-P9:       # %bb.0: # %entry
-; CHECK-LE-P9-NEXT:    mtfprd f0, r3
+; CHECK-LE-P9-NEXT:    mtvsrd v2, r3
 ; CHECK-LE-P9-NEXT:    addis r3, r2, .LCPI5_0@toc@ha
-; CHECK-LE-P9-NEXT:    lxv v2, 0(r4)
+; CHECK-LE-P9-NEXT:    lxv vs0, 0(r4)
 ; CHECK-LE-P9-NEXT:    addi r3, r3, .LCPI5_0@toc@l
 ; CHECK-LE-P9-NEXT:    lxv vs1, 0(r3)
 ; CHECK-LE-P9-NEXT:    xxperm v2, vs0, vs1
 ; CHECK-LE-P9-NEXT:    blr
 ;
 ; CHECK-BE-P8-LABEL: test_none_v8i16:
 ; CHECK-BE-P8:       # %bb.0: # %entry
 ; CHECK-BE-P8-NEXT:    addis r5, r2, .LCPI5_0@toc@ha
 ; CHECK-BE-P8-NEXT:    lxvw4x v2, 0, r4
 ; CHECK-BE-P8-NEXT:    mtvsrwz v4, r3
 ; CHECK-BE-P8-NEXT:    addi r5, r5, .LCPI5_0@toc@l
 ; CHECK-BE-P8-NEXT:    lxvw4x v3, 0, r5
 ; CHECK-BE-P8-NEXT:    vperm v2, v2, v4, v3
 ; CHECK-BE-P8-NEXT:    blr
 ;
 ; CHECK-BE-P9-LABEL: test_none_v8i16:
 ; CHECK-BE-P9:       # %bb.0: # %entry
-; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
+; CHECK-BE-P9-NEXT:    mtvsrwz v2, r3
 ; CHECK-BE-P9-NEXT:    addis r3, r2, .LCPI5_0@toc@ha
-; CHECK-BE-P9-NEXT:    lxv v2, 0(r4)
+; CHECK-BE-P9-NEXT:    lxv vs0, 0(r4)
 ; CHECK-BE-P9-NEXT:    addi r3, r3, .LCPI5_0@toc@l
 ; CHECK-BE-P9-NEXT:    lxv vs1, 0(r3)
 ; CHECK-BE-P9-NEXT:    xxperm v2, vs0, vs1
 ; CHECK-BE-P9-NEXT:    blr
 ;
 ; CHECK-AIX-64-P8-LABEL: test_none_v8i16:
 ; CHECK-AIX-64-P8:       # %bb.0: # %entry
 ; CHECK-AIX-64-P8-NEXT:    ld r5, L..C3(r2) # %const.0
 ; CHECK-AIX-64-P8-NEXT:    lxvw4x v2, 0, r4
 ; CHECK-AIX-64-P8-NEXT:    mtvsrwz v4, r3
 ; CHECK-AIX-64-P8-NEXT:    lxvw4x v3, 0, r5
 ; CHECK-AIX-64-P8-NEXT:    vperm v2, v2, v4, v3
 ; CHECK-AIX-64-P8-NEXT:    blr
 ;
 ; CHECK-AIX-64-P9-LABEL: test_none_v8i16:
 ; CHECK-AIX-64-P9:       # %bb.0: # %entry
-; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
+; CHECK-AIX-64-P9-NEXT:    mtvsrwz v2, r3
 ; CHECK-AIX-64-P9-NEXT:    ld r3, L..C2(r2) # %const.0
-; CHECK-AIX-64-P9-NEXT:    lxv v2, 0(r4)
+; CHECK-AIX-64-P9-NEXT:    lxv vs0, 0(r4)
 ; CHECK-AIX-64-P9-NEXT:    lxv vs1, 0(r3)
 ; CHECK-AIX-64-P9-NEXT:    xxperm v2, vs0, vs1
 ; CHECK-AIX-64-P9-NEXT:    blr
 ;
 ; CHECK-AIX-32-P8-LABEL: test_none_v8i16:
 ; CHECK-AIX-32-P8:       # %bb.0: # %entry
 ; CHECK-AIX-32-P8-NEXT:    addi r5, r1, -16
 ; CHECK-AIX-32-P8-NEXT:    lxvw4x v2, 0, r4

llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll

 ; PC64LE9-NEXT:    xscvspdpn 3, 3
 ; PC64LE9-NEXT:    xsdivsp 0, 1, 0
 ; PC64LE9-NEXT:    xxswapd 1, 35
 ; PC64LE9-NEXT:    xscvspdpn 1, 1
 ; PC64LE9-NEXT:    xsdivsp 1, 2, 1
 ; PC64LE9-NEXT:    xxsldwi 2, 35, 35, 3
 ; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xsdivsp 2, 3, 2
-; PC64LE9-NEXT:    xscvdpspn 0, 0
+; PC64LE9-NEXT:    xscvdpspn 34, 0
+; PC64LE9-NEXT:    lxv 0, 0(3)
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
 ; PC64LE9-NEXT:    xscvdpspn 2, 2
-; PC64LE9-NEXT:    xxmrghw 34, 1, 2
-; PC64LE9-NEXT:    lxv 1, 0(3)
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    xxmrghw 35, 1, 2
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    blr
 entry:
   %div = call <3 x float> @llvm.experimental.constrained.fdiv.v3f32(
            <3 x float> %x,
            <3 x float> %y,
            metadata !"round.dynamic",
            metadata !"fpexcept.strict") #1
   ret <3 x float> %div

 ; PC64LE9-NEXT:    xscvspdpn 1, 0
 ; PC64LE9-NEXT:    xxsldwi 0, 63, 63, 3
 ; PC64LE9-NEXT:    xscvspdpn 2, 0
 ; PC64LE9-NEXT:    bl fmodf
 ; PC64LE9-NEXT:    nop
 ; PC64LE9-NEXT:    xscvdpspn 0, 1
 ; PC64LE9-NEXT:    xscvdpspn 1, 30
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI7_0@toc@ha
+; PC64LE9-NEXT:    xscvdpspn 34, 31
 ; PC64LE9-NEXT:    lxv 63, 48(1) # 16-byte Folded Reload
 ; PC64LE9-NEXT:    lxv 62, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT:    lfd 30, 64(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    addi 3, 3, .LCPI7_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
-; PC64LE9-NEXT:    xscvdpspn 0, 31
-; PC64LE9-NEXT:    lxv 1, 0(3)
 ; PC64LE9-NEXT:    lfd 31, 72(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    addi 3, 3, .LCPI7_0@toc@l
+; PC64LE9-NEXT:    lfd 30, 64(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
+; PC64LE9-NEXT:    lxv 0, 0(3)
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    addi 1, 1, 80
 ; PC64LE9-NEXT:    ld 0, 16(1)
 ; PC64LE9-NEXT:    mtlr 0
 ; PC64LE9-NEXT:    blr
 entry:
   %rem = call <3 x float> @llvm.experimental.constrained.frem.v3f32(
            <3 x float> %x,
            <3 x float> %y,

 ; PC64LE9-NEXT:    xscvspdpn 1, 1
 ; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xscvspdpn 3, 3
 ; PC64LE9-NEXT:    xsmulsp 0, 1, 0
 ; PC64LE9-NEXT:    xxswapd 1, 35
 ; PC64LE9-NEXT:    xscvspdpn 1, 1
 ; PC64LE9-NEXT:    xsmulsp 1, 2, 1
 ; PC64LE9-NEXT:    xxsldwi 2, 35, 35, 3
-; PC64LE9-NEXT:    xscvdpspn 0, 0
+; PC64LE9-NEXT:    xscvdpspn 34, 0
+; PC64LE9-NEXT:    lxv 0, 0(3)
 ; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xsmulsp 2, 3, 2
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
 ; PC64LE9-NEXT:    xscvdpspn 2, 2
-; PC64LE9-NEXT:    xxmrghw 34, 1, 2
-; PC64LE9-NEXT:    lxv 1, 0(3)
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    xxmrghw 35, 1, 2
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    blr
 entry:
   %mul = call <3 x float> @llvm.experimental.constrained.fmul.v3f32(
            <3 x float> %x,
            <3 x float> %y,
            metadata !"round.dynamic",
            metadata !"fpexcept.strict") #1
   ret <3 x float> %mul

 ; PC64LE9-NEXT:    xscvspdpn 1, 1
 ; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xscvspdpn 3, 3
 ; PC64LE9-NEXT:    xsaddsp 0, 1, 0
 ; PC64LE9-NEXT:    xxswapd 1, 35
 ; PC64LE9-NEXT:    xscvspdpn 1, 1
 ; PC64LE9-NEXT:    xsaddsp 1, 2, 1
 ; PC64LE9-NEXT:    xxsldwi 2, 35, 35, 3
-; PC64LE9-NEXT:    xscvdpspn 0, 0
+; PC64LE9-NEXT:    xscvdpspn 34, 0
+; PC64LE9-NEXT:    lxv 0, 0(3)
 ; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xsaddsp 2, 3, 2
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
 ; PC64LE9-NEXT:    xscvdpspn 2, 2
-; PC64LE9-NEXT:    xxmrghw 34, 1, 2
-; PC64LE9-NEXT:    lxv 1, 0(3)
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    xxmrghw 35, 1, 2
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    blr
 entry:
   %add = call <3 x float> @llvm.experimental.constrained.fadd.v3f32(
            <3 x float> %x,
            <3 x float> %y,
            metadata !"round.dynamic",
            metadata !"fpexcept.strict") #1
   ret <3 x float> %add

 ; PC64LE9-NEXT:    xscvspdpn 1, 1
 ; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xscvspdpn 3, 3
 ; PC64LE9-NEXT:    xssubsp 0, 1, 0
 ; PC64LE9-NEXT:    xxswapd 1, 35
 ; PC64LE9-NEXT:    xscvspdpn 1, 1
 ; PC64LE9-NEXT:    xssubsp 1, 2, 1
 ; PC64LE9-NEXT:    xxsldwi 2, 35, 35, 3
-; PC64LE9-NEXT:    xscvdpspn 0, 0
+; PC64LE9-NEXT:    xscvdpspn 34, 0
+; PC64LE9-NEXT:    lxv 0, 0(3)
 ; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xssubsp 2, 3, 2
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
 ; PC64LE9-NEXT:    xscvdpspn 2, 2
-; PC64LE9-NEXT:    xxmrghw 34, 1, 2
-; PC64LE9-NEXT:    lxv 1, 0(3)
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    xxmrghw 35, 1, 2
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    blr
 entry:
   %sub = call <3 x float> @llvm.experimental.constrained.fsub.v3f32(
            <3 x float> %x,
            <3 x float> %y,
            metadata !"round.dynamic",
            metadata !"fpexcept.strict") #1
   ret <3 x float> %sub

 ; PC64LE9-NEXT:    xscvspdpn 1, 1
 ; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xscvspdpn 0, 0
 ; PC64LE9-NEXT:    xssqrtsp 1, 1
 ; PC64LE9-NEXT:    xssqrtsp 2, 2
 ; PC64LE9-NEXT:    xssqrtsp 0, 0
 ; PC64LE9-NEXT:    xscvdpspn 2, 2
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xscvdpspn 0, 0
-; PC64LE9-NEXT:    xxmrghw 34, 1, 2
+; PC64LE9-NEXT:    xscvdpspn 34, 0
+; PC64LE9-NEXT:    xxmrghw 35, 1, 2
 ; PC64LE9-NEXT:    lxv 1, 0(3)
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    xxperm 34, 35, 1
 ; PC64LE9-NEXT:    blr
 entry:
   %sqrt = call <3 x float> @llvm.experimental.constrained.sqrt.v3f32(
                               <3 x float> %x,
                               metadata !"round.dynamic",
                               metadata !"fpexcept.strict") #1
   ret <3 x float> %sqrt
 }

 ; PC64LE9-NEXT:    xscvspdpn 1, 0
 ; PC64LE9-NEXT:    xxsldwi 0, 63, 63, 3
 ; PC64LE9-NEXT:    xscvspdpn 2, 0
 ; PC64LE9-NEXT:    bl powf
 ; PC64LE9-NEXT:    nop
 ; PC64LE9-NEXT:    xscvdpspn 0, 1
 ; PC64LE9-NEXT:    xscvdpspn 1, 30
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI32_0@toc@ha
+; PC64LE9-NEXT:    xscvdpspn 34, 31
 ; PC64LE9-NEXT:    lxv 63, 48(1) # 16-byte Folded Reload
 ; PC64LE9-NEXT:    lxv 62, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT:    lfd 30, 64(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    addi 3, 3, .LCPI32_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
-; PC64LE9-NEXT:    xscvdpspn 0, 31
-; PC64LE9-NEXT:    lxv 1, 0(3)
 ; PC64LE9-NEXT:    lfd 31, 72(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    addi 3, 3, .LCPI32_0@toc@l
+; PC64LE9-NEXT:    lfd 30, 64(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
+; PC64LE9-NEXT:    lxv 0, 0(3)
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    addi 1, 1, 80
 ; PC64LE9-NEXT:    ld 0, 16(1)
 ; PC64LE9-NEXT:    mtlr 0
 ; PC64LE9-NEXT:    blr
 entry:
   %pow = call <3 x float> @llvm.experimental.constrained.pow.v3f32(
                              <3 x float> %x,
                              <3 x float> %y,

 ; PC64LE9-NEXT:    fmr 30, 1
 ; PC64LE9-NEXT:    mr 4, 30
 ; PC64LE9-NEXT:    xscvspdpn 1, 0
 ; PC64LE9-NEXT:    bl __powisf2
 ; PC64LE9-NEXT:    nop
 ; PC64LE9-NEXT:    xscvdpspn 0, 1
 ; PC64LE9-NEXT:    xscvdpspn 1, 30
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI37_0@toc@ha
+; PC64LE9-NEXT:    xscvdpspn 34, 31
 ; PC64LE9-NEXT:    lxv 63, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT:    lfd 30, 64(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    lfd 31, 72(1) # 8-byte Folded Reload
 ; PC64LE9-NEXT:    ld 30, 48(1) # 8-byte Folded Reload
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI37_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
-; PC64LE9-NEXT:    xscvdpspn 0, 31
-; PC64LE9-NEXT:    lxv 1, 0(3)
-; PC64LE9-NEXT:    lfd 31, 72(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    lfd 30, 64(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
+; PC64LE9-NEXT:    lxv 0, 0(3)
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    addi 1, 1, 80
 ; PC64LE9-NEXT:    ld 0, 16(1)
 ; PC64LE9-NEXT:    mtlr 0
 ; PC64LE9-NEXT:    blr
 entry:
   %powi = call <3 x float> @llvm.experimental.constrained.powi.v3f32(
                               <3 x float> %x,
                               i32 %y,

 ; PC64LE9-NEXT:    xxsldwi 0, 63, 63, 3
 ; PC64LE9-NEXT:    fmr 30, 1
 ; PC64LE9-NEXT:    xscvspdpn 1, 0
 ; PC64LE9-NEXT:    bl sinf
 ; PC64LE9-NEXT:    nop
 ; PC64LE9-NEXT:    xscvdpspn 0, 1
 ; PC64LE9-NEXT:    xscvdpspn 1, 30
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI42_0@toc@ha
+; PC64LE9-NEXT:    xscvdpspn 34, 31
 ; PC64LE9-NEXT:    lxv 63, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI42_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
-; PC64LE9-NEXT:    xscvdpspn 1, 31
+; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
 ; PC64LE9-NEXT:    lxv 0, 0(3)
-; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    xxperm 34, 1, 0
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    addi 1, 1, 64
 ; PC64LE9-NEXT:    ld 0, 16(1)
 ; PC64LE9-NEXT:    mtlr 0
 ; PC64LE9-NEXT:    blr
 entry:
   %sin = call <3 x float> @llvm.experimental.constrained.sin.v3f32(
                               <3 x float> %x,
                               metadata !"round.dynamic",

 ; PC64LE9-NEXT:    xxsldwi 0, 63, 63, 3
 ; PC64LE9-NEXT:    fmr 30, 1
 ; PC64LE9-NEXT:    xscvspdpn 1, 0
 ; PC64LE9-NEXT:    bl cosf
 ; PC64LE9-NEXT:    nop
 ; PC64LE9-NEXT:    xscvdpspn 0, 1
 ; PC64LE9-NEXT:    xscvdpspn 1, 30
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI47_0@toc@ha
+; PC64LE9-NEXT:    xscvdpspn 34, 31
 ; PC64LE9-NEXT:    lxv 63, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI47_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
-; PC64LE9-NEXT:    xscvdpspn 1, 31
+; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
 ; PC64LE9-NEXT:    lxv 0, 0(3)
-; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    xxperm 34, 1, 0
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    addi 1, 1, 64
 ; PC64LE9-NEXT:    ld 0, 16(1)
 ; PC64LE9-NEXT:    mtlr 0
 ; PC64LE9-NEXT:    blr
 entry:
   %cos = call <3 x float> @llvm.experimental.constrained.cos.v3f32(
                               <3 x float> %x,
                               metadata !"round.dynamic",

 ; PC64LE9-NEXT:    xxsldwi 0, 63, 63, 3
 ; PC64LE9-NEXT:    fmr 30, 1
 ; PC64LE9-NEXT:    xscvspdpn 1, 0
 ; PC64LE9-NEXT:    bl expf
 ; PC64LE9-NEXT:    nop
 ; PC64LE9-NEXT:    xscvdpspn 0, 1
 ; PC64LE9-NEXT:    xscvdpspn 1, 30
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI52_0@toc@ha
+; PC64LE9-NEXT:    xscvdpspn 34, 31
 ; PC64LE9-NEXT:    lxv 63, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI52_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
-; PC64LE9-NEXT:    xscvdpspn 1, 31
+; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
 ; PC64LE9-NEXT:    lxv 0, 0(3)
-; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    xxperm 34, 1, 0
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    addi 1, 1, 64
 ; PC64LE9-NEXT:    ld 0, 16(1)
 ; PC64LE9-NEXT:    mtlr 0
 ; PC64LE9-NEXT:    blr
 entry:
   %exp = call <3 x float> @llvm.experimental.constrained.exp.v3f32(
                               <3 x float> %x,
                               metadata !"round.dynamic",

 ; PC64LE9-NEXT:    xxsldwi 0, 63, 63, 3
 ; PC64LE9-NEXT:    fmr 30, 1
 ; PC64LE9-NEXT:    xscvspdpn 1, 0
 ; PC64LE9-NEXT:    bl exp2f
 ; PC64LE9-NEXT:    nop
 ; PC64LE9-NEXT:    xscvdpspn 0, 1
 ; PC64LE9-NEXT:    xscvdpspn 1, 30
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI57_0@toc@ha
+; PC64LE9-NEXT:    xscvdpspn 34, 31
 ; PC64LE9-NEXT:    lxv 63, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI57_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
-; PC64LE9-NEXT:    xscvdpspn 1, 31
+; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
 ; PC64LE9-NEXT:    lxv 0, 0(3)
-; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    xxperm 34, 1, 0
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    addi 1, 1, 64
 ; PC64LE9-NEXT:    ld 0, 16(1)
 ; PC64LE9-NEXT:    mtlr 0
 ; PC64LE9-NEXT:    blr
 entry:
   %exp2 = call <3 x float> @llvm.experimental.constrained.exp2.v3f32(
                               <3 x float> %x,
                               metadata !"round.dynamic",

 ; PC64LE9-NEXT:    xxsldwi 0, 63, 63, 3
 ; PC64LE9-NEXT:    fmr 30, 1
 ; PC64LE9-NEXT:    xscvspdpn 1, 0
 ; PC64LE9-NEXT:    bl logf
 ; PC64LE9-NEXT:    nop
 ; PC64LE9-NEXT:    xscvdpspn 0, 1
 ; PC64LE9-NEXT:    xscvdpspn 1, 30
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI62_0@toc@ha
+; PC64LE9-NEXT:    xscvdpspn 34, 31
 ; PC64LE9-NEXT:    lxv 63, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI62_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
-; PC64LE9-NEXT:    xscvdpspn 1, 31
+; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
 ; PC64LE9-NEXT:    lxv 0, 0(3)
-; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    xxperm 34, 1, 0
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    addi 1, 1, 64
 ; PC64LE9-NEXT:    ld 0, 16(1)
 ; PC64LE9-NEXT:    mtlr 0
 ; PC64LE9-NEXT:    blr
 entry:
   %log = call <3 x float> @llvm.experimental.constrained.log.v3f32(
                               <3 x float> %x,
                               metadata !"round.dynamic",

 ; PC64LE9-NEXT:    xxsldwi 0, 63, 63, 3
 ; PC64LE9-NEXT:    fmr 30, 1
 ; PC64LE9-NEXT:    xscvspdpn 1, 0
 ; PC64LE9-NEXT:    bl log10f
 ; PC64LE9-NEXT:    nop
 ; PC64LE9-NEXT:    xscvdpspn 0, 1
 ; PC64LE9-NEXT:    xscvdpspn 1, 30
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI67_0@toc@ha
+; PC64LE9-NEXT:    xscvdpspn 34, 31
 ; PC64LE9-NEXT:    lxv 63, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI67_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
-; PC64LE9-NEXT:    xscvdpspn 1, 31
+; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
 ; PC64LE9-NEXT:    lxv 0, 0(3)
-; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    xxperm 34, 1, 0
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    addi 1, 1, 64
 ; PC64LE9-NEXT:    ld 0, 16(1)
 ; PC64LE9-NEXT:    mtlr 0
 ; PC64LE9-NEXT:    blr
 entry:
   %log10 = call <3 x float> @llvm.experimental.constrained.log10.v3f32(
                               <3 x float> %x,
                               metadata !"round.dynamic",

 ; PC64LE9-NEXT:    xxsldwi 0, 63, 63, 3
 ; PC64LE9-NEXT:    fmr 30, 1
 ; PC64LE9-NEXT:    xscvspdpn 1, 0
 ; PC64LE9-NEXT:    bl log2f
 ; PC64LE9-NEXT:    nop
 ; PC64LE9-NEXT:    xscvdpspn 0, 1
 ; PC64LE9-NEXT:    xscvdpspn 1, 30
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI72_0@toc@ha
+; PC64LE9-NEXT:    xscvdpspn 34, 31
 ; PC64LE9-NEXT:    lxv 63, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI72_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
-; PC64LE9-NEXT:    xscvdpspn 1, 31
+; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
 ; PC64LE9-NEXT:    lxv 0, 0(3)
-; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    xxperm 34, 1, 0
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    addi 1, 1, 64
 ; PC64LE9-NEXT:    ld 0, 16(1)
 ; PC64LE9-NEXT:    mtlr 0
 ; PC64LE9-NEXT:    blr
 entry:
   %log2 = call <3 x float> @llvm.experimental.constrained.log2.v3f32(
                               <3 x float> %x,
                               metadata !"round.dynamic",

 ; PC64LE9-NEXT:    xscvspdpn 1, 1
 ; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xscvspdpn 0, 0
 ; PC64LE9-NEXT:    xsrdpic 1, 1
 ; PC64LE9-NEXT:    xsrdpic 2, 2
 ; PC64LE9-NEXT:    xsrdpic 0, 0
 ; PC64LE9-NEXT:    xscvdpspn 2, 2
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xscvdpspn 0, 0
-; PC64LE9-NEXT:    xxmrghw 34, 1, 2
+; PC64LE9-NEXT:    xscvdpspn 34, 0
+; PC64LE9-NEXT:    xxmrghw 35, 1, 2
 ; PC64LE9-NEXT:    lxv 1, 0(3)
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    xxperm 34, 35, 1
 ; PC64LE9-NEXT:    blr
  entry:
   %rint = call <3 x float> @llvm.experimental.constrained.rint.v3f32(
                               <3 x float> %x,
                               metadata !"round.dynamic",
                               metadata !"fpexcept.strict") #1
   ret <3 x float> %rint
 }

 ; PC64LE9-NEXT:    xxsldwi 0, 63, 63, 3
 ; PC64LE9-NEXT:    fmr 30, 1
 ; PC64LE9-NEXT:    xscvspdpn 1, 0
 ; PC64LE9-NEXT:    bl nearbyintf
 ; PC64LE9-NEXT:    nop
 ; PC64LE9-NEXT:    xscvdpspn 0, 1
 ; PC64LE9-NEXT:    xscvdpspn 1, 30
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI82_0@toc@ha
+; PC64LE9-NEXT:    xscvdpspn 34, 31
 ; PC64LE9-NEXT:    lxv 63, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI82_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
-; PC64LE9-NEXT:    xscvdpspn 1, 31
+; PC64LE9-NEXT:    lfd 30, 48(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
 ; PC64LE9-NEXT:    lxv 0, 0(3)
-; PC64LE9-NEXT:    lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    xxperm 34, 1, 0
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    addi 1, 1, 64
 ; PC64LE9-NEXT:    ld 0, 16(1)
 ; PC64LE9-NEXT:    mtlr 0
 ; PC64LE9-NEXT:    blr
 entry:
   %nearby = call <3 x float> @llvm.experimental.constrained.nearbyint.v3f32(
                               <3 x float> %x,
                               metadata !"round.dynamic",

 ; PC64LE9-NEXT:    xscvspdpn 1, 0
 ; PC64LE9-NEXT:    xxsldwi 0, 63, 63, 3
 ; PC64LE9-NEXT:    xscvspdpn 2, 0
 ; PC64LE9-NEXT:    bl fmaxf
 ; PC64LE9-NEXT:    nop
 ; PC64LE9-NEXT:    xscvdpspn 0, 1
 ; PC64LE9-NEXT:    xscvdpspn 1, 30
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI87_0@toc@ha
+; PC64LE9-NEXT:    xscvdpspn 34, 31
 ; PC64LE9-NEXT:    lxv 63, 48(1) # 16-byte Folded Reload
 ; PC64LE9-NEXT:    lxv 62, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT:    lfd 30, 64(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    addi 3, 3, .LCPI87_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
-; PC64LE9-NEXT:    xscvdpspn 0, 31
-; PC64LE9-NEXT:    lxv 1, 0(3)
 ; PC64LE9-NEXT:    lfd 31, 72(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    addi 3, 3, .LCPI87_0@toc@l
+; PC64LE9-NEXT:    lfd 30, 64(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
+; PC64LE9-NEXT:    lxv 0, 0(3)
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    addi 1, 1, 80
 ; PC64LE9-NEXT:    ld 0, 16(1)
 ; PC64LE9-NEXT:    mtlr 0
 ; PC64LE9-NEXT:    blr
 entry:
   %max = call <3 x float> @llvm.experimental.constrained.maxnum.v3f32(
                               <3 x float> %x,
                               <3 x float> %y,

 ; PC64LE9-NEXT:    xscvspdpn 1, 0
 ; PC64LE9-NEXT:    xxsldwi 0, 63, 63, 3
 ; PC64LE9-NEXT:    xscvspdpn 2, 0
 ; PC64LE9-NEXT:    bl fminf
 ; PC64LE9-NEXT:    nop
 ; PC64LE9-NEXT:    xscvdpspn 0, 1
 ; PC64LE9-NEXT:    xscvdpspn 1, 30
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI92_0@toc@ha
+; PC64LE9-NEXT:    xscvdpspn 34, 31
 ; PC64LE9-NEXT:    lxv 63, 48(1) # 16-byte Folded Reload
 ; PC64LE9-NEXT:    lxv 62, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT:    lfd 30, 64(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    addi 3, 3, .LCPI92_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
-; PC64LE9-NEXT:    xscvdpspn 0, 31
-; PC64LE9-NEXT:    lxv 1, 0(3)
 ; PC64LE9-NEXT:    lfd 31, 72(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    addi 3, 3, .LCPI92_0@toc@l
+; PC64LE9-NEXT:    lfd 30, 64(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
+; PC64LE9-NEXT:    lxv 0, 0(3)
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    addi 1, 1, 80
 ; PC64LE9-NEXT:    ld 0, 16(1)
 ; PC64LE9-NEXT:    mtlr 0
 ; PC64LE9-NEXT:    blr
 entry:
   %min = call <3 x float> @llvm.experimental.constrained.minnum.v3f32(
                               <3 x float> %x,
                               <3 x float> %y,

 ; PC64LE-NEXT:    blr
 ;
 ; PC64LE9-LABEL: constrained_vector_fptosi_v3i32_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    xxsldwi 0, 34, 34, 3
 ; PC64LE9-NEXT:    xxswapd 1, 34
 ; PC64LE9-NEXT:    xscvspdpn 0, 0
 ; PC64LE9-NEXT:    xscvspdpn 1, 1
-; PC64LE9-NEXT:    xxsldwi 2, 34, 34, 1
-; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xscvdpsxws 0, 0
 ; PC64LE9-NEXT:    xscvdpsxws 1, 1
-; PC64LE9-NEXT:    xscvdpsxws 2, 2
 ; PC64LE9-NEXT:    mffprwz 3, 0
 ; PC64LE9-NEXT:    mtfprwz 0, 3
 ; PC64LE9-NEXT:    mffprwz 3, 1
 ; PC64LE9-NEXT:    mtfprwz 1, 3
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI97_0@toc@ha
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
+; PC64LE9-NEXT:    xxsldwi 1, 34, 34, 1
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI97_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 0, 1, 0
-; PC64LE9-NEXT:    lxv 1, 0(3)
-; PC64LE9-NEXT:    mffprwz 3, 2
-; PC64LE9-NEXT:    mtfprwz 2, 3
-; PC64LE9-NEXT:    xxperm 0, 2, 1
-; PC64LE9-NEXT:    xxlor 34, 0, 0
+; PC64LE9-NEXT:    lxv 0, 0(3)
+; PC64LE9-NEXT:    xscvspdpn 1, 1
+; PC64LE9-NEXT:    xscvdpsxws 1, 1
+; PC64LE9-NEXT:    mffprwz 3, 1
+; PC64LE9-NEXT:    mtvsrwz 34, 3
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    blr
 entry:
   %result = call <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f32(
                                 <3 x float> %x,
                                 metadata !"fpexcept.strict") #0
   ret <3 x i32> %result
 }
 

 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    xscvdpsxws 0, 1
 ; PC64LE9-NEXT:    xscvdpsxws 1, 2
 ; PC64LE9-NEXT:    mffprwz 3, 0
 ; PC64LE9-NEXT:    mtfprwz 0, 3
 ; PC64LE9-NEXT:    mffprwz 3, 1
 ; PC64LE9-NEXT:    mtfprwz 1, 3
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI105_0@toc@ha
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
 ; PC64LE9-NEXT:    xscvdpsxws 1, 3
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI105_0@toc@l
 ; PC64LE9-NEXT:    lxv 0, 0(3)
 ; PC64LE9-NEXT:    mffprwz 3, 1
-; PC64LE9-NEXT:    mtfprwz 1, 3
-; PC64LE9-NEXT:    xxperm 34, 1, 0
+; PC64LE9-NEXT:    mtvsrwz 34, 3
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    blr
 entry:
   %result = call <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f64(
                                 <3 x double> %x,
                                 metadata !"fpexcept.strict") #0
   ret <3 x i32> %result
 }
 

 ; PC64LE-NEXT:    blr
 ;
 ; PC64LE9-LABEL: constrained_vector_fptoui_v3i32_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    xxsldwi 0, 34, 34, 3
 ; PC64LE9-NEXT:    xxswapd 1, 34
 ; PC64LE9-NEXT:    xscvspdpn 0, 0
 ; PC64LE9-NEXT:    xscvspdpn 1, 1
-; PC64LE9-NEXT:    xxsldwi 2, 34, 34, 1
-; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xscvdpuxws 0, 0
 ; PC64LE9-NEXT:    xscvdpuxws 1, 1
-; PC64LE9-NEXT:    xscvdpuxws 2, 2
 ; PC64LE9-NEXT:    mffprwz 3, 0
 ; PC64LE9-NEXT:    mtfprwz 0, 3
 ; PC64LE9-NEXT:    mffprwz 3, 1
 ; PC64LE9-NEXT:    mtfprwz 1, 3
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI113_0@toc@ha
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
+; PC64LE9-NEXT:    xxsldwi 1, 34, 34, 1
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI113_0@toc@l
-; PC64LE9-NEXT:    xxmrghw 0, 1, 0
-; PC64LE9-NEXT:    lxv 1, 0(3)
-; PC64LE9-NEXT:    mffprwz 3, 2
-; PC64LE9-NEXT:    mtfprwz 2, 3
-; PC64LE9-NEXT:    xxperm 0, 2, 1
-; PC64LE9-NEXT:    xxlor 34, 0, 0
+; PC64LE9-NEXT:    lxv 0, 0(3)
+; PC64LE9-NEXT:    xscvspdpn 1, 1
+; PC64LE9-NEXT:    xscvdpuxws 1, 1
+; PC64LE9-NEXT:    mffprwz 3, 1
+; PC64LE9-NEXT:    mtvsrwz 34, 3
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    blr
 entry:
   %result = call <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f32(
                                 <3 x float> %x,
                                 metadata !"fpexcept.strict") #0
   ret <3 x i32> %result
 }
 

 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    xscvdpuxws 0, 1
 ; PC64LE9-NEXT:    xscvdpuxws 1, 2
 ; PC64LE9-NEXT:    mffprwz 3, 0
 ; PC64LE9-NEXT:    mtfprwz 0, 3
 ; PC64LE9-NEXT:    mffprwz 3, 1
 ; PC64LE9-NEXT:    mtfprwz 1, 3
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI121_0@toc@ha
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
 ; PC64LE9-NEXT:    xscvdpuxws 1, 3
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI121_0@toc@l
 ; PC64LE9-NEXT:    lxv 0, 0(3)
 ; PC64LE9-NEXT:    mffprwz 3, 1
-; PC64LE9-NEXT:    mtfprwz 1, 3
-; PC64LE9-NEXT:    xxperm 34, 1, 0
+; PC64LE9-NEXT:    mtvsrwz 34, 3
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    blr
 entry:
   %result = call <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f64(
                                 <3 x double> %x,
                                 metadata !"fpexcept.strict") #0
   ret <3 x i32> %result
 }
 

 ; PC64LE9-LABEL: constrained_vector_fptrunc_v3f64:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    xsrsp 0, 1
 ; PC64LE9-NEXT:    xsrsp 1, 2
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI129_0@toc@ha
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI129_0@toc@l
 ; PC64LE9-NEXT:    xscvdpspn 0, 0
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
 ; PC64LE9-NEXT:    xsrsp 1, 3
 ; PC64LE9-NEXT:    lxv 0, 0(3)
-; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xxperm 34, 1, 0
+; PC64LE9-NEXT:    xscvdpspn 34, 1
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    blr
 entry:
   %result = call <3 x float> @llvm.experimental.constrained.fptrunc.v3f32.v3f64(
                                 <3 x double> %x,
                                 metadata !"round.dynamic",
                                 metadata !"fpexcept.strict") #1
   ret <3 x float> %result
 }

 ; PC64LE9-NEXT:    xscvspdpn 1, 1
 ; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xscvspdpn 0, 0
 ; PC64LE9-NEXT:    xsrdpip 1, 1
 ; PC64LE9-NEXT:    xsrdpip 2, 2
 ; PC64LE9-NEXT:    xsrdpip 0, 0
 ; PC64LE9-NEXT:    xscvdpspn 2, 2
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xscvdpspn 0, 0
-; PC64LE9-NEXT:    xxmrghw 34, 1, 2
+; PC64LE9-NEXT:    xscvdpspn 34, 0
+; PC64LE9-NEXT:    xxmrghw 35, 1, 2
 ; PC64LE9-NEXT:    lxv 1, 0(3)
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    xxperm 34, 35, 1
 ; PC64LE9-NEXT:    blr
 entry:
   %ceil = call <3 x float> @llvm.experimental.constrained.ceil.v3f32(
                               <3 x float> %x,
                               metadata !"fpexcept.strict") #1
   ret <3 x float> %ceil
 }
 

 ; PC64LE9-NEXT:    xscvspdpn 1, 1
 ; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xscvspdpn 0, 0
 ; PC64LE9-NEXT:    xsrdpim 1, 1
 ; PC64LE9-NEXT:    xsrdpim 2, 2
 ; PC64LE9-NEXT:    xsrdpim 0, 0
 ; PC64LE9-NEXT:    xscvdpspn 2, 2
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xscvdpspn 0, 0
-; PC64LE9-NEXT:    xxmrghw 34, 1, 2
+; PC64LE9-NEXT:    xscvdpspn 34, 0
+; PC64LE9-NEXT:    xxmrghw 35, 1, 2
 ; PC64LE9-NEXT:    lxv 1, 0(3)
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    xxperm 34, 35, 1
 ; PC64LE9-NEXT:    blr
 entry:
   %floor = call <3 x float> @llvm.experimental.constrained.floor.v3f32(
                               <3 x float> %x,
                               metadata !"fpexcept.strict") #1
   ret <3 x float> %floor
 }
 

 ; PC64LE9-NEXT:    xscvspdpn 1, 1
 ; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xscvspdpn 0, 0
 ; PC64LE9-NEXT:    xsrdpi 1, 1
 ; PC64LE9-NEXT:    xsrdpi 2, 2
 ; PC64LE9-NEXT:    xsrdpi 0, 0
 ; PC64LE9-NEXT:    xscvdpspn 2, 2
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xscvdpspn 0, 0
-; PC64LE9-NEXT:    xxmrghw 34, 1, 2
+; PC64LE9-NEXT:    xscvdpspn 34, 0
+; PC64LE9-NEXT:    xxmrghw 35, 1, 2
 ; PC64LE9-NEXT:    lxv 1, 0(3)
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    xxperm 34, 35, 1
 ; PC64LE9-NEXT:    blr
 entry:
   %round = call <3 x float> @llvm.experimental.constrained.round.v3f32(
                               <3 x float> %x,
                               metadata !"fpexcept.strict") #1
   ret <3 x float> %round
 }
 

 ; PC64LE9-NEXT:    xscvspdpn 1, 1
 ; PC64LE9-NEXT:    xscvspdpn 2, 2
 ; PC64LE9-NEXT:    xscvspdpn 0, 0
 ; PC64LE9-NEXT:    xsrdpiz 1, 1
 ; PC64LE9-NEXT:    xsrdpiz 2, 2
 ; PC64LE9-NEXT:    xsrdpiz 0, 0
 ; PC64LE9-NEXT:    xscvdpspn 2, 2
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xscvdpspn 0, 0
-; PC64LE9-NEXT:    xxmrghw 34, 1, 2
+; PC64LE9-NEXT:    xscvdpspn 34, 0
+; PC64LE9-NEXT:    xxmrghw 35, 1, 2
 ; PC64LE9-NEXT:    lxv 1, 0(3)
-; PC64LE9-NEXT:    xxperm 34, 0, 1
+; PC64LE9-NEXT:    xxperm 34, 35, 1
 ; PC64LE9-NEXT:    blr
 entry:
   %trunc = call <3 x float> @llvm.experimental.constrained.trunc.v3f32(
                               <3 x float> %x,
                               metadata !"fpexcept.strict") #1
   ret <3 x float> %trunc
 }
 

 ; PC64LE9-NEXT:    vextuwrx 3, 3, 2
 ; PC64LE9-NEXT:    xscvsxdsp 0, 0
 ; PC64LE9-NEXT:    mtfprwa 1, 3
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI161_0@toc@ha
 ; PC64LE9-NEXT:    xscvsxdsp 1, 1
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI161_0@toc@l
 ; PC64LE9-NEXT:    xscvdpspn 0, 0
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xxmrghw 0, 1, 0
-; PC64LE9-NEXT:    lxv 1, 0(3)
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
+; PC64LE9-NEXT:    lxv 0, 0(3)
 ; PC64LE9-NEXT:    mfvsrwz 3, 34
-; PC64LE9-NEXT:    mtfprwa 2, 3
-; PC64LE9-NEXT:    xscvsxdsp 2, 2
-; PC64LE9-NEXT:    xscvdpspn 2, 2
-; PC64LE9-NEXT:    xxperm 0, 2, 1
-; PC64LE9-NEXT:    xxlor 34, 0, 0
+; PC64LE9-NEXT:    mtfprwa 1, 3
+; PC64LE9-NEXT:    xscvsxdsp 1, 1
+; PC64LE9-NEXT:    xscvdpspn 34, 1
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    blr
 entry:
   %result = call <3 x float>
            @llvm.experimental.constrained.sitofp.v3f32.v3i32(<3 x i32> %x,
                                                metadata !"round.dynamic",
                                                metadata !"fpexcept.strict") #0
   ret <3 x float> %result
 }

 ; PC64LE9-NEXT:    mtfprd 0, 3
 ; PC64LE9-NEXT:    mtfprd 1, 4
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI163_0@toc@ha
 ; PC64LE9-NEXT:    xscvsxdsp 0, 0
 ; PC64LE9-NEXT:    xscvsxdsp 1, 1
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI163_0@toc@l
 ; PC64LE9-NEXT:    xscvdpspn 0, 0
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
 ; PC64LE9-NEXT:    mtfprd 1, 5
 ; PC64LE9-NEXT:    lxv 0, 0(3)
 ; PC64LE9-NEXT:    xscvsxdsp 1, 1
-; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xxperm 34, 1, 0
+; PC64LE9-NEXT:    xscvdpspn 34, 1
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    blr
 entry:
   %result = call <3 x float>
            @llvm.experimental.constrained.sitofp.v3f32.v3i64(<3 x i64> %x,
                                                metadata !"round.dynamic",
                                                metadata !"fpexcept.strict") #0
   ret <3 x float> %result
 }

 ; PC64LE9-NEXT:    vextuwrx 3, 3, 2
 ; PC64LE9-NEXT:    xscvuxdsp 0, 0
 ; PC64LE9-NEXT:    mtfprwz 1, 3
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI179_0@toc@ha
 ; PC64LE9-NEXT:    xscvuxdsp 1, 1
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI179_0@toc@l
 ; PC64LE9-NEXT:    xscvdpspn 0, 0
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xxmrghw 0, 1, 0
-; PC64LE9-NEXT:    lxv 1, 0(3)
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
+; PC64LE9-NEXT:    lxv 0, 0(3)
 ; PC64LE9-NEXT:    mfvsrwz 3, 34
-; PC64LE9-NEXT:    mtfprwz 2, 3
-; PC64LE9-NEXT:    xscvuxdsp 2, 2
-; PC64LE9-NEXT:    xscvdpspn 2, 2
-; PC64LE9-NEXT:    xxperm 0, 2, 1
-; PC64LE9-NEXT:    xxlor 34, 0, 0
+; PC64LE9-NEXT:    mtfprwz 1, 3
+; PC64LE9-NEXT:    xscvuxdsp 1, 1
+; PC64LE9-NEXT:    xscvdpspn 34, 1
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    blr
 entry:
   %result = call <3 x float>
            @llvm.experimental.constrained.uitofp.v3f32.v3i32(<3 x i32> %x,
                                                metadata !"round.dynamic",
                                                metadata !"fpexcept.strict") #0
   ret <3 x float> %result
 }

 ; PC64LE9-NEXT:    mtfprd 0, 3
 ; PC64LE9-NEXT:    mtfprd 1, 4
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI181_0@toc@ha
 ; PC64LE9-NEXT:    xscvuxdsp 0, 0
 ; PC64LE9-NEXT:    xscvuxdsp 1, 1
 ; PC64LE9-NEXT:    addi 3, 3, .LCPI181_0@toc@l
 ; PC64LE9-NEXT:    xscvdpspn 0, 0
 ; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xxmrghw 34, 1, 0
+; PC64LE9-NEXT:    xxmrghw 35, 1, 0
 ; PC64LE9-NEXT:    mtfprd 1, 5
 ; PC64LE9-NEXT:    lxv 0, 0(3)
 ; PC64LE9-NEXT:    xscvuxdsp 1, 1
-; PC64LE9-NEXT:    xscvdpspn 1, 1
-; PC64LE9-NEXT:    xxperm 34, 1, 0
+; PC64LE9-NEXT:    xscvdpspn 34, 1
+; PC64LE9-NEXT:    xxperm 34, 35, 0
 ; PC64LE9-NEXT:    blr
 entry:
   %result = call <3 x float>
            @llvm.experimental.constrained.uitofp.v3f32.v3i64(<3 x i64> %x,
                                                metadata !"round.dynamic",
                                                metadata !"fpexcept.strict") #0
   ret <3 x float> %result
 }

llvm/test/CodeGen/PowerPC/xxperm-swap.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
+; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64le-unknown-linux-gnu < %s | \
+; RUN:   FileCheck %s --check-prefix=CHECK-LE-P9
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
+; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64-unknown-linux-gnu < %s | \
+; RUN:   FileCheck %s --check-prefix=CHECK-BE-P9
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
+; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64-ibm-aix < %s | \
+; RUN:   FileCheck %s --check-prefix=CHECK-AIX-64-P9
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
+; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc-ibm-aix < %s | \
+; RUN:   FileCheck %s --check-prefix=CHECK-AIX-32-P9
+
+; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
+define dso_local noundef <16 x i8> @test1(<16 x i8> noundef %burn, <16 x i8> noundef %a, <16 x i8> noundef %b) local_unnamed_addr #0 {
+; CHECK-LE-P9-LABEL: test1:
+; CHECK-LE-P9:       # %bb.0: # %entry
+; CHECK-LE-P9-NEXT:    addis r3, r2, .LCPI0_0@toc@ha
+; CHECK-LE-P9-NEXT:    addi r3, r3, .LCPI0_0@toc@l
+; CHECK-LE-P9-NEXT:    lxv vs0, 0(r3)
+; CHECK-LE-P9-NEXT:    xxperm v4, v3, vs0
+; CHECK-LE-P9-NEXT:    vaddubm v2, v4, v3
+; CHECK-LE-P9-NEXT:    blr
+;
+; CHECK-BE-P9-LABEL: test1:
+; CHECK-BE-P9:       # %bb.0: # %entry
+; CHECK-BE-P9-NEXT:    addis r3, r2, .LCPI0_0@toc@ha
+; CHECK-BE-P9-NEXT:    addi r3, r3, .LCPI0_0@toc@l
+; CHECK-BE-P9-NEXT:    lxv vs0, 0(r3)
+; CHECK-BE-P9-NEXT:    xxperm v4, v3, vs0
+; CHECK-BE-P9-NEXT:    vaddubm v2, v4, v3
+; CHECK-BE-P9-NEXT:    blr
+;
+; CHECK-AIX-64-P9-LABEL: test1:
+; CHECK-AIX-64-P9:       # %bb.0: # %entry
+; CHECK-AIX-64-P9-NEXT:    ld r3, L..C0(r2) # %const.0
+; CHECK-AIX-64-P9-NEXT:    lxv vs0, 0(r3)
+; CHECK-AIX-64-P9-NEXT:    xxperm v4, v3, vs0
+; CHECK-AIX-64-P9-NEXT:    vaddubm v2, v4, v3
+; CHECK-AIX-64-P9-NEXT:    blr
+;
+; CHECK-AIX-32-P9-LABEL: test1:
+; CHECK-AIX-32-P9:       # %bb.0: # %entry
+; CHECK-AIX-32-P9-NEXT:    lwz r3, L..C0(r2) # %const.0
+; CHECK-AIX-32-P9-NEXT:    lxv vs0, 0(r3)
+; CHECK-AIX-32-P9-NEXT:    xxperm v4, v3, vs0
+; CHECK-AIX-32-P9-NEXT:    vaddubm v2, v4, v3
+; CHECK-AIX-32-P9-NEXT:    blr
+entry:
+  %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 18, i32 23, i32 12, i32 22, i32 22, i32 22, i32 22, i32 0, i32 0, i32 0, i32 0, i32 9, i32 9, i32 9, i32 9>
+  %add = add <16 x i8> %shuffle, %a
+  ret <16 x i8> %add
+}
+
+; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
+define dso_local noundef <16 x i8> @test2(<16 x i8> noundef %burn, <16 x i8> noundef %a, <16 x i8> noundef %b) local_unnamed_addr #0 {
+; CHECK-LE-P9-LABEL: test2:
+; CHECK-LE-P9:       # %bb.0: # %entry
+; CHECK-LE-P9-NEXT:    addis r3, r2, .LCPI1_0@toc@ha
+; CHECK-LE-P9-NEXT:    addi r3, r3, .LCPI1_0@toc@l
+; CHECK-LE-P9-NEXT:    lxv vs0, 0(r3)
+; CHECK-LE-P9-NEXT:    xxperm v3, v4, vs0
+; CHECK-LE-P9-NEXT:    vaddubm v2, v3, v4
+; CHECK-LE-P9-NEXT:    blr
+;
+; CHECK-BE-P9-LABEL: test2:
+; CHECK-BE-P9:       # %bb.0: # %entry
+; CHECK-BE-P9-NEXT:    addis r3, r2, .LCPI1_0@toc@ha
+; CHECK-BE-P9-NEXT:    addi r3, r3, .LCPI1_0@toc@l
+; CHECK-BE-P9-NEXT:    lxv vs0, 0(r3)
+; CHECK-BE-P9-NEXT:    xxperm v3, v4, vs0
+; CHECK-BE-P9-NEXT:    vaddubm v2, v3, v4
+; CHECK-BE-P9-NEXT:    blr
+;
+; CHECK-AIX-64-P9-LABEL: test2:
+; CHECK-AIX-64-P9:       # %bb.0: # %entry
+; CHECK-AIX-64-P9-NEXT:    ld r3, L..C1(r2) # %const.0
+; CHECK-AIX-64-P9-NEXT:    lxv vs0, 0(r3)
+; CHECK-AIX-64-P9-NEXT:    xxperm v3, v4, vs0
+; CHECK-AIX-64-P9-NEXT:    vaddubm v2, v3, v4
+; CHECK-AIX-64-P9-NEXT:    blr
+;
+; CHECK-AIX-32-P9-LABEL: test2:
+; CHECK-AIX-32-P9:       # %bb.0: # %entry
+; CHECK-AIX-32-P9-NEXT:    lwz r3, L..C1(r2) # %const.0
+; CHECK-AIX-32-P9-NEXT:    lxv vs0, 0(r3)
+; CHECK-AIX-32-P9-NEXT:    xxperm v3, v4, vs0
+; CHECK-AIX-32-P9-NEXT:    vaddubm v2, v3, v4
+; CHECK-AIX-32-P9-NEXT:    blr
+entry:
+  %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 18, i32 23, i32 12, i32 22, i32 22, i32 22, i32 22, i32 0, i32 0, i32 0, i32 0, i32 9, i32 9, i32 9, i32 9>
+  %add = add <16 x i8> %shuffle, %b
+  ret <16 x i8> %add
+}
+
+attributes #0 = {nounwind}