[RISCV][Zfa] Fix fceil/ffloor codegen bugs

[joshua-arch1]

Summary

In https://reviews.llvm.org/D143982, I confused ceil and floor. Ceil should use fround instructions with 'rup' and floor should use 'rdn'.

[craig.topper]

llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td

229

The float and half tests are updated, but I only see a .td change for double. Did you upload only part of the patch.

Also use -U99999 when uploading patches.

[jrtc27]

llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td

227

Also the formatting for these is wrong, it should be FPR64:$rs1

231

Can we give these names?

[craig.topper]

llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td

197

There shouldn't be a space after the : either

231

I will give them names in another patch.

[craig.topper]

Please add a description when you post a new diff to describe what changed.

[joshua-arch1]

This comment was removed by joshua-arch1.

[craig.topper]

LGTM

[joshua-arch1]

Remove all the space between FPR32/FPR64/FPR16 and the ':' as well as after the ':'

[craig.topper]

LGTM

[craig.topper]

I pre-committed the formatting change as a1786a7224d067ca1a7ccbd721e3dec7f10266dd. I will commit the rest of this with attribution to the patch author in a few minutes.

llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td

 def: PatFprFpr<fminimum, FMINM_S, FPR32>;
 def: PatFprFpr<fmaximum, FMAXM_S, FPR32>;
 
 // frint rounds according to the current rounding mode and detects
 // inexact conditions.
 def: Pat<(any_frint FPR32:$rs1), (FROUNDNX_S FPR32:$rs1, 0b111)>;
 
 // fnearbyint is like frint but does not detect inexact conditions.
 def: Pat<(any_fnearbyint FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b111)>;
 
 def: Pat<(any_fround FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b100)>;
-def: Pat<(any_ffloor FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b011)>;
-def: Pat<(any_fceil FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b010)>;
+def: Pat<(any_ffloor FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b010)>;
+def: Pat<(any_fceil FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b011)>;
 def: Pat<(any_ftrunc FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b001)>;
 
 def: PatSetCC<FPR32, strict_fsetcc, SETLT, FLTQ_S>;
 def: PatSetCC<FPR32, strict_fsetcc, SETOLT, FLTQ_S>;
 def: PatSetCC<FPR32, strict_fsetcc, SETLE, FLEQ_S>;
 def: PatSetCC<FPR32, strict_fsetcc, SETOLE, FLEQ_S>;
 } // Predicates = [HasStdExtZfa]
 
 let Predicates = [HasStdExtZfa, HasStdExtD] in {
 def: PatFprFpr<fminimum, FMINM_D, FPR64>;
 def: PatFprFpr<fmaximum, FMAXM_D, FPR64>;
 
 // frint rounds according to the current rounding mode and detects
 // inexact conditions.
 def: Pat<(any_frint FPR64:$rs1), (FROUNDNX_D FPR64:$rs1, 0b111)>;
 
 // fnearbyint is like frint but does not detect inexact conditions.
 def: Pat<(any_fnearbyint FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b111)>;
 
 def: Pat<(any_fround FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b100)>;
 def: Pat<(any_froundeven FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b000)>;
-def: Pat<(any_ffloor FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b011)>;
-def: Pat<(any_fceil FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b010)>;
+def: Pat<(any_ffloor FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b010)>;
+def: Pat<(any_fceil FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b011)>;
 def: Pat<(any_ftrunc FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b001)>;
 
 def: PatSetCC<FPR64, strict_fsetcc, SETLT, FLTQ_D>;
 def: PatSetCC<FPR64, strict_fsetcc, SETOLT, FLTQ_D>;
 def: PatSetCC<FPR64, strict_fsetcc, SETLE, FLEQ_D>;
 def: PatSetCC<FPR64, strict_fsetcc, SETOLE, FLEQ_D>;
 } // Predicates = [HasStdExtZfa, HasStdExtD]
 
 let Predicates = [HasStdExtZfa, HasStdExtD, IsRV32] in {
 def : Pat<(RISCVBuildPairF64 GPR:$rs1, GPR:$rs2),
           (FMVP_D_X GPR:$rs1, GPR:$rs2)>;
 }
 
 let Predicates = [HasStdExtZfa, HasStdExtZfh] in {
 def: PatFprFpr<fminimum, FMINM_H, FPR16>;
 def: PatFprFpr<fmaximum, FMAXM_H, FPR16>;
 
 // frint rounds according to the current rounding mode and detects
 // inexact conditions.
 def: Pat<(any_frint FPR16:$rs1), (FROUNDNX_H FPR16:$rs1, 0b111)>;
 
 // fnearbyint is like frint but does not detect inexact conditions.
 def: Pat<(any_fnearbyint FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b111)>;
 
 def: Pat<(any_fround FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b100)>;
 def: Pat<(any_froundeven FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b000)>;
-def: Pat<(any_ffloor FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b011)>;
-def: Pat<(any_fceil FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b010)>;
+def: Pat<(any_ffloor FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b010)>;
+def: Pat<(any_fceil FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b011)>;
 def: Pat<(any_ftrunc FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b001)>;
 
 def: PatSetCC<FPR16, strict_fsetcc, SETLT, FLTQ_H>;
 def: PatSetCC<FPR16, strict_fsetcc, SETOLT, FLTQ_H>;
 def: PatSetCC<FPR16, strict_fsetcc, SETLE, FLEQ_H>;
 def: PatSetCC<FPR16, strict_fsetcc, SETOLE, FLEQ_H>;
 } // Predicates = [HasStdExtZfa, HasStdExtZfh]

llvm/test/CodeGen/RISCV/double-zfa.ll

 }
 
 declare double @round(double) nounwind readnone
 
 
 define double @fround_d_2(double %a) nounwind {
 ; CHECK-LABEL: fround_d_2:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    fround.d fa0, fa0, rup
+; CHECK-NEXT:    fround.d fa0, fa0, rdn
 ; CHECK-NEXT:    ret
   %call = tail call double @floor(double %a) nounwind readnone
   ret double %call
 }
 
 declare double @floor(double) nounwind readnone
 
 
 define double @fround_d_3(double %a) nounwind {
 ; CHECK-LABEL: fround_d_3:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    fround.d fa0, fa0, rdn
+; CHECK-NEXT:    fround.d fa0, fa0, rup
 ; CHECK-NEXT:    ret
   %call = tail call double @ceil(double %a) nounwind readnone
   ret double %call
 }
 
 declare double @ceil(double) nounwind readnone
 
 

llvm/test/CodeGen/RISCV/float-zfa.ll

 }
 
 declare float @roundf(float) nounwind readnone
 
 
 define float @fround_s_2(float %a) nounwind {
 ; CHECK-LABEL: fround_s_2:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    fround.s fa0, fa0, rup
+; CHECK-NEXT:    fround.s fa0, fa0, rdn
 ; CHECK-NEXT:    ret
   %call = tail call float @floorf(float %a) nounwind readnone
   ret float %call
 }
 
 declare float @floorf(float) nounwind readnone
 
 
 define float @fround_s_3(float %a) nounwind {
 ; CHECK-LABEL: fround_s_3:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    fround.s fa0, fa0, rdn
+; CHECK-NEXT:    fround.s fa0, fa0, rup
 ; CHECK-NEXT:    ret
   %call = tail call float @ceilf(float %a) nounwind readnone
   ret float %call
 }
 
 declare float @ceilf(float) nounwind readnone
 
 

llvm/test/CodeGen/RISCV/half-zfa.ll

 }
 
 declare half @llvm.round.f16(half) nounwind readnone
 
 
 define half @fround_h_2(half %a) nounwind {
 ; CHECK-LABEL: fround_h_2:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    fround.h fa0, fa0, rup
+; CHECK-NEXT:    fround.h fa0, fa0, rdn
 ; CHECK-NEXT:    ret
   %call = tail call half @llvm.floor.f16(half %a) nounwind readnone
   ret half %call
 }
 
 declare half @llvm.floor.f16(half) nounwind readnone
 
 
 define half @fround_h_3(half %a) nounwind {
 ; CHECK-LABEL: fround_h_3:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    fround.h fa0, fa0, rdn
+; CHECK-NEXT:    fround.h fa0, fa0, rup
 ; CHECK-NEXT:    ret
   %call = tail call half @llvm.ceil.f16(half %a) nounwind readnone
   ret half %call
 }
 
 declare half @llvm.ceil.f16(half) nounwind readnone