[SPIRV] Fix build warnings

[foad]

Summary

Fix these build warnings:

SPIRVBuiltins.cpp:1590:30: warning: 'getPrefTypeAlignment' is deprecated: use getPrefTypeAlign instead [-Wdeprecated-declarations]
SPIRVUtils.cpp:209:3: warning: default label in switch which covers all enumeration values [-Wcovered-switch-default]

[arsenm]

llvm/lib/Target/SPIRV/SPIRVUtils.cpp

211

I think MSVC is unhappy if you don't put an unreachable after a covered switch

llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp

static bool buildEnqueueKernel(const SPIRV::IncomingCall *Call,
   MIB.addUse(BlockLiteralReg);
 
   Type *PType = const_cast<Type *>(getBlockStructType(BlockLiteralReg, MRI));
   // TODO: these numbers should be obtained from block literal structure.
   // Param Size: Size of block literal structure.
   MIB.addUse(buildConstantIntReg(DL.getTypeStoreSize(PType), MIRBuilder, GR));
   // Param Aligment: Aligment of block literal structure.
   MIB.addUse(
-      buildConstantIntReg(DL.getPrefTypeAlignment(PType), MIRBuilder, GR));
+      buildConstantIntReg(DL.getPrefTypeAlign(PType).value(), MIRBuilder, GR));
 
   for (unsigned i = 0; i < LocalSizes.size(); i++)
     MIB.addUse(LocalSizes[i]);
   return true;
 }
 
 static bool generateEnqueueInst(const SPIRV::IncomingCall *Call,
                                 MachineIRBuilder &MIRBuilder,

llvm/lib/Target/SPIRV/SPIRVUtils.cpp

case AtomicOrdering::Release:
     return SPIRV::MemorySemantics::Release;
   case AtomicOrdering::AcquireRelease:
     return SPIRV::MemorySemantics::AcquireRelease;
   case AtomicOrdering::SequentiallyConsistent:
     return SPIRV::MemorySemantics::SequentiallyConsistent;
   case AtomicOrdering::Unordered:
   case AtomicOrdering::Monotonic:
   case AtomicOrdering::NotAtomic:
-  default:
     return SPIRV::MemorySemantics::None;
   }
 }
 
 MachineInstr *getDefInstrMaybeConstant(Register &ConstReg,
                                        const MachineRegisterInfo *MRI) {
   MachineInstr *ConstInstr = MRI->getVRegDef(ConstReg);
   if (ConstInstr->getOpcode() == TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS &&
       ConstInstr->getIntrinsicID() == Intrinsic::spv_track_constant) {
     ConstReg = ConstInstr->getOperand(2).getReg();
     ConstInstr = MRI->getVRegDef(ConstReg);