[lld][ARM][3/3]Complete Arm BE32 big-endian support and add tests

[simpal01]

Summary

Changes:

• Adding test cases for the big-endian arm configuration
• Fixed the bug that the new tests have revealed

[peter.smith]

The title implies that this is just adding tests. Can you update the title to include something like Complete Arm BE32 big-endian support and add tests; or move the SyntheticSections change back to Patch [2/3]

I'll be on holiday for the next 3 weeks. Happy for someone else to review in my absence.

lld/ELF/SyntheticSections.cpp

3543–3544

I think this should be two write32s as the table is made up of two 32-bit values

PREL31 to function	CANT_UNWIND

3552–3553

Same here

lld/test/ELF/arm-exidx-emit-relocs.s

81

The last line is showing the write64 problem with the CANTUNWIND entry. It should be 00000001

[MaskRay]

Tests are included in the same patch as the functional change, not as a separate commit. This may be a difference between llvm-project and GNU as I think lots of large patch series include tests as a separate commit.

lld/test/ELF/arm-header.s

26

No newline at end of file

Ensure a newline for all files.

[M-Plichta]

Thanks for the comments. Hopefully this resolves the problems. Although I'm unsure about the use of read32le in SyntheticSections.cpp

[simpal01]

I am taking over this change from @Milosz-Plichta to move the change forward.

[simpal01]

This revision is now redundant as I have taken all these changes from here to the same patch (https://reviews.llvm.org/D140202) where we are making all the functional changes.

lld/ELF/SyntheticSections.cpp

void ARMExidxSyntheticSection::writeTo(uint8_t *buf) {
 
   const uint8_t cantUnwindData[8] = {0, 0, 0, 0,  // PREL31 to target
                                      1, 0, 0, 0}; // EXIDX_CANTUNWIND
 
   uint64_t offset = 0;
   for (InputSection *isec : executableSections) {
     assert(isec->getParent() != nullptr);
     if (InputSection *d = findExidxSection(isec)) {
-      memcpy(buf + offset, d->content().data(), d->content().size());
+      for (int dataOffset = 0; dataOffset != (int)d->content().size();
+           dataOffset += 4)
+        write32(buf + offset + dataOffset,
+                read32(d->content().data() + dataOffset));
       target->relocateAlloc(*d, buf + d->outSecOff);
       offset += d->getSize();
     } else {
       // A Linker generated CANTUNWIND section.
-      memcpy(buf + offset, cantUnwindData, sizeof(cantUnwindData));
+      write32(buf + offset + 0, read32le(cantUnwindData+0));
+      write32(buf + offset + 4, read32le(cantUnwindData+4));
       uint64_t s = isec->getVA();
       uint64_t p = getVA() + offset;
       target->relocateNoSym(buf + offset, R_ARM_PREL31, s - p);
       offset += 8;
     }
   }
   // Write Sentinel.
-  memcpy(buf + offset, cantUnwindData, sizeof(cantUnwindData));
+  write32(buf + offset + 0, read32le(cantUnwindData+0));
+  write32(buf + offset + 4, read32le(cantUnwindData+4));
   uint64_t s = sentinel->getVA(sentinel->getSize());
   uint64_t p = getVA() + offset;
   target->relocateNoSym(buf + offset, R_ARM_PREL31, s - p);
   assert(size == offset + 8);
 }
 
 bool ARMExidxSyntheticSection::isNeeded() const {
   return llvm::any_of(exidxSections,

lld/ELF/Thunks.cpp

void ThumbThunk::writeTo(uint8_t *buf) {
   if (!getMayUseShortThunk()) {
     writeLong(buf);
     return;
   }
 
   uint64_t s = getARMThunkDestVA(destination);
   uint64_t p = getThunkTargetSym()->getVA();
   int64_t offset = s - p - 4;
-  write32(buf, 0xb000f000); // b.w S
+  write16(buf + 0, 0xf000); // b.w S
+  write16(buf + 2, 0xb000);
   target->relocateNoSym(buf, R_ARM_THM_JUMP24, offset);
 }
 
 bool ThumbThunk::isCompatibleWith(const InputSection &isec,
                                   const Relocation &rel) const {
   // ARM branch relocations can't use BLX
   return rel.type != R_ARM_JUMP24 && rel.type != R_ARM_PC24 && rel.type != R_ARM_PLT32;
 }

lld/test/ELF/arm-data-relocs.s

+// REQUIRES: arm
+// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi -arch=arm %s -o %t.o
+// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi -arch=arm %S/Inputs/abs256.s -o %t256.o
+// RUN: ld.lld %t.o %t256.o -o %t
+// RUN: llvm-objdump -s %t | FileCheck %s --check-prefixes=CHECK,LE
+
+// RUN: llvm-mc -filetype=obj -triple=armv7a-eb-none-linux-gnueabi -arch=armeb %s -o %t.be.o
+// RUN: llvm-mc -filetype=obj -triple=armv7a-eb-none-linux-gnueabi -arch=armeb %S/Inputs/abs256.s -o %t256.be.o
+// RUN: ld.lld --be32 %t.be.o %t256.be.o -o %t.be
+// RUN: llvm-objdump -s %t.be | FileCheck %s --check-prefixes=CHECK,BE
+
+.globl _start
+_start:
+.section .R_ARM_ABS, "ax","progbits"
+  .word foo + 0x24
+
+// CHECK: Contents of section .R_ARM_ABS:
+// LE-NEXT:  200b4 24010000
+// BE-NEXT:  200b4 00000124
+
+.section .R_ARM_PREL, "ax","progbits"
+  .word foo - . + 0x24
+
+// CHECK: Contents of section .R_ARM_PREL:
+// LE-NEXT:  200b8 6c00feff
+// BE-NEXT:  200b8 fffe006c

lld/test/ELF/arm-exidx-emit-relocs.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj --arm-add-build-attributes -triple=armv7a-none-linux-gnueabi %s -o %t
 // RUN: ld.lld --emit-relocs %t -o %t2
 // RUN: llvm-objdump -s --triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s
 // RUN: llvm-readelf --relocs %t2 | FileCheck -check-prefix=CHECK-RELOCS %s
 
+// RUN: llvm-mc -filetype=obj --arm-add-build-attributes -triple=armv7a-eb-none-linux-gnueabi -arch=armeb -mcpu=cortex-a8 %s -o %t
+// RUN: ld.lld --be32 --emit-relocs %t -o %t2
+// RUN: llvm-objdump -s --triple=armv7a-eb-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-EB %s
+// RUN: llvm-readelf --relocs %t2 | FileCheck -check-prefix=CHECK-RELOCS %s
+
 /// LLD does not support --emit-relocs for .ARM.exidx sections as the relocations
 /// from synthetic table entries won't be represented. Given the known use cases
 /// of --emit-relocs, relocating kernels, and binary analysis, the former doesn't
 /// use exceptions and the latter can derive the relocations from the table if
 /// they need them.
  .syntax unified
  /// Will produce an ARM.exidx entry with inline unwinding instructions
  .section .text.func1, "ax",%progbits

  bx lr
 
 // CHECK: Contents of section .ARM.exidx:
 // CHECK-NEXT:  100d4 28000100 08849780 28000100 01000000
 // CHECK-NEXT:  100e4 28000100 08849780 24000100 01000000
 // CHECK-NEXT:  100f4 20000100 01000000
 
 // CHECK-RELOCS-NOT: Relocation section '.rel.ARM.exidx'
+
+// CHECK-EB: Contents of section .ARM.exidx:
+// CHECK-EB-NEXT: 100d4 00010038 80978408 00010034 80978408
+// CHECK-EB-NEXT: 100e4 00010030 00000001 0001002c 00000001
+// CHECK-EB-NEXT: 100f4 00010028 80978408 00010024 00000001
 No newline at end of file

lld/test/ELF/arm-exidx-relocatable.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %S/Inputs/arm-exidx-cantunwind.s -o %tcantunwind
 // Check that relocatable link maintains SHF_LINK_ORDER
 // RUN: ld.lld -r %t %tcantunwind -o %t4
 // RUN: llvm-readobj -S %t4 | FileCheck %s
 
+// RUN: llvm-mc -filetype=obj -triple=armv7a-eb-none-linux-gnueabi -arch=armeb -mcpu=cortex-a8 %s -o %t
+// RUN: llvm-mc -filetype=obj -triple=armv7a-eb-none-linux-gnueabi -arch=armeb -mcpu=cortex-a8 %S/Inputs/arm-exidx-cantunwind.s -o %tcantunwind
+// Check that relocatable link maintains SHF_LINK_ORDER for big endian
+// RUN: ld.lld --be32 -r %t %tcantunwind -o %t4
+// RUN: llvm-readobj -S %t4 | FileCheck %s
+
 // Each assembler created .ARM.exidx section has the SHF_LINK_ORDER flag set
 // with the sh_link containing the section index of the executable section
 // containing the function it describes. To maintain this property in
 // relocatable links we pass through the .ARM.exidx section, the section it
 // it has a sh_link to, and the associated relocation sections uncombined.
 
  .syntax unified
  .section .text, "ax",%progbits

lld/test/ELF/arm-exidx-sentinel-norelocatable.s

 // REQUIRES: arm
 // RUN: llvm-mc %s -triple=armv7-unknown-linux-gnueabi -filetype=obj -o %t.o
 // RUN: ld.lld -r %t.o -o %t
 // RUN: llvm-readobj -S %t | FileCheck %s
+
+// RUN: llvm-mc %s -triple=armv7-eb-unknown-linux-gnueabi -arch=armeb -mcpu=cortex-a8 -filetype=obj -o %t.o
+// RUN: ld.lld --be32 -r %t.o -o %t
+// RUN: llvm-readobj -S %t | FileCheck %s
+
 // Check that when doing a relocatable link we don't add a terminating entry
 // to the .ARM.exidx section
  .syntax unified
  .text
 _start:
  .fnstart
  .cantunwind
  bx lr
  .fnend
 
 // Expect 1 table entry of size 8
 // CHECK: Name: .ARM.exidx
 // CHECK: Size: 8

lld/test/ELF/arm-header.s

+# REQUIRES: arm
+# RUN: llvm-mc -filetype=obj -triple=armv7a-eb-none-linux-gnueabi -arch=armeb -mcpu=cortex-a8 %s -o %t.o
+# RUN: ld.lld --be32 %t.o -o %t1
+# RUN: llvm-readobj -h %t1 | FileCheck %s
+
+# CHECK: Format: elf32-bigarm
+
+# CHECK: ElfHeader {
+# CHECK-NEXT:   Ident {
+# CHECK-NEXT:     Magic: (7F 45 4C 46)
+# CHECK-NEXT:     Class: 32-bit (0x1)
+# CHECK-NEXT:     DataEncoding: BigEndian (0x2)
+# CHECK-NEXT:     FileVersion: 1
+# CHECK-NEXT:     OS/ABI: SystemV (0x0)
+# CHECK-NEXT:     ABIVersion: 0
+# CHECK-NEXT:     Unused: (00 00 00 00 00 00 00)
+# CHECK-NEXT:   }
+
+# CHECK:   Flags [ (0x5000200)
+# CHECK-NEXT:     0x200
+# CHECK-NEXT:     0x1000000
+# CHECK-NEXT:     0x4000000
+# CHECK-NEXT:   ]
+
+# CHECK-NOT: 0x800000

lld/test/ELF/arm-mov-relocs.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=armv7a-unknown-linux-gnueabi %s -o %t
 // RUN: ld.lld %t -o %t2
 // RUN: llvm-objdump --no-print-imm-hex -d %t2 --triple=armv7a-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
 // RUN: llvm-mc -filetype=obj -triple=thumbv7a-unknown-linux-gnueabi %s -o %t3
 // RUN: ld.lld %t3 -o %t4
 // RUN: llvm-objdump --no-print-imm-hex -d %t4 --triple=thumbv7a-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
 
+// RUN: llvm-mc -filetype=obj -triple=armv7a-eb-unknown-linux-gnueabi -arch=armeb -mcpu=cortex-a8 %s -o %t
+// RUN: ld.lld --be32 %t -o %t2
+// RUN: llvm-objdump --no-print-imm-hex -d %t2 --triple=armv7a-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
+// RUN: llvm-mc -filetype=obj -triple=thumbv7a-eb-unknown-linux-gnueabi -arch=thumbeb -mcpu=cortex-a8 %s -o %t3
+// RUN: ld.lld --be32 %t3 -o %t4
+// RUN: llvm-objdump --no-print-imm-hex -d %t4 --triple=thumbv7a-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
+
 /// Test the following relocation pairs:
 ///  * R_ARM_MOVW_ABS_NC and R_ARM_MOVT_ABS
 ///  * R_ARM_MOVW_PREL_NC and R_ARM_MOVT_PREL
 ///  * R_ARM_MOVW_BREL_NC and R_ARM_MOVT_BREL
 ///
 ///  * R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_ABS
 ///  * R_ARM_THM_MOVW_PREL_NC and R_ARM_THM_MOVT_PREL
 ///  * R_ARM_THM_MOVW_BREL_NC and R_ARM_THM_MOVT_BREL

lld/test/ELF/arm-plt-reloc.s

 // DSORELMIX-NEXT:       SHF_ALLOC
 // DSORELMIX-NEXT:       SHF_WRITE
 // DSORELMIX-NEXT:     ]
 // DSORELMIX-NEXT:     Address: 0x8002020
 // DSORELMIX:   Section {{.*}} .rel.plt {
 // DSORELMIX-NEXT:     0x800202C R_ARM_JUMP_SLOT func1
 // DSORELMIX-NEXT:     0x8002030 R_ARM_JUMP_SLOT func2
 // DSORELMIX-NEXT:     0x8002034 R_ARM_JUMP_SLOT func3
+
+// RUN: llvm-mc -filetype=obj -triple=armv7a-eb-none-linux-gnueabi -arch=armeb -mcpu=cortex-a8 %p/Inputs/arm-plt-reloc.s -o %t1
+// RUN: llvm-mc -filetype=obj -triple=armv7a-eb-none-linux-gnueabi -arch=armeb -mcpu=cortex-a8 %s -o %t2
+// RUN: ld.lld --be32 %t1 %t2 -o %t
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7a-be-none-linux-gnueabi -d --no-show-raw-insn %t | FileCheck %s
+// RUN: ld.lld --be32 -shared %t1 %t2 -o %t3
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7a-be-none-linux-gnueabi -d --no-show-raw-insn %t3 | FileCheck --check-prefix=DSO %s
+// RUN: llvm-readobj -S -r %t3 | FileCheck -check-prefix=DSOREL %s
+
+// RUN: ld.lld --be32 --hash-style=sysv --script %t2.script -shared %t1 %t2 -o %t5
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7a-none-linux-gnueabi -d --no-show-raw-insn %t5 | FileCheck --check-prefix=CHECKLONG-EB %s
+// RUN: llvm-readobj -S -r %t5 | FileCheck --check-prefix=DSORELLONG %s
+
+// CHECKLONG-EB: Disassembly of section .text:
+// CHECKLONG-EB-EMPTY:
+// CHECKLONG-EB-NEXT: <func1>:
+// CHECKLONG-EB-NEXT:     1000:       bx      lr
+// CHECKLONG-EB: <func2>:
+// CHECKLONG-EB-NEXT:     1004:       bx      lr
+// CHECKLONG-EB: <func3>:
+// CHECKLONG-EB-NEXT:     1008:       bx      lr
+// CHECKLONG-EB: <_start>:
+// CHECKLONG-EB-NEXT:     100c:       b       0x2020
+// CHECKLONG-EB-NEXT:     1010:       bl      0x2030
+// CHECKLONG-EB-NEXT:     1014:       beq     0x2040
+// CHECKLONG-EB-EMPTY:
+// CHECKLONG-EB-NEXT: Disassembly of section .plt:
+// CHECKLONG-EB-EMPTY:
+// CHECKLONG-EB-NEXT: <$a>:
+// CHECKLONG-EB-NEXT:     2000:       str     lr, [sp, #-4]!
+// CHECKLONG-EB-NEXT:     2004:       ldr     lr, [pc, #4]
+// CHECKLONG-EB-NEXT:     2008:       add     lr, pc, lr
+// CHECKLONG-EB-NEXT:     200c:       ldr     pc, [lr, #8]!
+// CHECKLONG-EB: <$d>:
+// CHECKLONG-EB-NEXT:     2010:       11 10 f0 f0     .word   0x1110f0f0
+// CHECKLONG-EB-NEXT:     2014:       d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECKLONG-EB-NEXT:     2018:       d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECKLONG-EB-NEXT:     201c:       d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECKLONG-EB: <$a>:
+// CHECKLONG-EB-NEXT:     2020:       ldr     r12, [pc, #4]
+// CHECKLONG-EB-NEXT:     2024:       add     r12, r12, pc
+// CHECKLONG-EB-NEXT:     2028:       ldr     pc, [r12]
+// CHECKLONG-EB: <$d>:
+// CHECKLONG-EB-NEXT:     202c:       11 10 f0 e0     .word   0x1110f0e0
+// CHECKLONG-EB: <$a>:
+// CHECKLONG-EB-NEXT:     2030:       ldr     r12, [pc, #4]
+// CHECKLONG-EB-NEXT:     2034:       add     r12, r12, pc
+// CHECKLONG-EB-NEXT:     2038:       ldr     pc, [r12]
+// CHECKLONG-EB: <$d>:
+// CHECKLONG-EB-NEXT:     203c:       11 10 f0 d4     .word 0x1110f0d4
+// CHECKLONG-EB: <$a>:
+// CHECKLONG-EB-NEXT:     2040:       ldr     r12, [pc, #4]
+// CHECKLONG-EB-NEXT:     2044:       add     r12, r12, pc
+// CHECKLONG-EB-NEXT:     2048:       ldr     pc, [r12]
+// CHECKLONG-EB: <$d>:
+// CHECKLONG-EB-NEXT:     204c:       11 10 f0 c8     .word   0x1110f0c8

lld/test/ELF/arm-thumb-plt-reloc.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %p/Inputs/arm-plt-reloc.s -o %t1
 // RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t2
 // RUN: ld.lld %t1 %t2 -o %t
 // RUN: llvm-objdump --no-print-imm-hex --triple=thumbv7a-none-linux-gnueabi -d %t | FileCheck %s
 // RUN: ld.lld -shared %t1 %t2 -o %t.so
 // RUN: llvm-objdump --no-print-imm-hex --triple=thumbv7a-none-linux-gnueabi -d %t.so | FileCheck --check-prefix=DSO %s
 // RUN: llvm-readobj -S -r %t.so | FileCheck -check-prefix=DSOREL %s
-//
+
+// RUN: llvm-mc -filetype=obj -triple=thumbv7a-eb-none-linux-gnueabi %p/Inputs/arm-plt-reloc.s -o %t1
+// RUN: llvm-mc -filetype=obj -triple=thumbv7a-eb-none-linux-gnueabi %s -o %t2
+// RUN: ld.lld --be32 %t1 %t2 -o %t
+// RUN: llvm-objdump --no-print-imm-hex --triple=thumbv7a-eb-none-linux-gnueabi -d %t | FileCheck %s
+// RUN: ld.lld --be32 -shared %t1 %t2 -o %t.so
+// RUN: llvm-objdump --no-print-imm-hex --triple=thumbv7a-eb-none-linux-gnueabi -d %t.so | FileCheck --check-prefix=DSO %s
+// RUN: llvm-readobj -S -r %t.so | FileCheck -check-prefix=DSOREL %s
+
 // Test PLT entry generation
  .syntax unified
  .text
  .align 2
  .globl _start
  .type  _start,%function
 _start:
 // FIXME, interworking is only supported for BL via BLX at the moment, when

lld/test/ELF/arm-thunk-arm-thumb-reuse.s

 // REQUIRES: arm
 // RUN: split-file %s %t
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %t/test.s -o %t.o
 // RUN: ld.lld --script %t/script %t.o -o %t2
 // RUN: llvm-objdump --no-print-imm-hex --no-show-raw-insn -d %t2 | FileCheck %s
 
+// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-eb-none-linux-gnueabi -arch=armeb -mcpu=cortex-a8 %t/test.s -o %t.o
+// RUN: ld.lld --be32 --script %t/script %t.o -o %t2
+// RUN: llvm-objdump --no-print-imm-hex --no-show-raw-insn -d %t2 | FileCheck %s
+
 /// Test that we can reuse thunks between Arm and Thumb callers
 /// using a BL. Expect two thunks, one for far, one for far2.
 
 //--- script
 SECTIONS {
         .text 0x10000 : { *(.text) }
         .text.far 0x10000000 : AT (0x10000000) { *(.far) }
 }

lld/test/ELF/arm-thunk-edgecase.s

 // REQUIRES: arm
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t.o
 // RUN: echo "SECTIONS { \
 // RUN:           .text_armfunc 0x1000 : { *(.text_armfunc) } \
 // RUN:           .text_thumbfunc 0x11010 : { *(.text_thumbfunc) } \
 // RUN:       }" > %tarm_to_thumb.script
 // RUN: echo "SECTIONS { \
 // RUN:           .text_thumbfunc 0x1000 : { *(.text_thumbfunc) } \
 // RUN:           .text_armfunc 0x1100c : { *(.text_armfunc) } \
 // RUN:       }" > %tthumb_to_arm.script
 // RUN: ld.lld -shared -Bsymbolic -script %tarm_to_thumb.script %t.o -o %tarm_to_thumb.so
 // RUN: ld.lld -shared -Bsymbolic -script %tthumb_to_arm.script %t.o -o %tthumb_to_arm.so
 // RUN: llvm-objdump --no-print-imm-hex --triple=armv7a-none-linux-gnueabi -d %tarm_to_thumb.so | FileCheck --check-prefix=ARM-TO-THUMB %s
 // RUN: llvm-objdump --no-print-imm-hex -d %tthumb_to_arm.so | FileCheck --check-prefix=THUMB-TO-ARM %s
 
+// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-eb-none-linux-gnueabi -arch=armeb -mcpu=cortex-a8 %s -o %t.o
+// RUN: ld.lld --be32 -shared -Bsymbolic -script %tarm_to_thumb.script %t.o -o %tarm_to_thumb.so
+// RUN: ld.lld --be32 -shared -Bsymbolic -script %tthumb_to_arm.script %t.o -o %tthumb_to_arm.so
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7a-eb-none-linux-gnueabi -d %tarm_to_thumb.so | FileCheck --check-prefix=ARM-TO-THUMB %s
+// RUN: llvm-objdump --no-print-imm-hex -d %tthumb_to_arm.so | FileCheck --check-prefix=THUMB-TO-ARM %s
+
 .syntax unified
 
 .arm
 .section .text_armfunc, "ax", %progbits
 .globl armfunc
 .type armfunc, %function
 armfunc:
   b thumbfunc

lld/test/ELF/arm-thunk-largesection.s

 // REQUIRES: arm
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
 // RUN: ld.lld %t -o %t2
 // RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x21000 --stop-address=0x21006 %t2 | FileCheck --check-prefix=CHECK1 %s
 // RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x22004 --stop-address=0x22008 %t2 | FileCheck --check-prefix=CHECK2 %s
 // RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x1021ff8 --stop-address=0x1021ffc %t2 | FileCheck --check-prefix=CHECK3 %s
 // RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x2012ff8 --stop-address=0x2021ffc %t2 | FileCheck --check-prefix=CHECK4 %s
 // RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x3021fec --stop-address=0x3021ff6 %t2 | FileCheck --check-prefix=CHECK5 %s
+
+// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-eb-none-linux-gnueabi -arch=thumbeb -mcpu=cortex-a8 %s -o %t
+// RUN: ld.lld --be32 %t -o %t2
+// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x21000 --stop-address=0x21006 %t2 | FileCheck --check-prefix=CHECK1 %s
+// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x22004 --stop-address=0x22008 %t2 | FileCheck --check-prefix=CHECK2 %s
+// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x1021ff8 --stop-address=0x1021ffc %t2 | FileCheck --check-prefix=CHECK3 %s
+// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x2012ff8 --stop-address=0x2021ffc %t2 | FileCheck --check-prefix=CHECK4 %s
+// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x3021fec --stop-address=0x3021ff6 %t2 | FileCheck --check-prefix=CHECK5 %s
+
  .syntax unified
  .balign 0x1000
  .thumb
  .text
  .globl _start
  .type _start, %function
 _start:
  bx lr

lld/test/ELF/arm-thunk-linkerscript-dotexpr.s

 // REQUIRES: arm
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
 // RUN: echo "SECTIONS { \
 // RUN:       . = SIZEOF_HEADERS; \
 // RUN:       .text_low : { *(.text_low) *(.text_low2) . = . + 0x2000000 ; *(.text_high) *(.text_high2) } \
 // RUN:       } " > %t.script
 // RUN: ld.lld --no-rosegment --script %t.script %t -o %t2
 // RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x94 --stop-address=0xbc | FileCheck --check-prefix=CHECK1 %s
 // RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x20000bc --stop-address=0x20000de | FileCheck --check-prefix=CHECK2 %s
+
+// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-eb-none-linux-gnueabi -arch=armeb -mcpu=cortex-a8 %s -o %t
+// RUN: ld.lld --be32 --no-rosegment --script %t.script %t -o %t2
+// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x94 --stop-address=0xbc | FileCheck --check-prefix=CHECK1 %s
+// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x20000bc --stop-address=0x20000de | FileCheck --check-prefix=CHECK2 %s
+
 // Test that range extension thunks can handle location expressions within
 // a Section Description
  .syntax unified
  .section .text_low, "ax", %progbits
  .thumb
  .globl _start
 _start: bx lr
  .globl low_target

lld/test/ELF/arm-thunk-linkerscript.s

 // REQUIRES: arm
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
 // RUN: echo "SECTIONS { \
 // RUN:       . = SIZEOF_HEADERS; \
 // RUN:       .text_low : { *(.text_low) *(.text_low2) } \
 // RUN:       .text_high 0x2000000 : { *(.text_high) *(.text_high2) } \
 // RUN:       } " > %t.script
 // RUN: ld.lld --no-rosegment --script %t.script %t -o %t2
 // RUN: llvm-objdump --no-print-imm-hex -d %t2 | FileCheck %s
+
+// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-eb-none-linux-gnueabi -arch=armeb -mcpu=cortex-a8 %s -o %t
+// RUN: ld.lld --be32 --no-rosegment --script %t.script %t -o %t2
+// RUN: llvm-objdump --no-print-imm-hex -d %t2 | FileCheck %s
+
 // Simple test that we can support range extension thunks with linker scripts
  .syntax unified
  .section .text_low, "ax", %progbits
  .thumb
  .globl _start
 _start: bx lr
  .globl low_target
  .type low_target, %function

lld/test/ELF/arm-thunk-nosuitable.s

 // REQUIRES: arm
 // RUN: llvm-mc %s --arm-add-build-attributes --triple=armv7a-linux-gnueabihf --filetype=obj -o %t.o
 // RUN: ld.lld %t.o -o %t
 // RUN: llvm-objdump -d --start-address=0x2200b4 --stop-address=0x2200be %t | FileCheck %s
 
+// RUN: llvm-mc %s --arm-add-build-attributes --triple=armv7a-eb-linux-gnueabihf --filetype=obj -arch=armeb -mcpu=cortex-a8 -o %t.o
+// RUN: ld.lld --be32 %t.o -o %t
+// RUN: llvm-objdump -d --start-address=0x2200b4 --stop-address=0x2200be %t | FileCheck %s
+
         /// Create a conditional branch too far away from a precreated thunk
         /// section. This will need a thunk section created within range.
         .syntax unified
         .thumb
 
         .section .text.0, "ax", %progbits
         .space 2 * 1024 * 1024
         .globl _start

lld/test/ELF/arm-thunk-re-add.s

 // CHECK3: <$d>:
 // CHECK3-NEXT:  110004c:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECK3: <$a>:
 // CHECK3-NEXT:  1100050:       e28fc600        add     r12, pc, #0, #12
 // CHECK3-NEXT:  1100054:       e28cca20        add     r12, r12, #32
 // CHECK3-NEXT:  1100058:       e5bcf070        ldr     pc, [r12, #112]!
 // CHECK3: <$d>:
 // CHECK3-NEXT:  110005c:       d4 d4 d4 d4     .word   0xd4d4d4d4
+
+// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-eb-none-linux-gnueabi -arch=thumbeb -mcpu=cortex-a8 %s -o %t
+// RUN: ld.lld --be32 %t --shared -o %t.so
+// The output file is large, most of it zeroes. We dissassemble only the
+// parts we need to speed up the test and avoid a large output file
+// RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x1000004 --stop-address=0x100001c | FileCheck --check-prefix=CHECK1 %s
+// RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x1100008 --stop-address=0x1100022 | FileCheck --check-prefix=CHECK2 %s
+// RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x1100020 --stop-address=0x1100064 --triple=armv7a-eb-linux-gnueabihf | FileCheck --check-prefix=CHECK3 %s
 No newline at end of file

lld/test/ELF/arm-thunk-reuse.s

 # REQUIRES: arm
 # RUN: rm -rf %t && split-file %s %t
 # RUN: llvm-mc -filetype=obj -triple=armv7-a-none-eabi --arm-add-build-attributes %t/a.s -o %t/a.o
 # RUN: ld.lld -pie -T %t/lds %t/a.o -o %t/a
 # RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn %t/a | FileCheck %s
 
+# RUN: llvm-mc -filetype=obj -triple=armv7-eb-a-none-eabi --arm-add-build-attributes -arch=armeb -mcpu=cortex-a8 %t/a.s -o %t/a.o
+# RUN: ld.lld --be32 -pie -T %t/lds %t/a.o -o %t/a
+# RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn %t/a | FileCheck %s
+
 ## We create a thunk for dest.
 # CHECK-LABEL: <mid>:
 # CHECK-NEXT:   2010004:     b       0x2010008 <__ARMV7PILongThunk_dest>
 # CHECK-EMPTY:
 # CHECK-NEXT:  <__ARMV7PILongThunk_dest>:
 # CHECK-NEXT:   2010008:     movw    r12, #65516
 # CHECK-NEXT:                movt    r12, #65023
 # CHECK-NEXT:                add     r12, r12, pc

lld/test/ELF/arm-thunk-section-too-large.s

 // REQUIRES: arm
 // RUN: llvm-mc %s -triple=armv7a-linux-gnueabihf -arm-add-build-attributes -filetype=obj -o %t.o
 // RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s
 
+// RUN: llvm-mc %s -triple=armv7a-eb-linux-gnueabihf -arm-add-build-attributes -filetype=obj -arch=armeb -mcpu=cortex-a8 -o %t.o
+// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s
+
 // CHECK: InputSection too large for range extension thunk
         .syntax unified
         .thumb
         .text
         .globl _start
         .type _start, %function
 _start:
         .space 2 * 1024 * 1024

lld/test/ELF/arm-thunk-toolargesection.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
 // RUN: not ld.lld %t -o /dev/null 2>&1 | FileCheck %s
+
+// RUN: llvm-mc -filetype=obj -triple=thumbv7a-eb-none-linux-gnueabi -arch=thumbeb %s -o %t
+// RUN: not ld.lld --be32 %t -o /dev/null 2>&1 | FileCheck %s
+
  .syntax unified
  .balign 0x1000
  .thumb
  .text
  .globl _start
  .type _start, %function
 _start:
  bx lr
 
  .section .text.large1, "ax", %progbits
  .balign 4
 .space (17 * 1024 * 1024)
  bl _start
 .space (17 * 1024 * 1024)
 
 // CHECK: error: InputSection too large for range extension thunk {{.*}}.text.large1

lld/test/ELF/arm-v5-reloc-error.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabi %s -o %t
 // RUN: echo "SECTIONS { \
 // RUN:       . = SIZEOF_HEADERS; \
 // RUN:       .text_low : { *(.text_low) *(.text_low2) } \
 // RUN:       .text_high 0x2000000 : { *(.text_high) *(.text_high2) } \
 // RUN:       } " > %t.script
 // RUN: not ld.lld --script %t.script %t -o /dev/null 2>&1 | FileCheck %s
 
+// RUN: llvm-mc -filetype=obj -triple=armv7a-eb-linux-gnueabi -arch=armeb -mcpu=cortex-a8 %s -o %t
+// RUN: not ld.lld --be32 --script %t.script %t -o /dev/null 2>&1 | FileCheck %s
+
 // CHECK: error: relocation R_ARM_THM_JUMP24 to far not supported for Armv5 or Armv6 targets
 
 // Lie about our build attributes. Our triple is armv7a-linux-gnueabi but
 // we are claiming to be Armv5. This can also happen with llvm-mc when we
 // don't have any .eabi_attribute directives in the file or the
 // --arm-add-build-attributes command line isn't used to add them from the
 // triple.
  .eabi_attribute 6, 5           // Tag_cpu_arch 5 = v5TEJ

lld/test/ELF/emulation-arm.s

 # ARM-NEXT:     OS/ABI: SystemV (0x0)
 # ARM-NEXT:     ABIVersion: 0
 # ARM-NEXT:     Unused: (00 00 00 00 00 00 00)
 # ARM-NEXT:   }
 # ARM-NEXT:   Type: Executable (0x2)
 # ARM-NEXT:   Machine: EM_ARM (0x28)
 # ARM-NEXT:   Version: 1
 
+# RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-eb-none-linux-gnueabi -arch=armeb %s -o %t.o
+# RUN: ld.lld --be32 -marmelfb_linux_eabi %t.o -o %t1
+# echo 'OUTPUT_FORMAT(elf32-bigarm)' > %t6arm.script
+# ld.lld %tarm -o %t6arm
+# RUN: llvm-readobj -h %t1 | FileCheck %s --check-prefix=ARMEB
+# RUN: llvm-readobj -h %t1 | FileCheck %s --check-prefix=BE8
+
+# ARMEB: ElfHeader {
+# ARMEB-NEXT:   Ident {
+# ARMEB-NEXT:     Magic: (7F 45 4C 46)
+# ARMEB-NEXT:     Class: 32-bit (0x1)
+# ARMEB-NEXT:     DataEncoding: BigEndian (0x2)
+# ARMEB-NEXT:     FileVersion: 1
+# ARMEB-NEXT:     OS/ABI: SystemV (0x0)
+# ARMEB-NEXT:     ABIVersion: 0
+# ARMEB-NEXT:     Unused: (00 00 00 00 00 00 00)
+# ARMEB-NEXT:   }
+# ARMEB-NEXT:   Type: Executable (0x2)
+# ARMEB-NEXT:   Machine: EM_ARM (0x28)
+# ARMEB-NEXT:   Version: 1
+
+## Ensure that the EF_ARM_BE8 flag is not set for be32
+## This will have to be modified on the be8 is implemented
+# ARMEB:   Flags [ (0x5000200)
+# ARMEB-NEXT:     0x200
+# ARMEB-NEXT:     0x1000000
+# ARMEB-NEXT:     0x4000000
+# ARMEB-NEXT:   ]
+
+# BE8-NOT: 0x800000
+
 .globl _start
 _start: