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[LLDB][RISCV] Add RV32FC instruction support for EmulateInstructionRISCV
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Authored by Emmmer on Dec 5 2022, 9:18 PM.

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Emmmer created this revision.Dec 5 2022, 9:18 PM
Herald added a project: Restricted Project. · View Herald TranscriptDec 5 2022, 9:18 PM
Emmmer requested review of this revision.Dec 5 2022, 9:18 PM
DavidSpickett added inline comments.Dec 6 2022, 1:05 AM
lldb/source/Plugins/Instruction/RISCV/RISCVInstructions.h
252

I assume this means whether we're 64 bit or 32 bit only? I'd prefer an enum that encodes the choices rather than a number if so.

Or an bool 64_bit_only if that makes more sense in context.

Emmmer updated this revision to Diff 480430.Dec 6 2022, 4:27 AM

address review comments.

How do the RV32/RV64 instructions split? Is it the case that the majority are one or the other, or that the majority are both and only a few will be 32 or 64 specific?

I expected to see a "both" in the enum or something saying "RV64 can be either", maybe I just missed it.

Emmmer updated this revision to Diff 480452.Dec 6 2022, 5:59 AM

I think this will be helpful.

DavidSpickett accepted this revision.Dec 6 2022, 6:15 AM

Yes that's much clearer. LGTM.

This revision is now accepted and ready to land.Dec 6 2022, 6:15 AM