[SPIR-V] Use llvm::Optional for builtin lowering result.

[zuban32]

Summary

Replace result type std::pair<bool, bool> of lowerBuiltin with
a nice and convenient Optional<bool>.

[iliya-diyachkov]

@zuban32, perhaps it's better to use llvm::Optional from llvm/ADT/Optional.h (see https://github.com/KhronosGroup/LLVM-SPIRV-Backend/pull/217/files). It's widely used in llvm. On other hand, std::optional is not used at all in llvm/lib (as I see in llvm15).

llvm/lib/Target/SPIRV/SPIRVBuiltins.h

24–25

We need to correct the description too, e.g.

/// \return A boolean value indicating the successful lowering, if the callee
/// is recognized as a builtin function.

[zuban32]

• Address comments

[iliya-diyachkov]

It looks good to me.

[zuban32]

• clang-format

llvm/lib/Target/SPIRV/SPIRVBuiltins.h

 #include "SPIRVGlobalRegistry.h"
 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
 
 namespace llvm {
 namespace SPIRV {
 /// Lowers a builtin funtion call using the provided \p DemangledCall skeleton
 /// and external instruction \p Set.
 ///
-/// \return a pair of boolean values, the first true means the call recognized
-/// as a builtin, the second one indicates the successful lowering.
+/// \return the lowering success status if the called function is a recognized
+/// builtin, None otherwise.
 ///
 /// \p DemangledCall is the skeleton of the lowered builtin function call.
 /// \p Set is the external instruction set containing the given builtin.
 /// \p OrigRet is the single original virtual return register if defined,
 /// Register(0) otherwise. \p OrigRetTy is the type of the \p OrigRet. \p Args
 /// are the arguments of the lowered builtin call.
-std::pair<bool, bool>
-lowerBuiltin(const StringRef DemangledCall, InstructionSet::InstructionSet Set,
-             MachineIRBuilder &MIRBuilder, const Register OrigRet,
-             const Type *OrigRetTy, const SmallVectorImpl<Register> &Args,
+Optional<bool> lowerBuiltin(const StringRef DemangledCall,
+                            InstructionSet::InstructionSet Set,
+                            MachineIRBuilder &MIRBuilder,
+                            const Register OrigRet, const Type *OrigRetTy,
+                            const SmallVectorImpl<Register> &Args,
                             SPIRVGlobalRegistry *GR);
 } // namespace SPIRV
 } // namespace llvm
 #endif // LLVM_LIB_TARGET_SPIRV_SPIRVBUILTINS_H

llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp

static bool generateVectorLoadStoreInst(const SPIRV::IncomingCall *Call,
   if (Builtin->IsRounded)
     MIB.addImm(static_cast<uint32_t>(Builtin->RoundingMode));
   return true;
 }
 
 /// Lowers a builtin funtion call using the provided \p DemangledCall skeleton
 /// and external instruction \p Set.
 namespace SPIRV {
-std::pair<bool, bool>
-lowerBuiltin(const StringRef DemangledCall, InstructionSet::InstructionSet Set,
-             MachineIRBuilder &MIRBuilder, const Register OrigRet,
-             const Type *OrigRetTy, const SmallVectorImpl<Register> &Args,
+Optional<bool> lowerBuiltin(const StringRef DemangledCall,
+                            SPIRV::InstructionSet::InstructionSet Set,
+                            MachineIRBuilder &MIRBuilder,
+                            const Register OrigRet, const Type *OrigRetTy,
+                            const SmallVectorImpl<Register> &Args,
                             SPIRVGlobalRegistry *GR) {
   LLVM_DEBUG(dbgs() << "Lowering builtin call: " << DemangledCall << "\n");
 
   // SPIR-V type and return register.
   Register ReturnRegister = OrigRet;
   SPIRVType *ReturnType = nullptr;
   if (OrigRetTy && !OrigRetTy->isVoidTy()) {
     ReturnType = GR->assignTypeToVReg(OrigRetTy, OrigRet, MIRBuilder);
   } else if (OrigRetTy && OrigRetTy->isVoidTy()) {
     ReturnRegister = MIRBuilder.getMRI()->createVirtualRegister(&IDRegClass);
     MIRBuilder.getMRI()->setType(ReturnRegister, LLT::scalar(32));
     ReturnType = GR->assignTypeToVReg(OrigRetTy, ReturnRegister, MIRBuilder);
   }
 
   // Lookup the builtin in the TableGen records.
   std::unique_ptr<const IncomingCall> Call =
       lookupBuiltin(DemangledCall, Set, ReturnRegister, ReturnType, Args);
 
   if (!Call) {
     LLVM_DEBUG(dbgs() << "Builtin record was not found!");
-    return {false, false};
+    return {};
   }
 
   // TODO: check if the provided args meet the builtin requirments.
   assert(Args.size() >= Call->Builtin->MinNumArgs &&
          "Too few arguments to generate the builtin");
   if (Call->Builtin->MaxNumArgs && Args.size() <= Call->Builtin->MaxNumArgs)
     LLVM_DEBUG(dbgs() << "More arguments provided than required!");
 
   // Match the builtin with implementation based on the grouping.
   switch (Call->Builtin->Group) {
   case SPIRV::Extended:
-    return {true, generateExtInst(Call.get(), MIRBuilder, GR)};
+    return generateExtInst(Call.get(), MIRBuilder, GR);
   case SPIRV::Relational:
-    return {true, generateRelationalInst(Call.get(), MIRBuilder, GR)};
+    return generateRelationalInst(Call.get(), MIRBuilder, GR);
   case SPIRV::Group:
-    return {true, generateGroupInst(Call.get(), MIRBuilder, GR)};
+    return generateGroupInst(Call.get(), MIRBuilder, GR);
   case SPIRV::Variable:
-    return {true, generateBuiltinVar(Call.get(), MIRBuilder, GR)};
+    return generateBuiltinVar(Call.get(), MIRBuilder, GR);
   case SPIRV::Atomic:
-    return {true, generateAtomicInst(Call.get(), MIRBuilder, GR)};
+    return generateAtomicInst(Call.get(), MIRBuilder, GR);
   case SPIRV::Barrier:
-    return {true, generateBarrierInst(Call.get(), MIRBuilder, GR)};
+    return generateBarrierInst(Call.get(), MIRBuilder, GR);
   case SPIRV::Dot:
-    return {true, generateDotOrFMulInst(Call.get(), MIRBuilder, GR)};
+    return generateDotOrFMulInst(Call.get(), MIRBuilder, GR);
   case SPIRV::GetQuery:
-    return {true, generateGetQueryInst(Call.get(), MIRBuilder, GR)};
+    return generateGetQueryInst(Call.get(), MIRBuilder, GR);
   case SPIRV::ImageSizeQuery:
-    return {true, generateImageSizeQueryInst(Call.get(), MIRBuilder, GR)};
+    return generateImageSizeQueryInst(Call.get(), MIRBuilder, GR);
   case SPIRV::ImageMiscQuery:
-    return {true, generateImageMiscQueryInst(Call.get(), MIRBuilder, GR)};
+    return generateImageMiscQueryInst(Call.get(), MIRBuilder, GR);
   case SPIRV::ReadImage:
-    return {true,
-            generateReadImageInst(DemangledCall, Call.get(), MIRBuilder, GR)};
+    return generateReadImageInst(DemangledCall, Call.get(), MIRBuilder, GR);
   case SPIRV::WriteImage:
-    return {true, generateWriteImageInst(Call.get(), MIRBuilder, GR)};
+    return generateWriteImageInst(Call.get(), MIRBuilder, GR);
   case SPIRV::SampleImage:
-    return {true,
-            generateSampleImageInst(DemangledCall, Call.get(), MIRBuilder, GR)};
+    return generateSampleImageInst(DemangledCall, Call.get(), MIRBuilder, GR);
   case SPIRV::Select:
-    return {true, generateSelectInst(Call.get(), MIRBuilder)};
+    return generateSelectInst(Call.get(), MIRBuilder);
   case SPIRV::SpecConstant:
-    return {true, generateSpecConstantInst(Call.get(), MIRBuilder, GR)};
+    return generateSpecConstantInst(Call.get(), MIRBuilder, GR);
   case SPIRV::Enqueue:
-    return {true, generateEnqueueInst(Call.get(), MIRBuilder, GR)};
+    return generateEnqueueInst(Call.get(), MIRBuilder, GR);
   case SPIRV::AsyncCopy:
-    return {true, generateAsyncCopy(Call.get(), MIRBuilder, GR)};
+    return generateAsyncCopy(Call.get(), MIRBuilder, GR);
   case SPIRV::Convert:
-    return {true,
-            generateConvertInst(DemangledCall, Call.get(), MIRBuilder, GR)};
+    return generateConvertInst(DemangledCall, Call.get(), MIRBuilder, GR);
   case SPIRV::VectorLoadStore:
-    return {true, generateVectorLoadStoreInst(Call.get(), MIRBuilder, GR)};
+    return generateVectorLoadStoreInst(Call.get(), MIRBuilder, GR);
   }
-  return {true, false};
+  return false;
 }
 } // namespace SPIRV
 } // namespace llvm

llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp

if (FTy)
       OrigRetTy = FTy->getReturnType();
     SmallVector<Register, 8> ArgVRegs;
     for (auto Arg : Info.OrigArgs) {
       assert(Arg.Regs.size() == 1 && "Call arg has multiple VRegs");
       ArgVRegs.push_back(Arg.Regs[0]);
       SPIRVType *SPIRVTy = GR->getOrCreateSPIRVType(Arg.Ty, MIRBuilder);
       GR->assignSPIRVTypeToVReg(SPIRVTy, Arg.Regs[0], MIRBuilder.getMF());
     }
-    auto Res =
-        SPIRV::lowerBuiltin(DemangledName, SPIRV::InstructionSet::OpenCL_std,
-                            MIRBuilder, ResVReg, OrigRetTy, ArgVRegs, GR);
-    if (Res.first)
-      return Res.second;
+    if (auto Res = SPIRV::lowerBuiltin(
+            DemangledName, SPIRV::InstructionSet::OpenCL_std, MIRBuilder,
+            ResVReg, OrigRetTy, ArgVRegs, GR))
+      return *Res;
   }
   if (CF && CF->isDeclaration() &&
       !GR->find(CF, &MIRBuilder.getMF()).isValid()) {
     // Emit the type info and forward function declaration to the first MBB
     // to ensure VReg definition dependencies are valid across all MBBs.
     MachineIRBuilder FirstBlockBuilder;
     FirstBlockBuilder.setMF(MF);
     FirstBlockBuilder.setMBB(*MF.getBlockNumbered(0));