[instcombine] Optimise for zero initialisation of integer product

[zjaffal]

Summary

Similar to the work on D131672 we optimise integer product if the accumlator value of a loop is initalised to zero

[fhahn]

LGTM, thanks!

[zjaffal]

edit file name

[spatel]

Note that "-ipsccp" already simplifies this example:
https://alive2.llvm.org/ce/z/WRqr2s

So I'm not sure if there's any practical benefit. It makes instcombine more uniform, so I don't object. We might also go in the other direction, but I don't know what it would take to make sccp FP-aware.

llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp

if (!I.hasNoSignedWrap() && willNotOverflowSignedMul(Op0, Op1, I)) {
     I.setHasNoSignedWrap(true);
   }
 
   if (!I.hasNoUnsignedWrap() && willNotOverflowUnsignedMul(Op0, Op1, I)) {
     Changed = true;
     I.setHasNoUnsignedWrap(true);
   }
 
+  // Optimise loop multiplication when the inital accumulator value is zero.
+  // When we have a PHINode initalised to zero and we repeatedly multiply it
+  // with array elements we can remove the loop.
+  PHINode *PN = nullptr;
+  Value *Start = nullptr, *Step = nullptr;
+  if (matchSimpleRecurrence(&I, PN, Start, Step) && match(Start, m_Zero()))
+    return replaceInstUsesWith(I, Start);
+
   return Changed ? &I : nullptr;
 }
 
 Instruction *InstCombinerImpl::foldFPSignBitOps(BinaryOperator &I) {
   BinaryOperator::BinaryOps Opcode = I.getOpcode();
   assert((Opcode == Instruction::FMul || Opcode == Instruction::FDiv) &&
          "Expected fmul or fdiv");
 

llvm/test/Transforms/InstCombine/remove-loop-phi-multiply-by-zero.ll

 }
 
 define i32 @test_int_phi_operands(i32* %arr_d) {
 ; CHECK-LABEL: @test_int_phi_operands(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
 ; CHECK:       for.body:
 ; CHECK-NEXT:    [[I_02:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
-; CHECK-NEXT:    [[F_PROD_01:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[MUL:%.*]], [[FOR_BODY]] ]
-; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[ARR_D:%.*]], i64 [[I_02]]
-; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-NEXT:    [[MUL]] = mul nsw i32 [[F_PROD_01]], [[TMP0]]
 ; CHECK-NEXT:    [[INC]] = add i64 [[I_02]], 1
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i64 [[INC]], 1000
 ; CHECK-NEXT:    br i1 [[CMP]], label [[FOR_BODY]], label [[END:%.*]]
 ; CHECK:       end:
-; CHECK-NEXT:    ret i32 [[MUL]]
+; CHECK-NEXT:    ret i32 0
 ;
 entry:
   br label %for.body
 
 for.body:                                         ; preds = %entry, %for.body
   %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
   %f_prod.01 = phi i32 [ 0, %entry ], [ %mul, %for.body ]
   %arrayidx = getelementptr inbounds i32, i32* %arr_d, i64 %i.02