Depends on D128900
GCC uses one instruction for this: amswap_db.d $zero, $a1, $a0, and to me it's correct. Can we also use it?
Likewise for i32 store release operation.
You may need to add tests in lvm/test/Transforms/AtomicExpand/LoongArch.
Thanks for reminding me.I will add tests.
Thank you for your reminder. This may be possible. Further, we can generate different instructions according to constraints (such as instructions without fences when unordered). I'm not sure whether this optimization should be implemented in this patch or another patch. Do you have any suggestions?
Maybe in another patch, as these two instructions are not explicitly emitted by the target code, but by some "internal LLVM magic".
I agree with @xry111 that the optimization to use amswap_db.d $zero, x, y for atomic stores can be done in a later patch. For now this LGTM but I'd like someone else to take a look too.