[NewGVN][LoadCoercion][1/3] Add support for load coercion between store and load instructions

[kmitropoulou]

Summary

Load coercion is done in two phases:

1. Collection of loads: First, we collect the loads that have a dependency with stores. The loads along with their dependencies are added in LoadCoercion map.

2. Code generation: Iterate over the loads of LoadCoercion map and replace the loads with the value that we extract from the stores. This is done in implementLoadCoercion().

New instructions are generated during load coercion. In order to eliminate them, we run value numbering for them. For this reason, the load coercion should be completed before the elimination phase.

[fhahn]

FWIW I am not sure if we should be adding new features to NewGVN at the moment. There are multiple correctness issues of varying degrees. To have a credible path for NewGVN to become useful eventually, I think we should first prioritize fixing the known issues.

llvm/lib/Transforms/Scalar/NewGVN.cpp

3954

I don't think modifying the IR directly here and re-running numbering afterwards really fits with the NewGVN model. If the load is congruent to a known expression, couldn't the load be moved to the same congruence class as that expression and then the existing replace and erase logic will take care of the rest?

llvm/test/Transforms/NewGVN/load_coercion_between_store_and_load.ll

2–3

please keep the RUN line so that the diff shows the functional changes in newgvn. As it is now, it is very hard to see the changes with newgvn

[kmitropoulou]

Updating D124071: [1/3][NewGVN][LoadCoercion] Add support for load coercion between store and load instructions.

[kmitropoulou]

llvm/lib/Transforms/Scalar/NewGVN.cpp

3954

Good point! This was my initial approach too. But, I ended up having some problems. NewGVN adds instructions with similar expressions in the same congruence class. In the elimination phase, the algorithm traverses all the congruence classes and it replaces each member of the congruence with the leader of the congruence class.

Let's assume that we have to do load coercion between a vector store and a scalar load. The current algorithm will not add the store and the load in the same congruence class. We have to do a small hack to do this.

Now, the store and the load are in the same congruence class. In the elimination phase, we can check if any of the members of the congruence class are in LoadCoercion map. If yes, then we can extract the loaded value from the leader of the congruence class (stored value) by generating the right sequence of instructions. This is done at the beginning of the elimination phase. Next, we remove the load from the congruence class because: i. we have to prevent the algorithm from processing this load again and ii. we have to let the algorithm eliminate the other members of the congruence class without a problem. In other words, the load is treated as a special case in the elimination phase. IMO, this does not make much sense since we do not use the elimination phase at all. It is much better to have a separate step that deals with all the loads that need to be optimized with load coercion. After that, we can run the elimination phase without any problem. This is what the current patch does.

Another problem is that it is not expected to emit instructions during the elimination phase. As a result, it is hard to optimize them. Load coercion emits a new sequence of instructions. For example, in test13, the two loads are replaced by %1 = trunc i32 %V1 to i8. The code has already %V4 = trunc i32 %V1 to i8. The elimination phase will not optimize the two truncates. Because, it traverses the congruence classes in reverse order. So, it first processes the %V4 = trunc i32 %V1 to i8. Next, it processes the congruence class with the two loads that should be optimized with load coercion. It emits the truncate and the value numbering adds the newly generated truncate in the same class as %V4. But, this class has already been processed. As a result, we miss to eliminate %V4 by %1 (or vice versa). To deal with this problem, we have to bookkeep the classes that were updated and next, we should run the elimination phase for these classes again. The current patch does not have this problem, because the newly generated instructions are added in the corresponding congruence classes before the elimination phase.

Another problem is that the elimination phase works without problems if the instructions have correct DFS numbers. If we put the load that needs to be optimized with load coercion in a congruence class, then we have to update the DFS numbers because of the newly generated instructions. This means that we might have to update the DFS numbers several times. This patch updates the DFS numbers only once.

IMO, this patch is more explicit and more clean since it tries to do the load coercion without complicating the elimination phase and by doing minimal changes.

[kmitropoulou]

FWIW I am not sure if we should be adding new features to NewGVN at the moment. There are multiple correctness issues of varying degrees. To have a credible path for NewGVN to become useful eventually, I think we should first prioritize fixing the known issues.

@fhahn : Can you please point which of these problems affect load coercion? I might try to address them.

[kmitropoulou]

Updating D124071: [1/3][NewGVN][LoadCoercion] Add support for load coercion between store and load instructions.

[kmitropoulou]

ping

[kmitropoulou]

[NewGVN][LoadCoercion][1/3] Add support for load coercion between store and load instructions.

[xbolva00]

llvm/test/Transforms/NewGVN/load_coercion_between_store_and_load.ll

355

GVN fails to remove dead instructions?

[kmitropoulou]

llvm/test/Transforms/NewGVN/load_coercion_between_store_and_load.ll

355

Yes, these instructions are removed by dce. This sometimes happens with NewGVN as well.

[RKSimon]

@fhahn Do you we have anyone leading the GVN/NewGVN work these days do you know? I can't see anything in CODE_OWNERS

[kmitropoulou]

Updating D124071: [NewGVN][LoadCoercion][1/3] Add support for load coercion between store and load instructions

[kmitropoulou]

ping

[kmitropoulou]

Updating D124071: [NewGVN][LoadCoercion][1/3] Add support for load coercion between store and load instructions

[kmitropoulou]

Updating D124071: [NewGVN][LoadCoercion][1/3] Add support for load coercion between store and load instructions

[kmitropoulou]

Updating D124071: [NewGVN][LoadCoercion][1/3] Add support for load coercion between store and load instructions

[asbirlea]

Quick note, since updates on this until now were offline.
After the fix in D130910 that Konstantina did, I was able to do some testing for NewGVN and haven't run into any crashes, which was a first. This doesn't mean that the current NewGVN is fully correct, just that in the testing I did nothing was obviously broken. This does mean I can test the correctness of this stack of patches on the same workloads.
I tested the previous iteration, followed up with reproducers for issues found and I'm testing the current diff.

Regarding:

In D124071#3585047, @RKSimon wrote:

@fhahn Do you we have anyone leading the GVN/NewGVN work these days do you know? I can't see anything in CODE_OWNERS

I'm currently focusing more on testing the GVN&MSSA patches by @momchil.velikov, than getting NewGVN up to parity.
After the above fix, I did some performance testing with NewGVN turned on vs GVN and it's pretty terrible. To give a rough idea, I'm seeing 20-70% regression for running time, and 30% compile-time regression (due to the compiler being bootstrapped; newgvn compiling the compiler makes the new compiler 30% slower). The biggest factor are the PRE optimizations that GVN does, but even comparing a single stage build NewGVN to GVN with PRE disabled, there are still a few test-suites that show up to 60% regressions.
On the flip side, comparing NewGVN vs GVN with no PRE, there are a couple of big improvements on ARM, so it's quite possible there are gains to harness for specific use cases and/or architectures, but there's a lot of work left to make it a replacement for GVN in general.

llvm/lib/Transforms/Scalar/NewGVN.cpp

 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/Analysis/AssumptionCache.h"
 #include "llvm/Analysis/CFGPrinter.h"
 #include "llvm/Analysis/ConstantFolding.h"
 #include "llvm/Analysis/GlobalsModRef.h"
 #include "llvm/Analysis/InstructionSimplify.h"
 #include "llvm/Analysis/MemoryBuiltins.h"
 #include "llvm/Analysis/MemorySSA.h"
+#include "llvm/Analysis/MemorySSAUpdater.h"
 #include "llvm/Analysis/TargetLibraryInfo.h"
 #include "llvm/Analysis/ValueTracking.h"
 #include "llvm/IR/Argument.h"
 #include "llvm/IR/BasicBlock.h"
 #include "llvm/IR/Constant.h"
 #include "llvm/IR/Constants.h"
 #include "llvm/IR/Dominators.h"
 #include "llvm/IR/Function.h"

 // issue.
 static cl::opt<bool> EnableStoreRefinement("enable-store-refinement",
                                            cl::init(false), cl::Hidden);
 
 /// Currently, the generation "phi of ops" can result in correctness issues.
 static cl::opt<bool> EnablePhiOfOps("enable-phi-of-ops", cl::init(true),
                                     cl::Hidden);
 
+// Enables load coercion for non-constant values.
+static cl::opt<bool> EnableLoadCoercion("enable-load-coercion", cl::init(true),
+                                        cl::Hidden);
+
 //===----------------------------------------------------------------------===//
 //                                GVN Pass
 //===----------------------------------------------------------------------===//
 
 // Anchor methods.
 namespace llvm {
 namespace GVNExpression {
 
#endif
   DenseMap<const Value *, unsigned> InstrDFS;
 
   // This contains the mapping DFS numbers to instructions.
   SmallVector<Value *, 32> DFSToInstr;
 
   // Deletion info.
   SmallPtrSet<Instruction *, 8> InstructionsToErase;
 
+  // Maps the loads to their depending instructions.
+  std::map<Value *, SmallPtrSet<Instruction *, 2>> LoadCoercion;
+
+  // During load coercion, new loads might be generated. We do not want to apply
+  // load coercion for them for now.
+  SmallVector<Instruction *, 2> NewLoadsInLoadCoercion;
+
 public:
   NewGVN(Function &F, DominatorTree *DT, AssumptionCache *AC,
          TargetLibraryInfo *TLI, AliasAnalysis *AA, MemorySSA *MSSA,
          const DataLayout &DL)
       : F(F), DT(DT), TLI(TLI), AA(AA), MSSA(MSSA), AC(AC), DL(DL),
         PredInfo(std::make_unique<PredicateInfo>(F, *DT, *AC)),
         SQ(DL, TLI, DT, AC, /*CtxI=*/nullptr, /*UseInstrInfo=*/false,
            /*CanUseUndef=*/false) {}
private:
   // Value number an Instruction or MemoryPhi.
   void valueNumberMemoryPhi(MemoryPhi *);
   void valueNumberInstruction(Instruction *);
 
   // Symbolic evaluation.
   ExprResult checkExprResults(Expression *, Instruction *, Value *) const;
   ExprResult performSymbolicEvaluation(Value *,
                                        SmallPtrSetImpl<Value *> &) const;
-  const Expression *performSymbolicLoadCoercion(Type *, Value *, LoadInst *,
-                                                Instruction *,
+  const Expression *createLoadExpAndUpdateMemUses(LoadInst *, Value *,
+                                                  MemoryAccess *,
                                                   MemoryAccess *) const;
   const Expression *performSymbolicLoadEvaluation(Instruction *) const;
   const Expression *performSymbolicStoreEvaluation(Instruction *) const;
   ExprResult performSymbolicCallEvaluation(Instruction *) const;
   void sortPHIOps(MutableArrayRef<ValPair> Ops) const;
   const Expression *performSymbolicPHIEvaluation(ArrayRef<ValPair>,
                                                  Instruction *I,
                                                  BasicBlock *PHIBlock) const;
   const Expression *performSymbolicAggrValueEvaluation(Instruction *) const;
private:
   }
 
   bool isCycleFree(const Instruction *) const;
   bool isBackedge(BasicBlock *From, BasicBlock *To) const;
 
   // Debug counter info.  When verifying, we have to reset the value numbering
   // debug counter to the same state it started in to get the same results.
   int64_t StartingVNCounter = 0;
+
+  // The following functions are used in load coercion:
+  // Collect the load instructions and add them to the LoadCoercion map. This is
+  // the first phase of load coercion.
+  const Expression *performSymbolicLoadCoercion(Type *, Value *, LoadInst *,
+                                                Instruction *,
+                                                MemoryAccess *) const;
+  // Iterate the LoadCoercion map and replace the load instructions with a
+  // sequence of instructions which extract the value of the load from the
+  // depending instruction. This is the seccond phase of load coercion.
+  bool implementLoadCoercion();
+  // Try to add the load along with the depending instrunction(s) in
+  // LoadCoercion map.
+  void tryAddLoadDepInsnIntoLoadCoercionMap(LoadInst *, Instruction *) const;
+  // Run value numbering for the instructions that are generated during load
+  // coercion.
+  void runValueNumberingForLoadCoercionInsns(Instruction *);
+  // Update MemorySSA with the load instructions that are emitted during load
+  // coercion.
+  void updateMemorySSA(Instruction *, Instruction *);
+  // Extract the value that will replace the load from the depending
+  // instruction.
+  Value *getExtractedValue(LoadInst *, Instruction *);
 };
 
 } // end anonymous namespace
 
 template <typename T>
 static bool equalsLoadStoreHelper(const T &LHS, const Expression &RHS) {
   if (!isa<LoadExpression>(RHS) && !isa<StoreExpression>(RHS))
     return false;
const Expression *NewGVN::performSymbolicStoreEvaluation(Instruction *I) const {
   }
 
   // If the store is not equivalent to anything, value number it as a store that
   // produces a unique memory state (instead of using it's MemoryUse, we use
   // it's MemoryDef).
   return createStoreExpression(SI, StoreAccess);
 }
 
+void NewGVN::tryAddLoadDepInsnIntoLoadCoercionMap(
+    LoadInst *LI, Instruction *CurrentDepI) const {
+  // Add the load and the corresponding depending instruction in LoadCoercion
+  // map.
+  const_cast<NewGVN *>(this)->LoadCoercion[LI].insert(CurrentDepI);
+}
+
 // See if we can extract the value of a loaded pointer from a load, a store, or
-// a memory instruction.
+// a memory instruction. Load coercion has two phases. In the first phase (the
+// code below), we collect the load intructions and we add them to the
+// LoadCoerion map. If the loaded value is a constant, then we just create a
+// constant expression and we do not add the load to the LoadCoercion map. In
+// the second phase (implementLoadCoercion()), we iterate the LoadCoercion map
+// and we try to replace the load with the value that we extract from the
+// depending instruction.
 const Expression *
 NewGVN::performSymbolicLoadCoercion(Type *LoadType, Value *LoadPtr,
                                     LoadInst *LI, Instruction *DepInst,
                                     MemoryAccess *DefiningAccess) const {
   assert((!LI || LI->isSimple()) && "Not a simple load");
+
+  // Do not apply load coercion for load isntructions that are generated during
+  // load coercion.
+  auto It = llvm::find(NewLoadsInLoadCoercion, LI);
+  if (It != NewLoadsInLoadCoercion.end())
+    return nullptr;
+
   if (auto *DepSI = dyn_cast<StoreInst>(DepInst)) {
     // Can't forward from non-atomic to atomic without violating memory model.
     // Also don't need to coerce if they are the same type, we will just
     // propagate.
     if (LI->isAtomic() > DepSI->isAtomic() ||
         LoadType == DepSI->getValueOperand()->getType())
       return nullptr;
     int Offset = analyzeLoadFromClobberingStore(LoadType, LoadPtr, DepSI, DL);
     if (Offset >= 0) {
       if (auto *C = dyn_cast<Constant>(
               lookupOperandLeader(DepSI->getValueOperand()))) {
         if (Constant *Res =
                 getConstantStoreValueForLoad(C, Offset, LoadType, DL)) {
           LLVM_DEBUG(dbgs() << "Coercing load from store " << *DepSI
                             << " to constant " << *Res << "\n");
           return createConstantExpression(Res);
         }
+      } else if (EnableLoadCoercion) {
+        tryAddLoadDepInsnIntoLoadCoercionMap(LI, DepInst);
+        // Load coercion occurs before the elimination phase. The load
+        // instructions that will be eliminated with load coercion are not added
+        // in any congruence class. Thus, we do not create any load expression
+        // for them.
+        return nullptr;
       }
     }
   } else if (auto *DepLI = dyn_cast<LoadInst>(DepInst)) {
     // Can't forward from non-atomic to atomic without violating memory model.
     if (LI->isAtomic() > DepLI->isAtomic())
       return nullptr;
     int Offset = analyzeLoadFromClobberingLoad(LoadType, LoadPtr, DepLI, DL);
     if (Offset >= 0) {
if (II->getIntrinsicID() == Intrinsic::lifetime_start)
       return createConstantExpression(UndefValue::get(LoadType));
   } else if (auto *InitVal =
                  getInitialValueOfAllocation(DepInst, TLI, LoadType))
       return createConstantExpression(InitVal);
 
   return nullptr;
 }
 
+const Expression *
+NewGVN::createLoadExpAndUpdateMemUses(LoadInst *LI, Value *LoadAddressLeader,
+                                      MemoryAccess *OriginalAccess,
+                                      MemoryAccess *DefiningAccess) const {
+  const auto *LE = createLoadExpression(LI->getType(), LoadAddressLeader, LI,
+                                        DefiningAccess);
+  // If our MemoryLeader is not our defining access, add a use to the
+  // MemoryLeader, so that we get reprocessed when it changes.
+  if (LE->getMemoryLeader() != DefiningAccess)
+    addMemoryUsers(LE->getMemoryLeader(), OriginalAccess);
+  return LE;
+}
+
 const Expression *NewGVN::performSymbolicLoadEvaluation(Instruction *I) const {
   auto *LI = cast<LoadInst>(I);
 
   // We can eliminate in favor of non-simple loads, but we won't be able to
   // eliminate the loads themselves.
   if (!LI->isSimple())
     return nullptr;
 
   Value *LoadAddressLeader = lookupOperandLeader(LI->getPointerOperand());
   // Load of undef is UB.
   if (isa<UndefValue>(LoadAddressLeader))
     return createConstantExpression(PoisonValue::get(LI->getType()));
   MemoryAccess *OriginalAccess = getMemoryAccess(I);
   MemoryAccess *DefiningAccess =
       MSSAWalker->getClobberingMemoryAccess(OriginalAccess);
 
+  // Check if we can apply load coercion.
   if (!MSSA->isLiveOnEntryDef(DefiningAccess)) {
     if (auto *MD = dyn_cast<MemoryDef>(DefiningAccess)) {
       Instruction *DefiningInst = MD->getMemoryInst();
       // If the defining instruction is not reachable, replace with poison.
       if (!ReachableBlocks.count(DefiningInst->getParent()))
         return createConstantExpression(PoisonValue::get(LI->getType()));
       // This will handle stores and memory insts.  We only do if it the
       // defining access has a different type, or it is a pointer produced by
       // certain memory operations that cause the memory to have a fixed value
       // (IE things like calloc).
       if (const auto *CoercionResult =
               performSymbolicLoadCoercion(LI->getType(), LoadAddressLeader, LI,
                                           DefiningInst, DefiningAccess))
         return CoercionResult;
     }
   }
 
-  const auto *LE = createLoadExpression(LI->getType(), LoadAddressLeader, LI,
-                                        DefiningAccess);
-  // If our MemoryLeader is not our defining access, add a use to the
-  // MemoryLeader, so that we get reprocessed when it changes.
-  if (LE->getMemoryLeader() != DefiningAccess)
-    addMemoryUsers(LE->getMemoryLeader(), OriginalAccess);
-  return LE;
+  // If we cannot apply load coercion, then we create a load expression.
+  return createLoadExpAndUpdateMemUses(LI, LoadAddressLeader, OriginalAccess,
 }
 
 NewGVN::ExprResult
 NewGVN::performSymbolicPredicateInfoEvaluation(IntrinsicInst *I) const {
   auto *PI = PredInfo->getPredicateInfoFor(I);
   if (!PI)
     return ExprResult::none();
 
#endif
   DFSToInstr.clear();
   BlockInstRange.clear();
   TouchedInstructions.clear();
   MemoryAccessToClass.clear();
   PredicateToUsers.clear();
   MemoryToUsers.clear();
   RevisitOnReachabilityChange.clear();
   IntrinsicInstPred.clear();
+  LoadCoercion.clear();
+  NewLoadsInLoadCoercion.clear();
 }
 
 // Assign local DFS number mapping to instructions, and leave space for Value
 // PHI's.
 std::pair<unsigned, unsigned> NewGVN::assignDFSNumbers(BasicBlock *B,
                                                        unsigned Start) {
   unsigned End = Start;
   if (MemoryAccess *MemPhi = getMemoryAccess(B)) {
LLVM_DEBUG(dbgs() << "Block " << getBlockName(&F.getEntryBlock())
                     << " marked reachable\n");
   ReachableBlocks.insert(&F.getEntryBlock());
 
   iterateTouchedInstructions();
   verifyMemoryCongruency();
   verifyIterationSettled(F);
   verifyStoreExpressions();
 
+  // During load coercion, we replace the load instructions with a new sequence
+  // of instructions. Next, we run value numbering which adds the new
+  // instructions in the right congruence classes. In this way, any redundant
+  // instructions will be optimized out in the elimination phase.
+  if (EnableLoadCoercion && implementLoadCoercion())
+    // Update the newly generated instructions with the correct DFS numbers.
+    // TODO: Update DFS numbers faster.
+    ICount = updateDFSNumbers(1);
+
   Changed |= eliminateInstructions(F);
 
   // Delete all instructions marked for deletion.
   for (Instruction *ToErase : InstructionsToErase) {
     if (!ToErase->use_empty())
       ToErase->replaceAllUsesWith(PoisonValue::get(ToErase->getType()));
 
     assert(ToErase->getParent() &&
for (auto *Member : *CC) {
     if (!MemberInst)
       return Member;
     if (DT->dominates(getBlockForValue(MemberInst), BB))
       return Member;
   }
   return nullptr;
 }
 
+// Update MemorySSA with the newly emitted load instruction.
+void NewGVN::updateMemorySSA(Instruction *LoadToOptimize,
+                             Instruction *NewLoad) {
+  MemorySSAUpdater MemSSAUpdater(MSSA);
+  MemoryAccess *DefiningAccess = MSSA->getLiveOnEntryDef();
+  MemoryAccess *NewAccess = MemSSAUpdater.createMemoryAccessInBB(
+      NewLoad, DefiningAccess, NewLoad->getParent(),
+      MemorySSA::BeforeTerminator);
+  if (auto *NewDef = dyn_cast<MemoryDef>(NewAccess))
+    MemSSAUpdater.insertDef(NewDef, /*RenameUses=*/true);
+  else
+    MemSSAUpdater.insertUse(cast<MemoryUse>(NewAccess),
+                            /*RenameUses=*/true);
+
+  // Update the metadata of the new load.
+  AAMDNodes Tags = LoadToOptimize->getAAMetadata();
+  if (Tags)
+    NewLoad->setAAMetadata(Tags);
+
+  if (auto *MD = LoadToOptimize->getMetadata(LLVMContext::MD_invariant_load))
+    NewLoad->setMetadata(LLVMContext::MD_invariant_load, MD);
+  if (auto *InvGroupMD =
+          LoadToOptimize->getMetadata(LLVMContext::MD_invariant_group))
+    NewLoad->setMetadata(LLVMContext::MD_invariant_group, InvGroupMD);
+  if (auto *RangeMD = LoadToOptimize->getMetadata(LLVMContext::MD_range))
+    NewLoad->setMetadata(LLVMContext::MD_range, RangeMD);
+}
+
+// Run value numbering for the instructions that are generated during load
+// coercion. In this way, any redundant instructions will be removed in the
+// elimination phase.
+void NewGVN::runValueNumberingForLoadCoercionInsns(Instruction *I) {
+  TOPClass->insert(I);
+  ValueToClass[I] = TOPClass;
+  if (LoadInst *LI = dyn_cast<LoadInst>(I))
+    NewLoadsInLoadCoercion.push_back(LI);
+  valueNumberInstruction(I);
+  updateProcessedCount(I);
+}
+
+// Extract the correct value from the depending instruction.
+Value *NewGVN::getExtractedValue(LoadInst *LI, Instruction *DepI) {
+
+  Type *LoadTy = LI->getType();
+  Value *NewValue = nullptr;
+  Instruction *InsertPtr = nullptr;
+  if (auto *Store = dyn_cast<StoreInst>(DepI)) {
+    int Offset = analyzeLoadFromClobberingStore(LoadTy, LI->getPointerOperand(),
+                                                Store, DL);
+    InsertPtr = Store->getNextNode();
+    // Emit the instructions that extract the correct value from store.
+    NewValue = getStoreValueForLoad(Store->getValueOperand(), Offset, LoadTy,
+                                    InsertPtr, DL);
+  } else if (LoadInst *Load = dyn_cast<LoadInst>(DepI)) {
+    int Offset = analyzeLoadFromClobberingLoad(LoadTy, LI->getPointerOperand(),
+                                               Load, DL);
+    InsertPtr = Load->getNextNode();
+    // Emit the instructions that extract the correct value from load.
+    NewValue = getLoadValueForLoad(Load, Offset, LoadTy, InsertPtr, DL);
+  }
+
+  if (!isa<Constant>(NewValue) && !isa<Argument>(NewValue))
+    for (Instruction *CurInsn = DepI->getNextNode(); CurInsn != InsertPtr;
+         CurInsn = CurInsn->getNextNode()) {
+      if (LoadInst *NewLI = dyn_cast<LoadInst>(CurInsn))
+        updateMemorySSA(LI, NewLI);
+      runValueNumberingForLoadCoercionInsns(CurInsn);
+    }
+
+  return NewValue;
+}
+
+// Iterate over the load instructions of LoadCoercion map and it replaces
+// them with the right sequence of instructions.
+bool NewGVN::implementLoadCoercion() {
+  bool AnythingReplaced = false;
+  for (const auto &P : LoadCoercion) {
+    LoadInst *LI = cast<LoadInst>(P.first);
+    SmallPtrSet<Instruction *, 2> DependingInsns = P.second;
+    Value *NewValue = nullptr;
+    Instruction *FirstDepI = *DependingInsns.begin();
+
+    if (DependingInsns.size() == 1 && DT->dominates(FirstDepI, LI))
+      // Extract the correct value from the depending instruction.
+      NewValue = getExtractedValue(LI, FirstDepI);
+
+    // If we could not eliminate the load, then we need to create a load
+    // expression for the load and run value numbering in order to add it in the
+    // correct congruence class.
+    if (!NewValue) {
+      Value *LoadAddressLeader = lookupOperandLeader(LI->getPointerOperand());
+      MemoryAccess *OriginalAccess = getMemoryAccess(LI);
+      MemoryAccess *DefiningAccess =
+          MSSAWalker->getClobberingMemoryAccess(OriginalAccess);
+      createLoadExpAndUpdateMemUses(LI, LoadAddressLeader, OriginalAccess,
+                                    DefiningAccess);
+      valueNumberInstruction(LI);
+      updateProcessedCount(LI);
+      continue;
+    }
+
+    // Collect the uses of the load.
+    SmallVector<Instruction *, 2> LIUses;
+    for (Use &U : LI->uses())
+      LIUses.push_back(cast<Instruction>(U.getUser()));
+    // Remove the load and update its uses.
+    InstructionsToErase.insert(LI);
+    LI->replaceAllUsesWith(NewValue);
+    // Run value numbering for the uses of the load after updating them with the
+    // new value. In this way, we might be able to eliminate them.
+    for (Instruction *User : LIUses) {
+      valueNumberInstruction(User);
+      updateProcessedCount(User);
+    }
+    // Update the name of the phi node if we generated one.
+    if (isa<PHINode>(NewValue))
+      NewValue->takeName(LI);
+    // Update dedug information.
+    if (Instruction *I = dyn_cast<Instruction>(NewValue))
+      I->setDebugLoc(LI->getDebugLoc());
+    LLVM_DEBUG(dbgs() << "Load coersion: The load " << *LI
+                      << " was eliminated and its uses were replaced by "
+                      << *NewValue << "\n");
+    AnythingReplaced = true;
+  }
+
+  return AnythingReplaced;
+}
+
 bool NewGVN::eliminateInstructions(Function &F) {
   // This is a non-standard eliminator. The normal way to eliminate is
   // to walk the dominator tree in order, keeping track of available
   // values, and eliminating them.  However, this is mildly
   // pointless. It requires doing lookups on every instruction,
   // regardless of whether we will ever eliminate it.  For
   // instructions part of most singleton congruence classes, we know we
   // will never eliminate them.

llvm/test/Transforms/NewGVN/load_coercion_between_loads.ll

 ; OLDGVN-NEXT:    ret i8 [[V6]]
 ;
 ; NEWGVN-LABEL: @test12(
 ; NEWGVN-NEXT:    [[V1:%.*]] = load i32, i32* [[P1:%.*]], align 4
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P1]] to i8*
 ; NEWGVN-NEXT:    [[V2:%.*]] = load i8, i8* [[P2]], align 1
 ; NEWGVN-NEXT:    [[V3:%.*]] = trunc i32 [[V1]] to i8
 ; NEWGVN-NEXT:    store i32 [[V:%.*]], i32* [[P1]], align 4
-; NEWGVN-NEXT:    [[V4:%.*]] = load i8, i8* [[P2]], align 1
+; NEWGVN-NEXT:    [[TMP1:%.*]] = trunc i32 [[V]] to i8
 ; NEWGVN-NEXT:    [[V5:%.*]] = add i8 [[V2]], [[V3]]
-; NEWGVN-NEXT:    [[V6:%.*]] = add i8 [[V4]], [[V5]]
+; NEWGVN-NEXT:    [[V6:%.*]] = add i8 [[TMP1]], [[V5]]
 ; NEWGVN-NEXT:    ret i8 [[V6]]
 ;
   %V1 = load i32, i32* %P1
   %P2 = bitcast i32* %P1 to i8*
   %V2 = load i8, i8* %P2
   %V3 = trunc i32 %V1 to i8
   store i32 %V, i32* %P1
   %P4 = bitcast i32* %P1 to i8*

llvm/test/Transforms/NewGVN/load_coercion_between_store_and_load.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -S -gvn < %s | FileCheck %s -check-prefixes=GVN,OLDGVN
 ; RUN: opt -S -newgvn < %s | FileCheck %s -check-prefixes=GVN,NEWGVN
 
 define float @test1(i32 %V1, i32* %P) {
 ; OLDGVN-LABEL: @test1(
 ; OLDGVN-NEXT:    store i32 [[V1:%.*]], i32* [[P:%.*]], align 4
 ; OLDGVN-NEXT:    [[P1:%.*]] = bitcast i32* [[P]] to float*
 ; OLDGVN-NEXT:    [[TMP1:%.*]] = bitcast i32 [[V1]] to float
 ; OLDGVN-NEXT:    ret float [[TMP1]]
 ;
 ; NEWGVN-LABEL: @test1(
 ; NEWGVN-NEXT:    store i32 [[V1:%.*]], i32* [[P:%.*]], align 4
+; NEWGVN-NEXT:    [[TMP1:%.*]] = bitcast i32 [[V1]] to float
 ; NEWGVN-NEXT:    [[P1:%.*]] = bitcast i32* [[P]] to float*
-; NEWGVN-NEXT:    [[V2:%.*]] = load float, float* [[P1]], align 4
-; NEWGVN-NEXT:    ret float [[V2]]
+; NEWGVN-NEXT:    ret float [[TMP1]]
 ;
   store i32 %V1, i32* %P
   %P1 = bitcast i32* %P to float*
   %V2 = load float, float* %P1
   ret float %V2
 }
 
 define float @test2(i64* %V1, i64** %P1) {
 ; OLDGVN-LABEL: @test2(
 ; OLDGVN-NEXT:    store i64* [[V1:%.*]], i64** [[P1:%.*]], align 8
 ; OLDGVN-NEXT:    [[P2:%.*]] = bitcast i64** [[P1]] to float*
 ; OLDGVN-NEXT:    [[TMP1:%.*]] = ptrtoint i64* [[V1]] to i64
 ; OLDGVN-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
 ; OLDGVN-NEXT:    [[TMP3:%.*]] = bitcast i32 [[TMP2]] to float
 ; OLDGVN-NEXT:    ret float [[TMP3]]
 ;
 ; NEWGVN-LABEL: @test2(
 ; NEWGVN-NEXT:    store i64* [[V1:%.*]], i64** [[P1:%.*]], align 8
+; NEWGVN-NEXT:    [[TMP1:%.*]] = ptrtoint i64* [[V1]] to i64
+; NEWGVN-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
+; NEWGVN-NEXT:    [[TMP3:%.*]] = bitcast i32 [[TMP2]] to float
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i64** [[P1]] to float*
-; NEWGVN-NEXT:    [[V2:%.*]] = load float, float* [[P2]], align 4
-; NEWGVN-NEXT:    ret float [[V2]]
+; NEWGVN-NEXT:    ret float [[TMP3]]
 ;
   store i64* %V1, i64** %P1
   %P2 = bitcast i64** %P1 to float*
   %V2 = load float, float* %P2
   ret float %V2
 }
 
 define i8 @test3(i32 %V1, i32* %P1) {
 ; OLDGVN-LABEL: @test3(
 ; OLDGVN-NEXT:    store i32 [[V1:%.*]], i32* [[P1:%.*]], align 4
 ; OLDGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P1]] to i8*
 ; OLDGVN-NEXT:    [[TMP1:%.*]] = trunc i32 [[V1]] to i8
 ; OLDGVN-NEXT:    ret i8 [[TMP1]]
 ;
 ; NEWGVN-LABEL: @test3(
 ; NEWGVN-NEXT:    store i32 [[V1:%.*]], i32* [[P1:%.*]], align 4
+; NEWGVN-NEXT:    [[TMP1:%.*]] = trunc i32 [[V1]] to i8
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P1]] to i8*
-; NEWGVN-NEXT:    [[V2:%.*]] = load i8, i8* [[P2]], align 1
-; NEWGVN-NEXT:    ret i8 [[V2]]
+; NEWGVN-NEXT:    ret i8 [[TMP1]]
 ;
   store i32 %V1, i32* %P1
   %P2 = bitcast i32* %P1 to i8*
   %V2 = load i8, i8* %P2
   ret i8 %V2
 }
 
 define float @test4(i64 %V1, i64* %P1) {
 ; OLDGVN-LABEL: @test4(
 ; OLDGVN-NEXT:    store i64 [[V1:%.*]], i64* [[P1:%.*]], align 4
 ; OLDGVN-NEXT:    [[P2:%.*]] = bitcast i64* [[P1]] to float*
 ; OLDGVN-NEXT:    [[TMP1:%.*]] = trunc i64 [[V1]] to i32
 ; OLDGVN-NEXT:    [[TMP2:%.*]] = bitcast i32 [[TMP1]] to float
 ; OLDGVN-NEXT:    ret float [[TMP2]]
 ;
 ; NEWGVN-LABEL: @test4(
 ; NEWGVN-NEXT:    store i64 [[V1:%.*]], i64* [[P1:%.*]], align 4
+; NEWGVN-NEXT:    [[TMP1:%.*]] = trunc i64 [[V1]] to i32
+; NEWGVN-NEXT:    [[TMP2:%.*]] = bitcast i32 [[TMP1]] to float
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i64* [[P1]] to float*
-; NEWGVN-NEXT:    [[V2:%.*]] = load float, float* [[P2]], align 4
-; NEWGVN-NEXT:    ret float [[V2]]
+; NEWGVN-NEXT:    ret float [[TMP2]]
 ;
   store i64 %V1, i64* %P1
   %P2 = bitcast i64* %P1 to float*
   %V2 = load float, float* %P2
   ret float %V2
 }
 
 define i8 @test5(i32* %P, i8* %T) {

 ; OLDGVN-LABEL: @test6(
 ; OLDGVN-NEXT:    store i64 [[V1:%.*]], i64* [[P1:%.*]], align 4
 ; OLDGVN-NEXT:    [[P2:%.*]] = bitcast i64* [[P1]] to i8**
 ; OLDGVN-NEXT:    [[TMP1:%.*]] = inttoptr i64 [[V1]] to i8*
 ; OLDGVN-NEXT:    ret i8* [[TMP1]]
 ;
 ; NEWGVN-LABEL: @test6(
 ; NEWGVN-NEXT:    store i64 [[V1:%.*]], i64* [[P1:%.*]], align 4
+; NEWGVN-NEXT:    [[TMP1:%.*]] = inttoptr i64 [[V1]] to i8*
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i64* [[P1]] to i8**
-; NEWGVN-NEXT:    [[V2:%.*]] = load i8*, i8** [[P2]], align 8
-; NEWGVN-NEXT:    ret i8* [[V2]]
+; NEWGVN-NEXT:    ret i8* [[TMP1]]
 ;
   store i64 %V1, i64* %P1
   %P2 = bitcast i64* %P1 to i8**
   %V2 = load i8*, i8** %P2
   ret i8* %V2
 }
 
 define i32 @test7(double %V1, double* %P1) {
 ; OLDGVN-LABEL: @test7(
 ; OLDGVN-NEXT:    store double [[V1:%.*]], double* [[P1:%.*]], align 8
 ; OLDGVN-NEXT:    [[P2:%.*]] = bitcast double* [[P1]] to i32*
 ; OLDGVN-NEXT:    [[TMP1:%.*]] = bitcast double [[V1]] to i64
 ; OLDGVN-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
 ; OLDGVN-NEXT:    ret i32 [[TMP2]]
 ;
 ; NEWGVN-LABEL: @test7(
 ; NEWGVN-NEXT:    store double [[V1:%.*]], double* [[P1:%.*]], align 8
+; NEWGVN-NEXT:    [[TMP1:%.*]] = bitcast double [[V1]] to i64
+; NEWGVN-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast double* [[P1]] to i32*
-; NEWGVN-NEXT:    [[V2:%.*]] = load i32, i32* [[P2]], align 4
-; NEWGVN-NEXT:    ret i32 [[V2]]
+; NEWGVN-NEXT:    ret i32 [[TMP2]]
 ;
   store double %V1, double* %P1
   %P2 = bitcast double* %P1 to i32*
   %V2 = load i32, i32* %P2
   ret i32 %V2
 }
 
 define i8 @test8(i32 %V1, i32* %P1) {
 ; OLDGVN-LABEL: @test8(
 ; OLDGVN-NEXT:    store i32 [[V1:%.*]], i32* [[P1:%.*]], align 4
 ; OLDGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P1]] to i8*
 ; OLDGVN-NEXT:    [[P3:%.*]] = getelementptr i8, i8* [[P2]], i32 2
 ; OLDGVN-NEXT:    [[TMP1:%.*]] = lshr i32 [[V1]], 16
 ; OLDGVN-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
 ; OLDGVN-NEXT:    ret i8 [[TMP2]]
 ;
 ; NEWGVN-LABEL: @test8(
 ; NEWGVN-NEXT:    store i32 [[V1:%.*]], i32* [[P1:%.*]], align 4
+; NEWGVN-NEXT:    [[TMP1:%.*]] = lshr i32 [[V1]], 16
+; NEWGVN-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P1]] to i8*
 ; NEWGVN-NEXT:    [[P3:%.*]] = getelementptr i8, i8* [[P2]], i32 2
-; NEWGVN-NEXT:    [[V2:%.*]] = load i8, i8* [[P3]], align 1
-; NEWGVN-NEXT:    ret i8 [[V2]]
+; NEWGVN-NEXT:    ret i8 [[TMP2]]
 ;
   store i32 %V1, i32* %P1
   %P2 = bitcast i32* %P1 to i8*
   %P3 = getelementptr i8, i8* %P2, i32 2
   %V2 = load i8, i8* %P3
   ret i8 %V2
 }
 

 ; OLDGVN:       T:
 ; OLDGVN-NEXT:    ret double [[TMP0]]
 ; OLDGVN:       F:
 ; OLDGVN-NEXT:    ret double [[TMP0]]
 ;
 ; NEWGVN-LABEL: @test9(
 ; NEWGVN-NEXT:  Entry:
 ; NEWGVN-NEXT:    store i64 [[V:%.*]], i64* [[P1:%.*]], align 4
-; NEWGVN-NEXT:    [[P3:%.*]] = bitcast i64* [[P1]] to double*
+; NEWGVN-NEXT:    [[TMP0:%.*]] = bitcast i64 [[V]] to double
 ; NEWGVN-NEXT:    br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
 ; NEWGVN:       T:
-; NEWGVN-NEXT:    [[B:%.*]] = load double, double* [[P3]], align 8
-; NEWGVN-NEXT:    ret double [[B]]
+; NEWGVN-NEXT:    ret double [[TMP0]]
 ; NEWGVN:       F:
-; NEWGVN-NEXT:    [[C:%.*]] = load double, double* [[P3]], align 8
-; NEWGVN-NEXT:    ret double [[C]]
+; NEWGVN-NEXT:    ret double [[TMP0]]
 ;
 Entry:
   %A = load i64 , i64* %P1
   store i64 %V, i64* %P1
   %P3 = bitcast i64* %P1 to double*
   br i1 %cond, label %T, label %F
 T:
   %B = load double, double* %P3

 ; OLDGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P]] to i8*
 ; OLDGVN-NEXT:    [[TMP2:%.*]] = trunc i32 [[V0]] to i8
 ; OLDGVN-NEXT:    [[I1:%.*]] = insertvalue <{ i8, float }> poison, i8 [[TMP2]], 0
 ; OLDGVN-NEXT:    [[I2:%.*]] = insertvalue <{ i8, float }> [[I1]], float [[TMP1]], 1
 ; OLDGVN-NEXT:    ret <{ i8, float }> [[I2]]
 ;
 ; NEWGVN-LABEL: @test10(
 ; NEWGVN-NEXT:    store i32 [[V0:%.*]], i32* [[P:%.*]], align 4
+; NEWGVN-NEXT:    [[TMP1:%.*]] = trunc i32 [[V0]] to i8
+; NEWGVN-NEXT:    [[TMP2:%.*]] = bitcast i32 [[V0]] to float
 ; NEWGVN-NEXT:    [[P1:%.*]] = bitcast i32* [[P]] to float*
-; NEWGVN-NEXT:    [[V1:%.*]] = load float, float* [[P1]], align 4
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P]] to i8*
-; NEWGVN-NEXT:    [[V2:%.*]] = load i8, i8* [[P2]], align 1
-; NEWGVN-NEXT:    [[I1:%.*]] = insertvalue <{ i8, float }> poison, i8 [[V2]], 0
-; NEWGVN-NEXT:    [[I2:%.*]] = insertvalue <{ i8, float }> [[I1]], float [[V1]], 1
+; NEWGVN-NEXT:    [[I1:%.*]] = insertvalue <{ i8, float }> poison, i8 [[TMP1]], 0
+; NEWGVN-NEXT:    [[I2:%.*]] = insertvalue <{ i8, float }> [[I1]], float [[TMP2]], 1
 ; NEWGVN-NEXT:    ret <{ i8, float }> [[I2]]
 ;
   store i32 %V0, i32* %P
   %P1 = bitcast i32* %P to float*
   %V1 = load float, float* %P1
   %P2 = bitcast i32* %P to i8*
   %V2 = load i8, i8* %P2
   %I1 = insertvalue <{i8, float}> poison, i8 %V2, 0
   %I2 = insertvalue <{i8, float}> %I1, float %V1, 1
   ret <{i8, float}> %I2
 }
 
 define <{i8, float}> @test11(i32 %V0, i32* %P, i1 %cond) {
 ;   Entry
 ;    /  \
 ;   T    F
 ;
-; OLDGVN-LABEL: @test11(
-; OLDGVN-NEXT:  Entry:
-; OLDGVN-NEXT:    store i32 [[V0:%.*]], i32* [[P:%.*]], align 4
-; OLDGVN-NEXT:    [[TMP0:%.*]] = trunc i32 [[V0]] to i8
-; OLDGVN-NEXT:    [[TMP1:%.*]] = bitcast i32 [[V0]] to float
-; OLDGVN-NEXT:    br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
-; OLDGVN:       T:
-; OLDGVN-NEXT:    [[P1:%.*]] = bitcast i32* [[P]] to float*
-; OLDGVN-NEXT:    [[I1:%.*]] = insertvalue <{ i8, float }> poison, float [[TMP1]], 1
-; OLDGVN-NEXT:    ret <{ i8, float }> [[I1]]
-; OLDGVN:       F:
-; OLDGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P]] to i8*
-; OLDGVN-NEXT:    [[I2:%.*]] = insertvalue <{ i8, float }> poison, i8 [[TMP0]], 0
-; OLDGVN-NEXT:    ret <{ i8, float }> [[I2]]
-;
-; NEWGVN-LABEL: @test11(
-; NEWGVN-NEXT:  Entry:
-; NEWGVN-NEXT:    store i32 [[V0:%.*]], i32* [[P:%.*]], align 4
-; NEWGVN-NEXT:    br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
-; NEWGVN:       T:
-; NEWGVN-NEXT:    [[P1:%.*]] = bitcast i32* [[P]] to float*
-; NEWGVN-NEXT:    [[V1:%.*]] = load float, float* [[P1]], align 4
-; NEWGVN-NEXT:    [[I1:%.*]] = insertvalue <{ i8, float }> poison, float [[V1]], 1
-; NEWGVN-NEXT:    ret <{ i8, float }> [[I1]]
-; NEWGVN:       F:
-; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P]] to i8*
-; NEWGVN-NEXT:    [[V2:%.*]] = load i8, i8* [[P2]], align 1
-; NEWGVN-NEXT:    [[I2:%.*]] = insertvalue <{ i8, float }> poison, i8 [[V2]], 0
-; NEWGVN-NEXT:    ret <{ i8, float }> [[I2]]
+; GVN-LABEL: @test11(
+; GVN-NEXT:  Entry:
+; GVN-NEXT:    store i32 [[V0:%.*]], i32* [[P:%.*]], align 4
+; GVN-NEXT:    [[TMP0:%.*]] = trunc i32 [[V0]] to i8
+; GVN-NEXT:    [[TMP1:%.*]] = bitcast i32 [[V0]] to float
+; GVN-NEXT:    br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
+; GVN:       T:
+; GVN-NEXT:    [[P1:%.*]] = bitcast i32* [[P]] to float*
+; GVN-NEXT:    [[I1:%.*]] = insertvalue <{ i8, float }> poison, float [[TMP1]], 1
+; GVN-NEXT:    ret <{ i8, float }> [[I1]]
+; GVN:       F:
+; GVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P]] to i8*
+; GVN-NEXT:    [[I2:%.*]] = insertvalue <{ i8, float }> poison, i8 [[TMP0]], 0
+; GVN-NEXT:    ret <{ i8, float }> [[I2]]
 ;
 Entry:
   store i32 %V0, i32* %P
   br i1 %cond, label %T, label %F
 
 T:
   %P1 = bitcast i32* %P to float*
   %V1 = load float, float* %P1

 ; OLDGVN:       F:
 ; OLDGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P]] to float*
 ; OLDGVN-NEXT:    [[I2:%.*]] = insertvalue <{ float, float }> poison, float [[TMP0]], 0
 ; OLDGVN-NEXT:    ret <{ float, float }> [[I2]]
 ;
 ; NEWGVN-LABEL: @test12(
 ; NEWGVN-NEXT:  Entry:
 ; NEWGVN-NEXT:    store i32 [[V0:%.*]], i32* [[P:%.*]], align 4
+; NEWGVN-NEXT:    [[TMP0:%.*]] = bitcast i32 [[V0]] to float
 ; NEWGVN-NEXT:    br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
 ; NEWGVN:       T:
-; NEWGVN-NEXT:    [[P1:%.*]] = bitcast i32* [[P]] to float*
-; NEWGVN-NEXT:    [[V1:%.*]] = load float, float* [[P1]], align 4
-; NEWGVN-NEXT:    [[I1:%.*]] = insertvalue <{ float, float }> poison, float [[V1]], 1
+; NEWGVN-NEXT:    [[I1:%.*]] = insertvalue <{ float, float }> poison, float [[TMP0]], 1
 ; NEWGVN-NEXT:    ret <{ float, float }> [[I1]]
 ; NEWGVN:       F:
-; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P]] to float*
-; NEWGVN-NEXT:    [[V2:%.*]] = load float, float* [[P2]], align 4
-; NEWGVN-NEXT:    [[I2:%.*]] = insertvalue <{ float, float }> poison, float [[V2]], 0
+; NEWGVN-NEXT:    [[I2:%.*]] = insertvalue <{ float, float }> poison, float [[TMP0]], 0
 ; NEWGVN-NEXT:    ret <{ float, float }> [[I2]]
 ;
 Entry:
   store i32 %V0, i32* %P
   br i1 %cond, label %T, label %F
 
 T:
   %P1 = bitcast i32* %P to float*

 ; OLDGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P1]] to i8*
 ; OLDGVN-NEXT:    [[TMP1:%.*]] = trunc i32 [[V1]] to i8
 ; OLDGVN-NEXT:    [[P3:%.*]] = bitcast i32* [[P1]] to i64*
 ; OLDGVN-NEXT:    [[V5:%.*]] = add i8 [[TMP1]], [[TMP1]]
 ; OLDGVN-NEXT:    ret i8 [[V5]]
 ;
 ; NEWGVN-LABEL: @test13(
 ; NEWGVN-NEXT:    store i32 [[V1:%.*]], i32* [[P1:%.*]], align 4
+; NEWGVN-NEXT:    [[TMP1:%.*]] = trunc i32 [[V1]] to i8
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P1]] to i8*
-; NEWGVN-NEXT:    [[V2:%.*]] = load i8, i8* [[P2]], align 1
 ; NEWGVN-NEXT:    [[P3:%.*]] = bitcast i32* [[P1]] to i64*
-; NEWGVN-NEXT:    [[V4:%.*]] = trunc i32 [[V1]] to i8
-; NEWGVN-NEXT:    [[V5:%.*]] = add i8 [[V2]], [[V4]]
+; NEWGVN-NEXT:    [[V5:%.*]] = add i8 [[TMP1]], [[TMP1]]
 ; NEWGVN-NEXT:    ret i8 [[V5]]
 ;
   store i32 %V1, i32* %P1
   %P2 = bitcast i32* %P1 to i8*
   %V2 = load i8, i8* %P2
   %P3 = bitcast i32* %P1 to i64*
   %V3 = load i64, i64* %P3
   %V4 = trunc i32 %V1 to i8
   %V5 = add i8 %V2, %V4
   ret i8 %V5
 }
 
 define i8 @test14(i32* %P1, i32 %V1) {
 ; OLDGVN-LABEL: @test14(
 ; OLDGVN-NEXT:    store i32 [[V1:%.*]], i32* [[P1:%.*]], align 4
 ; OLDGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P1]] to i8*
 ; OLDGVN-NEXT:    [[TMP1:%.*]] = trunc i32 [[V1]] to i8
 ; OLDGVN-NEXT:    [[V5:%.*]] = add i8 [[TMP1]], [[TMP1]]
 ; OLDGVN-NEXT:    ret i8 [[V5]]
 ;
 ; NEWGVN-LABEL: @test14(
 ; NEWGVN-NEXT:    store i32 [[V1:%.*]], i32* [[P1:%.*]], align 4
-; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P1]] to i8*
-; NEWGVN-NEXT:    [[V2:%.*]] = load i8, i8* [[P2]], align 1
-; NEWGVN-NEXT:    [[V5:%.*]] = add i8 [[V2]], [[V2]]
+; NEWGVN-NEXT:    [[TMP1:%.*]] = trunc i32 [[V1]] to i8
+; NEWGVN-NEXT:    [[V5:%.*]] = add i8 [[TMP1]], [[TMP1]]
 ; NEWGVN-NEXT:    ret i8 [[V5]]
 ;
   store i32 %V1, i32* %P1
   %P2 = bitcast i32* %P1 to i8*
   %V2 = load i8, i8* %P2
   %P3 = bitcast i32* %P1 to i8*
   %V3 = load i8, i8* %P3
   %V5 = add i8 %V2, %V3

llvm/test/Transforms/NewGVN/load_coercion_replace_load_with_phi.ll

 ; NEWGVN:       Loop:
 ; NEWGVN-NEXT:    [[INDEX:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[INDEX_INC:%.*]], [[LOOP]] ]
 ; NEWGVN-NEXT:    [[P1:%.*]] = bitcast i64* [[P:%.*]] to <4 x i64>*
 ; NEWGVN-NEXT:    [[I1:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX]], i32 0
 ; NEWGVN-NEXT:    [[I2:%.*]] = insertelement <4 x i64> [[I1]], i64 [[INDEX]], i32 1
 ; NEWGVN-NEXT:    [[I3:%.*]] = insertelement <4 x i64> [[I2]], i64 100, i32 2
 ; NEWGVN-NEXT:    [[I4:%.*]] = insertelement <4 x i64> [[I3]], i64 1000, i32 3
 ; NEWGVN-NEXT:    store <4 x i64> [[I4]], <4 x i64>* [[P1]], align 32
+; NEWGVN-NEXT:    [[TMP0:%.*]] = bitcast <4 x i64> [[I4]] to i256
+; NEWGVN-NEXT:    [[TMP1:%.*]] = trunc i256 [[TMP0]] to i64
 ; NEWGVN-NEXT:    [[INDEX_INC]] = add i64 [[INDEX]], 1
 ; NEWGVN-NEXT:    [[COND:%.*]] = icmp ne i64 [[INDEX_INC]], [[TC:%.*]]
 ; NEWGVN-NEXT:    br i1 [[COND]], label [[LOOP]], label [[BB:%.*]]
 ; NEWGVN:       BB:
-; NEWGVN-NEXT:    [[V4:%.*]] = load i64, i64* [[P]], align 4
 ; NEWGVN-NEXT:    br label [[EXIT:%.*]]
 ; NEWGVN:       Exit:
-; NEWGVN-NEXT:    [[V5:%.*]] = add i64 [[V4]], [[TC]]
+; NEWGVN-NEXT:    [[V5:%.*]] = add i64 [[TMP1]], [[TC]]
 ; NEWGVN-NEXT:    ret i64 [[V5]]
 ;
 Entry:
   br label %Loop
 
 Loop:
   %Index = phi i64 [ 1, %Entry ], [ %Index.inc, %Loop ]
   %P1 = bitcast i64* %P to <4 x i64>*

 ; NEWGVN:       Loop:
 ; NEWGVN-NEXT:    [[INDEX:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[INDEX_INC:%.*]], [[LOOP]] ]
 ; NEWGVN-NEXT:    [[P1:%.*]] = bitcast i64* [[P:%.*]] to <4 x i64>*
 ; NEWGVN-NEXT:    [[I1:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX]], i32 0
 ; NEWGVN-NEXT:    [[I2:%.*]] = insertelement <4 x i64> [[I1]], i64 [[INDEX]], i32 1
 ; NEWGVN-NEXT:    [[I3:%.*]] = insertelement <4 x i64> [[I2]], i64 100, i32 2
 ; NEWGVN-NEXT:    [[I4:%.*]] = insertelement <4 x i64> [[I3]], i64 1000, i32 3
 ; NEWGVN-NEXT:    store <4 x i64> [[I4]], <4 x i64>* [[P1]], align 32
+; NEWGVN-NEXT:    [[TMP0:%.*]] = bitcast <4 x i64> [[I4]] to i256
+; NEWGVN-NEXT:    [[TMP1:%.*]] = trunc i256 [[TMP0]] to i128
+; NEWGVN-NEXT:    [[TMP2:%.*]] = bitcast i128 [[TMP1]] to <2 x i64>
+; NEWGVN-NEXT:    [[TMP3:%.*]] = trunc i256 [[TMP0]] to i64
 ; NEWGVN-NEXT:    [[INDEX_INC]] = add i64 [[INDEX]], 1
 ; NEWGVN-NEXT:    [[COND:%.*]] = icmp ne i64 [[INDEX_INC]], [[TC:%.*]]
 ; NEWGVN-NEXT:    br i1 [[COND]], label [[LOOP]], label [[BB1:%.*]]
 ; NEWGVN:       BB1:
 ; NEWGVN-NEXT:    br i1 [[COND1:%.*]], label [[BB2:%.*]], label [[BB3:%.*]]
 ; NEWGVN:       BB2:
-; NEWGVN-NEXT:    [[V4:%.*]] = load i64, i64* [[P]], align 4
 ; NEWGVN-NEXT:    br label [[EXIT:%.*]]
 ; NEWGVN:       BB3:
 ; NEWGVN-NEXT:    br label [[EXIT]]
 ; NEWGVN:       Exit:
-; NEWGVN-NEXT:    [[PHI:%.*]] = phi i64 [ [[V4]], [[BB2]] ], [ 100, [[BB3]] ]
+; NEWGVN-NEXT:    [[PHI:%.*]] = phi i64 [ [[TMP3]], [[BB2]] ], [ 100, [[BB3]] ]
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i64* [[P]] to <2 x i64>*
-; NEWGVN-NEXT:    [[V5:%.*]] = load <2 x i64>, <2 x i64>* [[P2]], align 16
-; NEWGVN-NEXT:    [[V6:%.*]] = extractelement <2 x i64> [[V5]], i64 1
+; NEWGVN-NEXT:    [[V6:%.*]] = extractelement <2 x i64> [[TMP2]], i64 1
 ; NEWGVN-NEXT:    [[V7:%.*]] = add i64 [[PHI]], [[V6]]
 ; NEWGVN-NEXT:    ret i64 [[V7]]
 ;
 Entry:
   br label %Loop
 
 Loop:
   %Index = phi i64 [ 1, %Entry ], [ %Index.inc, %Loop ]

 ; NEWGVN:       Loop1:
 ; NEWGVN-NEXT:    [[INDEX1:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[INDEX1_INC:%.*]], [[LOOP1]] ]
 ; NEWGVN-NEXT:    [[P1:%.*]] = bitcast i64* [[P:%.*]] to <4 x i64>*
 ; NEWGVN-NEXT:    [[I1:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX1]], i32 0
 ; NEWGVN-NEXT:    [[I2:%.*]] = insertelement <4 x i64> [[I1]], i64 [[INDEX1]], i32 1
 ; NEWGVN-NEXT:    [[I3:%.*]] = insertelement <4 x i64> [[I2]], i64 100, i32 2
 ; NEWGVN-NEXT:    [[I4:%.*]] = insertelement <4 x i64> [[I3]], i64 1000, i32 3
 ; NEWGVN-NEXT:    store <4 x i64> [[I4]], <4 x i64>* [[P1]], align 32
+; NEWGVN-NEXT:    [[TMP0:%.*]] = bitcast <4 x i64> [[I4]] to i256
+; NEWGVN-NEXT:    [[TMP1:%.*]] = trunc i256 [[TMP0]] to i128
+; NEWGVN-NEXT:    [[TMP2:%.*]] = bitcast i128 [[TMP1]] to <2 x i64>
+; NEWGVN-NEXT:    [[TMP3:%.*]] = trunc i256 [[TMP0]] to i64
 ; NEWGVN-NEXT:    [[INDEX1_INC]] = add i64 [[INDEX1]], 1
 ; NEWGVN-NEXT:    [[COND1:%.*]] = icmp ne i64 [[INDEX1_INC]], [[TC1:%.*]]
 ; NEWGVN-NEXT:    br i1 [[COND1]], label [[LOOP1]], label [[BB1:%.*]]
 ; NEWGVN:       BB1:
 ; NEWGVN-NEXT:    br i1 [[COND:%.*]], label [[BB2:%.*]], label [[BB3:%.*]]
 ; NEWGVN:       BB2:
-; NEWGVN-NEXT:    [[V4:%.*]] = load i64, i64* [[P]], align 4
 ; NEWGVN-NEXT:    br label [[LOOP2:%.*]]
 ; NEWGVN:       BB3:
 ; NEWGVN-NEXT:    br label [[LOOP2]]
 ; NEWGVN:       Loop2:
-; NEWGVN-NEXT:    [[INDEX2:%.*]] = phi i64 [ [[V4]], [[BB2]] ], [ 1, [[BB3]] ], [ [[INDEX2_INC:%.*]], [[LOOP2]] ]
+; NEWGVN-NEXT:    [[INDEX2:%.*]] = phi i64 [ [[TMP3]], [[BB2]] ], [ 1, [[BB3]] ], [ [[INDEX2_INC:%.*]], [[LOOP2]] ]
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i64* [[P]] to <2 x i64>*
-; NEWGVN-NEXT:    [[V5:%.*]] = load <2 x i64>, <2 x i64>* [[P2]], align 16
-; NEWGVN-NEXT:    [[V6:%.*]] = extractelement <2 x i64> [[V5]], i64 1
+; NEWGVN-NEXT:    [[V6:%.*]] = extractelement <2 x i64> [[TMP2]], i64 1
 ; NEWGVN-NEXT:    [[V7:%.*]] = add i64 [[V6]], [[INDEX2]]
 ; NEWGVN-NEXT:    [[INDEX2_INC]] = add i64 [[INDEX2]], 1
 ; NEWGVN-NEXT:    [[COND2:%.*]] = icmp ne i64 [[INDEX2_INC]], [[TC2:%.*]]
 ; NEWGVN-NEXT:    br i1 [[COND2]], label [[LOOP2]], label [[EXIT:%.*]]
 ; NEWGVN:       Exit:
 ; NEWGVN-NEXT:    ret i64 [[V7]]
 ;
 Entry:

 ; NEWGVN:       Loop1:
 ; NEWGVN-NEXT:    [[INDEX1:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[INDEX1_INC:%.*]], [[LOOP1]] ]
 ; NEWGVN-NEXT:    [[P1:%.*]] = bitcast i64* [[P:%.*]] to <4 x i64>*
 ; NEWGVN-NEXT:    [[I1:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX1]], i32 0
 ; NEWGVN-NEXT:    [[I2:%.*]] = insertelement <4 x i64> [[I1]], i64 [[INDEX1]], i32 1
 ; NEWGVN-NEXT:    [[I3:%.*]] = insertelement <4 x i64> [[I2]], i64 100, i32 2
 ; NEWGVN-NEXT:    [[I4:%.*]] = insertelement <4 x i64> [[I3]], i64 1000, i32 3
 ; NEWGVN-NEXT:    store <4 x i64> [[I4]], <4 x i64>* [[P1]], align 32
+; NEWGVN-NEXT:    [[TMP0:%.*]] = bitcast <4 x i64> [[I4]] to i256
+; NEWGVN-NEXT:    [[TMP1:%.*]] = trunc i256 [[TMP0]] to i64
+; NEWGVN-NEXT:    [[TMP2:%.*]] = trunc i256 [[TMP0]] to i128
+; NEWGVN-NEXT:    [[TMP3:%.*]] = bitcast i128 [[TMP2]] to <2 x i64>
 ; NEWGVN-NEXT:    [[INDEX1_INC]] = add i64 [[INDEX1]], 1
 ; NEWGVN-NEXT:    [[COND2:%.*]] = icmp ne i64 [[INDEX1_INC]], [[TC1:%.*]]
 ; NEWGVN-NEXT:    br i1 [[COND2]], label [[LOOP1]], label [[BB1:%.*]]
 ; NEWGVN:       BB1:
 ; NEWGVN-NEXT:    br i1 [[COND1:%.*]], label [[BB2:%.*]], label [[BB3:%.*]]
 ; NEWGVN:       BB2:
-; NEWGVN-NEXT:    [[V4:%.*]] = load i64, i64* [[P]], align 4
 ; NEWGVN-NEXT:    br label [[LOOP2:%.*]]
 ; NEWGVN:       BB3:
 ; NEWGVN-NEXT:    br label [[LOOP2]]
 ; NEWGVN:       Loop2:
-; NEWGVN-NEXT:    [[INDEX2:%.*]] = phi i64 [ [[V4]], [[BB2]] ], [ 1, [[BB3]] ], [ [[INDEX2_INC:%.*]], [[LOOP2]] ]
+; NEWGVN-NEXT:    [[INDEX2:%.*]] = phi i64 [ [[TMP1]], [[BB2]] ], [ 1, [[BB3]] ], [ [[INDEX2_INC:%.*]], [[LOOP2]] ]
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i64* [[P]] to <2 x i64>*
-; NEWGVN-NEXT:    [[V5:%.*]] = load <2 x i64>, <2 x i64>* [[P2]], align 16
-; NEWGVN-NEXT:    [[V6:%.*]] = extractelement <2 x i64> [[V5]], i64 1
-; NEWGVN-NEXT:    [[V7:%.*]] = load i64, i64* [[P]], align 4
+; NEWGVN-NEXT:    [[V6:%.*]] = extractelement <2 x i64> [[TMP3]], i64 1
 ; NEWGVN-NEXT:    [[V8:%.*]] = add i64 [[V6]], [[INDEX2]]
-; NEWGVN-NEXT:    [[V9:%.*]] = add i64 [[V8]], [[V7]]
+; NEWGVN-NEXT:    [[V9:%.*]] = add i64 [[V8]], [[TMP1]]
 ; NEWGVN-NEXT:    [[INDEX2_INC]] = add i64 [[INDEX2]], 1
 ; NEWGVN-NEXT:    [[COND3:%.*]] = icmp ne i64 [[INDEX2_INC]], [[TC2:%.*]]
 ; NEWGVN-NEXT:    br i1 [[COND3]], label [[LOOP2]], label [[EXIT:%.*]]
 ; NEWGVN:       Exit:
 ; NEWGVN-NEXT:    ret i64 [[V9]]
 ;
 Entry:
   br label %Loop1

 ; NEWGVN-NEXT:    [[INDEX:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[INDEX_INC:%.*]], [[LOOP]] ]
 ; NEWGVN-NEXT:    [[V1:%.*]] = load i64, i64* [[P:%.*]], align 4
 ; NEWGVN-NEXT:    [[P1:%.*]] = bitcast i64* [[P]] to <4 x i64>*
 ; NEWGVN-NEXT:    [[I1:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX]], i32 0
 ; NEWGVN-NEXT:    [[I2:%.*]] = insertelement <4 x i64> [[I1]], i64 [[INDEX]], i32 1
 ; NEWGVN-NEXT:    [[I3:%.*]] = insertelement <4 x i64> [[I2]], i64 100, i32 2
 ; NEWGVN-NEXT:    [[I4:%.*]] = insertelement <4 x i64> [[I3]], i64 1000, i32 3
 ; NEWGVN-NEXT:    store <4 x i64> [[I4]], <4 x i64>* [[P1]], align 32
+; NEWGVN-NEXT:    [[TMP0:%.*]] = bitcast <4 x i64> [[I4]] to i256
+; NEWGVN-NEXT:    [[TMP1:%.*]] = trunc i256 [[TMP0]] to i128
+; NEWGVN-NEXT:    [[TMP2:%.*]] = bitcast i128 [[TMP1]] to <2 x i64>
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i64* [[P]] to <2 x i64>*
-; NEWGVN-NEXT:    [[V2:%.*]] = load <2 x i64>, <2 x i64>* [[P2]], align 16
-; NEWGVN-NEXT:    [[V3:%.*]] = extractelement <2 x i64> [[V2]], i64 1
+; NEWGVN-NEXT:    [[V3:%.*]] = extractelement <2 x i64> [[TMP2]], i64 1
 ; NEWGVN-NEXT:    [[V4:%.*]] = add i64 [[V1]], [[V3]]
 ; NEWGVN-NEXT:    [[INDEX_INC]] = add i64 [[INDEX]], 1
 ; NEWGVN-NEXT:    [[COND:%.*]] = icmp ne i64 [[INDEX_INC]], [[TC:%.*]]
 ; NEWGVN-NEXT:    br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]]
 ; NEWGVN:       Exit:
 ; NEWGVN-NEXT:    ret i64 [[V4]]
 ;
 Entry:

 ; NEWGVN-NEXT:  Entry:
 ; NEWGVN-NEXT:    br label [[LOOP:%.*]]
 ; NEWGVN:       Loop:
 ; NEWGVN-NEXT:    [[INDEX:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[INDEX_INC:%.*]], [[LOOP_LATCH:%.*]] ]
 ; NEWGVN-NEXT:    [[P1:%.*]] = bitcast i64* [[P:%.*]] to <4 x i64>*
 ; NEWGVN-NEXT:    [[V1:%.*]] = load <4 x i64>, <4 x i64>* [[P1]], align 32
 ; NEWGVN-NEXT:    [[I1:%.*]] = insertelement <4 x i64> [[V1]], i64 [[INDEX]], i32 1
 ; NEWGVN-NEXT:    store <4 x i64> [[I1]], <4 x i64>* [[P1]], align 32
+; NEWGVN-NEXT:    [[TMP0:%.*]] = bitcast <4 x i64> [[I1]] to i256
+; NEWGVN-NEXT:    [[TMP1:%.*]] = trunc i256 [[TMP0]] to i64
 ; NEWGVN-NEXT:    br i1 [[COND1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]]
 ; NEWGVN:       BB1:
 ; NEWGVN-NEXT:    br label [[BB3:%.*]]
 ; NEWGVN:       BB2:
-; NEWGVN-NEXT:    [[V2:%.*]] = load i64, i64* [[P]], align 4
 ; NEWGVN-NEXT:    br label [[BB3]]
 ; NEWGVN:       BB3:
-; NEWGVN-NEXT:    [[PHI:%.*]] = phi i64 [ 100, [[BB1]] ], [ [[V2]], [[BB2]] ]
+; NEWGVN-NEXT:    [[PHI:%.*]] = phi i64 [ 100, [[BB1]] ], [ [[TMP1]], [[BB2]] ]
 ; NEWGVN-NEXT:    [[V3:%.*]] = add i64 [[PHI]], [[INDEX]]
 ; NEWGVN-NEXT:    br label [[LOOP_LATCH]]
 ; NEWGVN:       Loop.Latch:
 ; NEWGVN-NEXT:    [[INDEX_INC]] = add i64 [[INDEX]], 1
 ; NEWGVN-NEXT:    [[COND2:%.*]] = icmp ne i64 [[INDEX_INC]], [[TC:%.*]]
 ; NEWGVN-NEXT:    br i1 [[COND2]], label [[LOOP]], label [[EXIT:%.*]]
 ; NEWGVN:       Exit:
 ; NEWGVN-NEXT:    ret i64 [[V3]]

 ; OLDGVN-NEXT:    ret i32 [[V5]]
 ;
 ; NEWGVN-LABEL: @test55(
 ; NEWGVN-NEXT:  Entry:
 ; NEWGVN-NEXT:    br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
 ; NEWGVN:       T:
 ; NEWGVN-NEXT:    [[P1:%.*]] = bitcast i32* [[P:%.*]] to <2 x i32>*
 ; NEWGVN-NEXT:    store <2 x i32> [[V1:%.*]], <2 x i32>* [[P1]], align 4
-; NEWGVN-NEXT:    [[V3:%.*]] = load i32, i32* [[P]], align 4
+; NEWGVN-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V1]] to i64
+; NEWGVN-NEXT:    [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32
 ; NEWGVN-NEXT:    br label [[EXIT:%.*]]
 ; NEWGVN:       F:
 ; NEWGVN-NEXT:    [[P2:%.*]] = bitcast i32* [[P]] to <4 x i32>*
 ; NEWGVN-NEXT:    store <4 x i32> [[V2:%.*]], <4 x i32>* [[P2]], align 4
-; NEWGVN-NEXT:    [[V4:%.*]] = load i32, i32* [[P]], align 4
+; NEWGVN-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[V2]] to i128
+; NEWGVN-NEXT:    [[TMP3:%.*]] = trunc i128 [[TMP2]] to i32
 ; NEWGVN-NEXT:    br label [[EXIT]]
 ; NEWGVN:       Exit:
-; NEWGVN-NEXT:    [[PHI:%.*]] = phi i32 [ [[V3]], [[T]] ], [ [[V4]], [[F]] ]
+; NEWGVN-NEXT:    [[PHI:%.*]] = phi i32 [ [[TMP1]], [[T]] ], [ [[TMP3]], [[F]] ]
 ; NEWGVN-NEXT:    [[V5:%.*]] = load i32, i32* [[P]], align 4
 ; NEWGVN-NEXT:    ret i32 [[V5]]
 ;
 Entry:
   br i1 %Cond, label %T, label %F
 
 T:
   %P1 = bitcast i32* %P to <2 x i32>*

llvm/test/Transforms/NewGVN/pr14166-xfail.ll

-; XFAIL: *
 ; RUN: opt -disable-basic-aa -passes=newgvn -S < %s | FileCheck %s
 ; NewGVN fails this due to missing load coercion
 target datalayout = "e-p:32:32:32"
 target triple = "i386-pc-linux-gnu"
 define <2 x i32> @test1() {
   %v1 = alloca <2 x i32>
   call void @anything(<2 x i32>* %v1)
   %v2 = load <2 x i32>, <2 x i32>* %v1