[AMDGPU] Remove redundand RequiredAlignment assignment. NFCI.

[foad]

Thanks!

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

1553

Not sure why the comment mentions gfx8. Even on later archs the requirement is for 16-byte alignment if you set strict alignment mode.

[rampitec]

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

1553

I left it as is, but it suggests on VI this was required even with unaligned access enabled. From my recollections this is not true, but I would not bet on it until I dig the specs. Moreover, I believe unaligned access was legal with a proper setting since CI, but that needs a doc excavations. I would have to dig around the shelve to find a Bonaire or Fiji to check, so I just left it as is for now. This is really something like a couple days of work to check with a little benefit.

[foad]

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

1553

This is really something like a couple days of work to check with a little benefit.

Understood! :)

[rampitec]

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

1553

Moreover, I shall have Fiji around, Bonaire in a radius of 60 miles and I don't even remember if I have a Tahiti handy anywhere. Too much for fixing someone's comment ;)

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

case 64:
       // can do a 4 byte aligned, 8 byte access in a single operation using
       // ds_read2/write2_b32 with adjacent offsets.
       RequiredAlignment = Align(4);
       break;
     case 96:
       if (!Subtarget->hasDS96AndDS128())
         return false;
 
       // 12 byte accessing via ds_read/write_b96 require 16-byte alignment on
       // gfx8 and older.
-      RequiredAlignment = Align(16);
 
       if (Subtarget->hasUnalignedDSAccessEnabled()) {
         // Naturally aligned access is fastest. However, also report it is Fast
         // if memory is aligned less than DWORD. A narrow load or store will be
         // be equally slow as a single ds_read_b96/ds_write_b96, but there will
         // be more of them, so overall we will pay less penalty issuing a single
         // instruction.
         if (IsFast)