It was only handled for FLAT initially because we did not have
unaligned DS instructions lowering. Now it is implemented but
the bug is not handled.
Details
Details
Diff Detail
Diff Detail
Event Timeline
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir | ||
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4 | Should this get a runline with and without cumode? |
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir | ||
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4 | It does not make sense, this must be legalized and test only runs selector. |
Should this get a runline with and without cumode?