[PowerPC] Add support for the canonical version of tlbie

[void]

Summary

The tlbie instruction's canonical form accepts five operands, with the
extended form accepts two operands. Make the 2-operand form an alias of
the canonical form.

A single operand form isn't described, but it's accepted by GAS, so
accept it here as an alias.

This is related to https://reviews.llvm.org/D92156.

[void]

Don't allow 1-op form.

[void]

Add comment about POWER6 and tlbie with one operand.

[void]

Accidental update fixed.

[shchenz]

I made a search in Power6 ~ Power10 ISAs, the instruction format for tlbie is like:
1: Power10/Power9:

tlbie RB,RS,RIC,PRS,R

Extended mnemonic for tlbie:
tlbie RB,RS -> tlbie RB,RS,0,0,0

2: Power7/Power8:

tlbie RB,RS

3: Power6:

tlbie RB,L   (L is 1bit as 0 or 1, but it is also an operand).

These formats should all be backward compatible.

So for this patch, can we use different instruction definitions for different Power versions?

llvm/lib/Target/PowerPC/PPCInstrInfo.td

4628

This seems not right. Power7/Power8 does not have 5 operands tlbie? They only support the left one.

llvm/lib/Target/PowerPC/PPCInstrFormats.td

 
 class XForm_rs<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
               InstrItinClass itin, list<dag> pattern>
   : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
   let A = 0;
   let B = 0;
 }
 
+class XForm_tlbie<bits<10> xo, dag OOL, dag IOL, string asmstr,
+              InstrItinClass itin, list<dag> pattern>
+  : XForm_base_r3xo<31, xo, OOL, IOL, asmstr, itin, pattern> {
+  let RST = 0;
+  let A = 0;
+  let B = 0;
+
+  bits<5> RS;
+  bits<2> RIC;
+  bits<1> PRS;
+  bits<1> R;
+  bits<5> RB;
+
+  let Pattern = pattern;
+
+  let Inst{6-10}  = RS;
+  let Inst{11}    = 0;
+  let Inst{12-13} = RIC;
+  let Inst{14}    = PRS;
+  let Inst{15}    = R;
+  let Inst{16-20} = RB;
+  let Inst{21-30} = xo;
+  let Inst{31}    = 0;
+}
+
 class XForm_tlbws<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
               InstrItinClass itin, list<dag> pattern>
   : I<opcode, OOL, IOL, asmstr, itin> {
   bits<5> RST;
   bits<5> A;
   bits<1> WS;
 
   let Pattern = pattern;

llvm/lib/Target/PowerPC/PPCInstrInfo.td

 def TLBIEL : XForm_16b<31, 274, (outs), (ins gprc:$RB),
                           "tlbiel $RB", IIC_SprTLBIEL, []>;
 
 def TLBLD : XForm_16b<31, 978, (outs), (ins gprc:$RB),
                           "tlbld $RB", IIC_LdStLoad, []>, Requires<[IsPPC6xx]>;
 def TLBLI : XForm_16b<31, 1010, (outs), (ins gprc:$RB),
                           "tlbli $RB", IIC_LdStLoad, []>, Requires<[IsPPC6xx]>;
 
-def TLBIE : XForm_26<31, 306, (outs), (ins gprc:$RS, gprc:$RB),
-                          "tlbie $RB,$RS", IIC_SprTLBIE, []>;
+def TLBIE : XForm_tlbie<306, (outs),
+                        (ins gprc:$RS, gprc:$RB, i32imm:$RIC, i1imm:$PRS, i1imm:$R),
+                           "tlbie $RB, $RS, $RIC, $PRS, $R", IIC_SprTLBIE, []>;
 
 def TLBSX : XForm_tlb<914, (outs), (ins gprc:$A, gprc:$B), "tlbsx $A, $B",
                 IIC_LdStLoad>, Requires<[IsBookE]>;
 
 def TLBIVAX : XForm_tlb<786, (outs), (ins gprc:$A, gprc:$B), "tlbivax $A, $B",
                 IIC_LdStLoad>, Requires<[IsBookE]>;
 
 def TLBRE : XForm_24_eieio<31, 946, (outs), (ins),

 def : InstAlias<"mtdccr $Rx", (MTSPR 1018, gprc:$Rx)>, Requires<[IsPPC4xx]>;
 def : InstAlias<"mfdccr $Rx", (MFSPR gprc:$Rx, 1018)>, Requires<[IsPPC4xx]>;
 
 def : InstAlias<"mticcr $Rx", (MTSPR 1019, gprc:$Rx)>, Requires<[IsPPC4xx]>;
 def : InstAlias<"mficcr $Rx", (MFSPR gprc:$Rx, 1019)>, Requires<[IsPPC4xx]>;
 
 }
 
-def : InstAlias<"tlbie $RB", (TLBIE R0, gprc:$RB)>;
+def : InstAlias<"tlbie $RB, $RS", (TLBIE gprc:$RS, gprc:$RB, 0, 0, 0)>;
 
 def : InstAlias<"tlbrehi $RS, $A", (TLBRE2 gprc:$RS, gprc:$A, 0)>,
                 Requires<[IsPPC4xx]>;
 def : InstAlias<"tlbrelo $RS, $A", (TLBRE2 gprc:$RS, gprc:$A, 1)>,
                 Requires<[IsPPC4xx]>;
 def : InstAlias<"tlbwehi $RS, $A", (TLBWE2 gprc:$RS, gprc:$A, 0)>,
                 Requires<[IsPPC4xx]>;
 def : InstAlias<"tlbwelo $RS, $A", (TLBWE2 gprc:$RS, gprc:$A, 1)>,

llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s

 # CHECK-BE: tlbsync                         # encoding: [0x7c,0x00,0x04,0x6c]
 # CHECK-LE: tlbsync                         # encoding: [0x6c,0x04,0x00,0x7c]
             tlbsync
 
 # CHECK-BE: tlbiel 4                        # encoding: [0x7c,0x00,0x22,0x24]
 # CHECK-LE: tlbiel 4                        # encoding: [0x24,0x22,0x00,0x7c]
             tlbiel %r4
 
-# CHECK-BE: tlbie 4                         # encoding: [0x7c,0x00,0x22,0x64]
-# CHECK-LE: tlbie 4                         # encoding: [0x64,0x22,0x00,0x7c]
+# Note that the one-operand version of "tlbie" is accepted by POWER6, but seems
+# to be invalid for later POWER versions.
+
+# CHECK-BE: tlbie 4, 0                      # encoding: [0x7c,0x00,0x22,0x64]
+# CHECK-LE: tlbie 4, 0                      # encoding: [0x64,0x22,0x00,0x7c]
+            tlbie %r4, %r0, 0, 0, 0
+
+# CHECK-BE: tlbie 4, 0                      # encoding: [0x7c,0x00,0x22,0x64]
+# CHECK-LE: tlbie 4, 0                      # encoding: [0x64,0x22,0x00,0x7c]
             tlbie %r4, 0
 
-# CHECK-BE: tlbie 4                         # encoding: [0x7c,0x00,0x22,0x64]
-# CHECK-LE: tlbie 4                         # encoding: [0x64,0x22,0x00,0x7c]
-            tlbie %r4
+# CHECK-BE: tlbie 10, 0                     # encoding: [0x7c,0x00,0x52,0x64]
+# CHECK-LE: tlbie 10, 0                     # encoding: [0x64,0x52,0x00,0x7c]
+            tlbie %r10, 0
+
+# CHECK-BE: tlbie 10, 0                     # encoding: [0x7c,0x00,0x52,0x64]
+# CHECK-LE: tlbie 10, 0                     # encoding: [0x64,0x52,0x00,0x7c]
+            tlbie %r10, %r0
+
+# CHECK-BE: tlbie 10, 1                     # encoding: [0x7c,0x20,0x52,0x64]
+# CHECK-LE: tlbie 10, 1                     # encoding: [0x64,0x52,0x20,0x7c]
+            tlbie %r10, %r1
+
+# CHECK-BE: tlbie 10, 11                    # encoding: [0x7d,0x60,0x52,0x64]
+# CHECK-LE: tlbie 10, 11                    # encoding: [0x64,0x52,0x60,0x7d]
+            tlbie %r10, %r11
+
+# CHECK-BE: tlbie 3, 4                      # encoding: [0x7c,0x80,0x1a,0x64]
+# CHECK-LE: tlbie 3, 4                      # encoding: [0x64,0x1a,0x80,0x7c]
+            tlbie %r3, %r4
+
+# CHECK-BE: tlbie 3, 4                      # encoding: [0x7c,0x80,0x1a,0x64]
+# CHECK-LE: tlbie 3, 4                      # encoding: [0x64,0x1a,0x80,0x7c]
+            tlbie %r3, %r4, 0, 0, 0
+
+# CHECK-BE: tlbie 3, 4, 3, 1, 1             # encoding: [0x7c,0x8f,0x1a,0x64]
+# CHECK-LE: tlbie 3, 4, 3, 1, 1             # encoding: [0x64,0x1a,0x8f,0x7c]
+            tlbie %r3, %r4, 3, 1, 1
 
 # CHECK-BE: rfi                             # encoding: [0x4c,0x00,0x00,0x64]
 # CHECK-LE: rfi                             # encoding: [0x64,0x00,0x00,0x4c]
             rfi
 # CHECK-BE: rfci                            # encoding: [0x4c,0x00,0x00,0x66]
 # CHECK-LE: rfci                            # encoding: [0x66,0x00,0x00,0x4c]
             rfci