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[InstCombine] generalize 2 LSB of demanded bits for X*X
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Authored by spatel on Feb 7 2022, 7:06 AM.

Details

Summary

This is a follow-up suggested in D119060. Instead of checking each of the bottom 2 bits individually, we can check them together and handle the possibility that we demand both together.

https://alive2.llvm.org/ce/z/C2ihC2

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Event Timeline

spatel created this revision.Feb 7 2022, 7:06 AM
spatel requested review of this revision.Feb 7 2022, 7:06 AM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 7 2022, 7:06 AM

Please can you update the DAG version as well? Either in this patch or a followup.

lebedev.ri accepted this revision.Feb 7 2022, 7:26 AM

Thanks, LG.

This revision is now accepted and ready to land.Feb 7 2022, 7:26 AM
spatel added a comment.Feb 7 2022, 8:05 AM

Please can you update the DAG version as well? Either in this patch or a followup.

Sure - I'll push this one and then update DAG tests/logic to correspond.

This revision was landed with ongoing or failed builds.Feb 7 2022, 8:35 AM
This revision was automatically updated to reflect the committed changes.