[lldb] [gdb-remote] Support client fallback for servers without reg defs

[mgorny]

Summary

Provide minimal register definition defaults for working with servers
that implement neither target.xml nor qRegisterInfo packets. This is
useful e.g. when interacting with FreeBSD's kernel minimal gdbserver
that does not send target.xml but uses the same layout for its supported
register subset as GDB.

The prerequisite for this is the ability to determine the correct
architecture, e.g. from the target executable.

[mgorny]

Improve macro formatting while it's still hot.

[mgorny]

Simplify the macros. Add a test.

[labath]

This looks pretty okay I'd say. I might consider putting the actual definitions into a separate cpp file, simply because it's easy, and ProcessGDBRemote.cpp is already too big.

lldb/test/API/functionalities/gdb_remote_client/amd64-fallback-regs.FileCheck

1

I actually think it would be better if this was defined inline in the python file, as then you could intersperse these lines with the definitions (which you have already formatted in a way that makes this easy), and it would be immediately obvious that the two lines describe the same data (modulo endianness).

[mgorny]

lldb/test/API/functionalities/gdb_remote_client/amd64-fallback-regs.FileCheck

1

Using self.match, writing into a temporary file for FileCheck or do you have some other testing method on your mind?

[mgorny]

Inline FileCheck input in the test file.

[mgorny]

Split the new code into a separate file.

[mgorny]

Add aarch64.

[mgorny]

Added i386.

I suppose this concludes all my ideas so far.

lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp

static size_t SplitCommaSeparatedRegisterNumberString(
   for (llvm::StringRef x : llvm::split(comma_separated_register_numbers, ',')) {
     uint32_t reg;
     if (llvm::to_integer(x, reg, base))
       regnums.push_back(reg);
   }
   return regnums.size();
 }
 
+static std::vector<DynamicRegisterInfo::Register> GetRegisters_x86_64() {
+  ConstString empty_alt_name;
+  ConstString reg_set{"general purpose registers"};
+
+#define REG(name, size)                                                        \
+  DynamicRegisterInfo::Register {                                              \
+    ConstString(#name), empty_alt_name, reg_set, size, LLDB_INVALID_INDEX32,   \
+        lldb::eEncodingUint, lldb::eFormatHex, LLDB_INVALID_REGNUM,            \
+        LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, {}, {}  \
+  }
+#define R64(name) REG(name, 8)
+#define R32(name) REG(name, 4)
+
+  std::vector<DynamicRegisterInfo::Register> registers{
+      R64(rax), R64(rbx), R64(rcx), R64(rdx), R64(rsi), R64(rdi),
+      R64(rbp), R64(rsp), R64(r8),  R64(r9),  R64(r10), R64(r11),
+      R64(r12), R64(r13), R64(r14), R64(r15), R64(rip), R32(eflags),
+      R32(cs),  R32(ss),  R32(ds),  R32(es),  R32(fs),  R32(gs),
+  };
+
+#undef R32
+#undef R64
+#undef REG
+
+  return registers;
+}
+
 void ProcessGDBRemote::BuildDynamicRegisterInfo(bool force) {
   if (!force && m_register_info_sp)
     return;
 
   m_register_info_sp = std::make_shared<GDBRemoteDynamicRegisterInfo>();
 
   // Check if qHostInfo specified a specific packet timeout for this
   // connection. If so then lets update our setting so the user knows what the
   // timeout is and can see it.
   const auto host_packet_timeout = m_gdb_comm.GetHostDefaultPacketTimeout();
   if (host_packet_timeout > std::chrono::seconds(0)) {
     GetGlobalPluginProperties().SetPacketTimeout(host_packet_timeout.count());
   }
 
   // Register info search order:
   //     1 - Use the target definition python file if one is specified.
   //     2 - If the target definition doesn't have any of the info from the
   //     target.xml (registers) then proceed to read the target.xml.
   //     3 - Fall back on the qRegisterInfo packets.
+  //     4 - Use hardcoded defaults if available.
 
   FileSpec target_definition_fspec =
       GetGlobalPluginProperties().GetTargetDefinitionFile();
   if (!FileSystem::Instance().Exists(target_definition_fspec)) {
     // If the filename doesn't exist, it may be a ~ not having been expanded -
     // try to resolve it.
     FileSystem::Instance().Resolve(target_definition_fspec);
   }
if (m_gdb_comm.SendPacketAndWaitForResponse(packet, response) ==
       } else {
         break; // ensure exit before reg_num is incremented
       }
     } else {
       break;
     }
   }
 
+  if (registers.empty()) {
+    switch (arch_to_use.GetMachine()) {
+    case llvm::Triple::x86:
+      break;
+    case llvm::Triple::x86_64:
+      registers = GetRegisters_x86_64();
+      break;
+    default:
+      break;
+    }
+  }
+
   AddRemoteRegisters(registers, arch_to_use);
 }
 
 Status ProcessGDBRemote::WillLaunch(lldb_private::Module *module) {
   return WillLaunchOrAttach();
 }
 
 Status ProcessGDBRemote::WillAttachToProcessWithID(lldb::pid_t pid) {

lldb/test/API/functionalities/gdb_remote_client/TestGDBServerNoTargetXML.py

+from __future__ import print_function
+import lldb
+from lldbsuite.test.lldbtest import *
+from lldbsuite.test.decorators import *
+from lldbsuite.test.gdbclientutils import *
+from lldbsuite.test.lldbgdbclient import GDBRemoteTestBase
+
+
+class TestGDBServerTargetXML(GDBRemoteTestBase):
+
+    mydir = TestBase.compute_mydir(__file__)
+
+    @skipIfRemote
+    @skipIfLLVMTargetMissing("X86")
+    def test_x86_64_regs(self):
+        """Test grabbing various x86_64 registers from gdbserver."""
+        class MyResponder(MockGDBServerResponder):
+            reg_data = (
+                "0102030405060708"  # rax
+                "1112131415161718"  # rbx
+                "2122232425262728"  # rcx
+                "3132333435363738"  # rdx
+                "4142434445464748"  # rsi
+                "5152535455565758"  # rdi
+                "6162636465666768"  # rbp
+                "7172737475767778"  # rsp
+                "8182838485868788"  # r8
+                "9192939495969798"  # r9
+                "a1a2a3a4a5a6a7a8"  # r10
+                "b1b2b3b4b5b6b7b8"  # r11
+                "c1c2c3c4c5c6c7c8"  # r12
+                "d1d2d3d4d5d6d7d8"  # r13
+                "e1e2e3e4e5e6e7e8"  # r14
+                "f1f2f3f4f5f6f7f8"  # r15
+                "090a0b0c0d0e0f10"  # rip
+                "191a1b1c"  # eflags
+                "292a2b2c"  # cs
+                "393a3b3c"  # ss
+            )
+
+            def readRegister(self, regnum):
+                return ""
+
+            def readRegisters(self):
+                return self.reg_data
+
+            def writeRegisters(self, reg_hex):
+                self.reg_data = reg_hex
+                return "OK"
+
+            def haltReason(self):
+                return "T02thread:1ff0d;threads:1ff0d;thread-pcs:000000010001bc00;07:0102030405060708;10:1112131415161718;"
+
+        self.server.responder = MyResponder()
+
+        target = self.createTarget("basic_eh_frame.yaml")
+        process = self.connect(target)
+        lldbutil.expect_state_changes(self, self.dbg.GetListener(), process,
+                                      [lldb.eStateStopped])
+
+        # test all registers
+        self.filecheck("register read --all",
+                       os.path.join(os.path.dirname(__file__),
+                                    "amd64-fallback-regs.FileCheck"))
+
+        # test generic aliases
+        self.match("register read arg4",
+                   ["rcx = 0x2827262524232221"])
+        self.match("register read arg3",
+                   ["rdx = 0x3837363534333231"])
+        self.match("register read arg2",
+                   ["rsi = 0x4847464544434241"])
+        self.match("register read arg1",
+                   ["rdi = 0x5857565554535251"])
+        self.match("register read fp",
+                   ["rbp = 0x6867666564636261"])
+        self.match("register read sp",
+                   ["rsp = 0x7877767574737271"])
+        self.match("register read arg5",
+                   ["r8 = 0x8887868584838281"])
+        self.match("register read arg6",
+                   ["r9 = 0x9897969594939291"])
+        self.match("register read pc",
+                   ["rip = 0x100f0e0d0c0b0a09"])
+        self.match("register read flags",
+                   ["eflags = 0x1c1b1a19"])

lldb/test/API/functionalities/gdb_remote_client/amd64-fallback-regs.FileCheck

+CHECK-DAG: rax = 0x0807060504030201
+CHECK-DAG: rbx = 0x1817161514131211
+CHECK-DAG: rcx = 0x2827262524232221
+CHECK-DAG: rdx = 0x3837363534333231
+CHECK-DAG: rsi = 0x4847464544434241
+CHECK-DAG: rdi = 0x5857565554535251
+CHECK-DAG: rbp = 0x6867666564636261
+CHECK-DAG: rsp = 0x7877767574737271
+CHECK-DAG: r8 = 0x8887868584838281
+CHECK-DAG: r9 = 0x9897969594939291
+CHECK-DAG: r10 = 0xa8a7a6a5a4a3a2a1
+CHECK-DAG: r11 = 0xb8b7b6b5b4b3b2b1
+CHECK-DAG: r12 = 0xc8c7c6c5c4c3c2c1
+CHECK-DAG: r13 = 0xd8d7d6d5d4d3d2d1
+CHECK-DAG: r14 = 0xe8e7e6e5e4e3e2e1
+CHECK-DAG: r15 = 0xf8f7f6f5f4f3f2f1
+CHECK-DAG: rip = 0x100f0e0d0c0b0a09
+CHECK-DAG: eflags = 0x1c1b1a19
+CHECK-DAG: cs = 0x2c2b2a29
+CHECK-DAG: ss = 0x3c3b3a39
+
+CHECK-DAG: eax = 0x04030201
+CHECK-DAG: ebx = 0x14131211
+CHECK-DAG: ecx = 0x24232221
+CHECK-DAG: edx = 0x34333231
+CHECK-DAG: esi = 0x44434241
+CHECK-DAG: edi = 0x54535251
+CHECK-DAG: ebp = 0x64636261
+CHECK-DAG: esp = 0x74737271
+CHECK-DAG: r8d = 0x84838281
+CHECK-DAG: r9d = 0x94939291
+CHECK-DAG: r10d = 0xa4a3a2a1
+CHECK-DAG: r11d = 0xb4b3b2b1
+CHECK-DAG: r12d = 0xc4c3c2c1
+CHECK-DAG: r13d = 0xd4d3d2d1
+CHECK-DAG: r14d = 0xe4e3e2e1
+CHECK-DAG: r15d = 0xf4f3f2f1
+
+CHECK-DAG: ax = 0x0201
+CHECK-DAG: bx = 0x1211
+CHECK-DAG: cx = 0x2221
+CHECK-DAG: dx = 0x3231
+CHECK-DAG: si = 0x4241
+CHECK-DAG: di = 0x5251
+CHECK-DAG: bp = 0x6261
+CHECK-DAG: sp = 0x7271
+CHECK-DAG: r8w = 0x8281
+CHECK-DAG: r9w = 0x9291
+CHECK-DAG: r10w = 0xa2a1
+CHECK-DAG: r11w = 0xb2b1
+CHECK-DAG: r12w = 0xc2c1
+CHECK-DAG: r13w = 0xd2d1
+CHECK-DAG: r14w = 0xe2e1
+CHECK-DAG: r15w = 0xf2f1
+
+CHECK-DAG: ah = 0x02
+CHECK-DAG: bh = 0x12
+CHECK-DAG: ch = 0x22
+CHECK-DAG: dh = 0x32
+
+CHECK-DAG: al = 0x01
+CHECK-DAG: bl = 0x11
+CHECK-DAG: cl = 0x21
+CHECK-DAG: dl = 0x31
+CHECK-DAG: sil = 0x41
+CHECK-DAG: dil = 0x51
+CHECK-DAG: bpl = 0x61
+CHECK-DAG: spl = 0x71
+CHECK-DAG: r8l = 0x81
+CHECK-DAG: r9l = 0x91
+CHECK-DAG: r10l = 0xa1
+CHECK-DAG: r11l = 0xb1
+CHECK-DAG: r12l = 0xc1
+CHECK-DAG: r13l = 0xd1
+CHECK-DAG: r14l = 0xe1
+CHECK-DAG: r15l = 0xf1