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Differential D113567

[RISCV][test] Add more tests of immediate materialisation
ClosedPublic

Authored by benshi001 on Nov 10 2021, 7:19 AM.

Details

Reviewers
craig.topper
luismarques
asb
Commits
rG39256ed58ce9: [RISCV][test] Add more tests of immediate materialisation

Diff Detail

Event Timeline

benshi001 created this revision.Nov 10 2021, 7:19 AM
Herald added subscribers: VincentWu, luke957, achieveartificialintelligence and 24 others. · View Herald TranscriptNov 10 2021, 7:19 AM
benshi001 requested review of this revision.Nov 10 2021, 7:19 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 10 2021, 7:19 AM
Herald added subscribers: llvm-commits, MaskRay. · View Herald Transcript
benshi001 added a child revision: D113568: [RISCV] Optimize immediate materialisation with SH*ADD.Nov 10 2021, 7:20 AM
Harbormaster completed remote builds in B133474: Diff 386152.Nov 10 2021, 8:02 AM
craig.topper requested changes to this revision.Nov 10 2021, 3:40 PM
craig.topper added inline comments.
llvm/test/MC/RISCV/rv64zba-aliases-valid.s
120

NOALIASZBS isn't a valid check prefix for this file. It's just NOALIAS.

This revision now requires changes to proceed.Nov 10 2021, 3:40 PM
benshi001 updated this revision to Diff 386378.Nov 10 2021, 5:39 PM
benshi001 marked an inline comment as done.
Harbormaster completed remote builds in B133632: Diff 386378.Nov 10 2021, 6:19 PM
luismarques accepted this revision.Nov 11 2021, 1:45 AM

Can you please just add a comment (or rename the functions) with the hex values of those decimal literals? I can't do base conversion of large numbers in my head.
Otherwise LGTM.

benshi001 updated this revision to Diff 386480.Nov 11 2021, 4:59 AM
In D113567#3123952, @luismarques wrote:

Can you please just add a comment (or rename the functions) with the hex values of those decimal literals? I can't do base conversion of large numbers in my head.
Otherwise LGTM.

Done. Hex values are attached as comments. Thanks.

Harbormaster completed remote builds in B133695: Diff 386480.Nov 11 2021, 5:38 AM
craig.topper accepted this revision.Nov 15 2021, 11:31 AM

LGTM

This revision is now accepted and ready to land.Nov 15 2021, 11:31 AM
Closed by commit rG39256ed58ce9: [RISCV][test] Add more tests of immediate materialisation (authored by benshi001). · Explain WhyNov 15 2021, 3:34 PM
This revision was automatically updated to reflect the committed changes.
benshi001 added a commit: rG39256ed58ce9: [RISCV][test] Add more tests of immediate materialisation.

Revision Contents

PathSize
llvm/
test/
CodeGen/
RISCV/
167 lines
MC/
RISCV/
50 lines

Diff 387425

llvm/test/CodeGen/RISCV/imm.ll

Show First 20 Lines • Show All 1,687 Lines • ▼ Show 20 Lines
; RV64IZBS-NEXT: addiw a0, a0, -1093 ; RV64IZBS-NEXT: addiw a0, a0, -1093
; RV64IZBS-NEXT: slli a0, a0, 12 ; RV64IZBS-NEXT: slli a0, a0, 12
; RV64IZBS-NEXT: addi a0, a0, 273 ; RV64IZBS-NEXT: addi a0, a0, 273
; RV64IZBS-NEXT: slli a0, a0, 12 ; RV64IZBS-NEXT: slli a0, a0, 12
; RV64IZBS-NEXT: addi a0, a0, 273 ; RV64IZBS-NEXT: addi a0, a0, 273
; RV64IZBS-NEXT: ret ; RV64IZBS-NEXT: ret
ret i64 12900925247761 ret i64 12900925247761
} }
define i64 @imm_7158272001() {
; RV32I-LABEL: imm_7158272001:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a0, 699049
; RV32I-NEXT: addi a0, a0, 1
; RV32I-NEXT: addi a1, zero, 1
; RV32I-NEXT: ret
;
; RV64I-LABEL: imm_7158272001:
; RV64I: # %bb.0:
; RV64I-NEXT: lui a0, 427
; RV64I-NEXT: addiw a0, a0, -1367
; RV64I-NEXT: slli a0, a0, 12
; RV64I-NEXT: addi a0, a0, 1
; RV64I-NEXT: ret
;
; RV64IZBA-LABEL: imm_7158272001:
; RV64IZBA: # %bb.0:
; RV64IZBA-NEXT: lui a0, 427
; RV64IZBA-NEXT: addiw a0, a0, -1367
; RV64IZBA-NEXT: slli a0, a0, 12
; RV64IZBA-NEXT: addi a0, a0, 1
; RV64IZBA-NEXT: ret
;
; RV64IZBS-LABEL: imm_7158272001:
; RV64IZBS: # %bb.0:
; RV64IZBS-NEXT: lui a0, 427
; RV64IZBS-NEXT: addiw a0, a0, -1367
; RV64IZBS-NEXT: slli a0, a0, 12
; RV64IZBS-NEXT: addi a0, a0, 1
; RV64IZBS-NEXT: ret
ret i64 7158272001 ; 0x0000_0001_aaaa_9001
}
define i64 @imm_12884889601() {
; RV32I-LABEL: imm_12884889601:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a0, 1048573
; RV32I-NEXT: addi a0, a0, 1
; RV32I-NEXT: addi a1, zero, 2
; RV32I-NEXT: ret
;
; RV64I-LABEL: imm_12884889601:
; RV64I: # %bb.0:
; RV64I-NEXT: lui a0, 768
; RV64I-NEXT: addiw a0, a0, -3
; RV64I-NEXT: slli a0, a0, 12
; RV64I-NEXT: addi a0, a0, 1
; RV64I-NEXT: ret
;
; RV64IZBA-LABEL: imm_12884889601:
; RV64IZBA: # %bb.0:
; RV64IZBA-NEXT: lui a0, 768
; RV64IZBA-NEXT: addiw a0, a0, -3
; RV64IZBA-NEXT: slli a0, a0, 12
; RV64IZBA-NEXT: addi a0, a0, 1
; RV64IZBA-NEXT: ret
;
; RV64IZBS-LABEL: imm_12884889601:
; RV64IZBS: # %bb.0:
; RV64IZBS-NEXT: lui a0, 768
; RV64IZBS-NEXT: addiw a0, a0, -3
; RV64IZBS-NEXT: slli a0, a0, 12
; RV64IZBS-NEXT: addi a0, a0, 1
; RV64IZBS-NEXT: ret
ret i64 12884889601 ; 0x0000_0002_ffff_d001
}
define i64 @imm_neg_3435982847() {
; RV32I-LABEL: imm_neg_3435982847:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a0, 209713
; RV32I-NEXT: addi a0, a0, 1
; RV32I-NEXT: addi a1, zero, -1
; RV32I-NEXT: ret
;
; RV64I-LABEL: imm_neg_3435982847:
; RV64I: # %bb.0:
; RV64I-NEXT: lui a0, 1048371
; RV64I-NEXT: addiw a0, a0, 817
; RV64I-NEXT: slli a0, a0, 12
; RV64I-NEXT: addi a0, a0, 1
; RV64I-NEXT: ret
;
; RV64IZBA-LABEL: imm_neg_3435982847:
; RV64IZBA: # %bb.0:
; RV64IZBA-NEXT: lui a0, 1048371
; RV64IZBA-NEXT: addiw a0, a0, 817
; RV64IZBA-NEXT: slli a0, a0, 12
; RV64IZBA-NEXT: addi a0, a0, 1
; RV64IZBA-NEXT: ret
;
; RV64IZBS-LABEL: imm_neg_3435982847:
; RV64IZBS: # %bb.0:
; RV64IZBS-NEXT: lui a0, 734001
; RV64IZBS-NEXT: addiw a0, a0, 1
; RV64IZBS-NEXT: bclri a0, a0, 31
; RV64IZBS-NEXT: ret
ret i64 -3435982847 ; 0xffff_ffff_3333_1001
}
define i64 @imm_neg_5726842879() {
; RV32I-LABEL: imm_neg_5726842879:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a0, 698997
; RV32I-NEXT: addi a0, a0, 1
; RV32I-NEXT: addi a1, zero, -2
; RV32I-NEXT: ret
;
; RV64I-LABEL: imm_neg_5726842879:
; RV64I: # %bb.0:
; RV64I-NEXT: lui a0, 1048235
; RV64I-NEXT: addiw a0, a0, -1419
; RV64I-NEXT: slli a0, a0, 12
; RV64I-NEXT: addi a0, a0, 1
; RV64I-NEXT: ret
;
; RV64IZBA-LABEL: imm_neg_5726842879:
; RV64IZBA: # %bb.0:
; RV64IZBA-NEXT: lui a0, 1048235
; RV64IZBA-NEXT: addiw a0, a0, -1419
; RV64IZBA-NEXT: slli a0, a0, 12
; RV64IZBA-NEXT: addi a0, a0, 1
; RV64IZBA-NEXT: ret
;
; RV64IZBS-LABEL: imm_neg_5726842879:
; RV64IZBS: # %bb.0:
; RV64IZBS-NEXT: lui a0, 698997
; RV64IZBS-NEXT: addiw a0, a0, 1
; RV64IZBS-NEXT: bclri a0, a0, 32
; RV64IZBS-NEXT: ret
ret i64 -5726842879 ; 0xffff_fffe_aaa7_5001
}
define i64 @imm_neg_10307948543() {
; RV32I-LABEL: imm_neg_10307948543:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a0, 629139
; RV32I-NEXT: addi a0, a0, 1
; RV32I-NEXT: addi a1, zero, -3
; RV32I-NEXT: ret
;
; RV64I-LABEL: imm_neg_10307948543:
; RV64I: # %bb.0:
; RV64I-NEXT: lui a0, 1047962
; RV64I-NEXT: addiw a0, a0, -1645
; RV64I-NEXT: slli a0, a0, 12
; RV64I-NEXT: addi a0, a0, 1
; RV64I-NEXT: ret
;
; RV64IZBA-LABEL: imm_neg_10307948543:
; RV64IZBA: # %bb.0:
; RV64IZBA-NEXT: lui a0, 1047962
; RV64IZBA-NEXT: addiw a0, a0, -1645
; RV64IZBA-NEXT: slli a0, a0, 12
; RV64IZBA-NEXT: addi a0, a0, 1
; RV64IZBA-NEXT: ret
;
; RV64IZBS-LABEL: imm_neg_10307948543:
; RV64IZBS: # %bb.0:
; RV64IZBS-NEXT: lui a0, 629139
; RV64IZBS-NEXT: addiw a0, a0, 1
; RV64IZBS-NEXT: bclri a0, a0, 33
; RV64IZBS-NEXT: ret
ret i64 -10307948543 ; 0xffff_fffd_9999_3001
}

llvm/test/MC/RISCV/rv64zba-aliases-valid.s

Show First 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
# CHECK-S-OBJ-NOALIAS-NEXT: addiw t1, t1, -1365 # CHECK-S-OBJ-NOALIAS-NEXT: addiw t1, t1, -1365
# CHECK-S-OBJ-NOALIAS-NEXT: slli.uw t1, t1, 12 # CHECK-S-OBJ-NOALIAS-NEXT: slli.uw t1, t1, 12
# CHECK-S-OBJ-NOALIAS-NEXT: addi t1, t1, -1366 # CHECK-S-OBJ-NOALIAS-NEXT: addi t1, t1, -1366
# CHECK-S-OBJ: lui t1, 768955 # CHECK-S-OBJ: lui t1, 768955
# CHECK-S-OBJ-NEXT: addiw t1, t1, -1365 # CHECK-S-OBJ-NEXT: addiw t1, t1, -1365
# CHECK-S-OBJ-NEXT: slli.uw t1, t1, 12 # CHECK-S-OBJ-NEXT: slli.uw t1, t1, 12
# CHECK-S-OBJ-NEXT: addi t1, t1, -1366 # CHECK-S-OBJ-NEXT: addi t1, t1, -1366
li x6, 12900918536874 li x6, 12900918536874
# CHECK-S-OBJ-NOALIAS: lui t1, 427
craig.topperUnsubmitted
Done
ReplyInline Actions

NOALIASZBS isn't a valid check prefix for this file. It's just NOALIAS.

craig.topper: NOALIASZBS isn't a valid check prefix for this file. It's just NOALIAS.
# CHECK-S-OBJ-NOALIAS-NEXT: addiw t1, t1, -1367
# CHECK-S-OBJ-NOALIAS-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NOALIAS-NEXT: addi t1, t1, 1
# CHECK-S-OBJ: lui t1, 427
# CHECK-S-OBJ-NEXT: addiw t1, t1, -1367
# CHECK-S-OBJ-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NEXT: addi t1, t1, 1
li x6, 7158272001 # 0x0000_0001_aaaa_9001
# CHECK-S-OBJ-NOALIAS: lui t1, 768
# CHECK-S-OBJ-NOALIAS-NEXT: addiw t1, t1, -3
# CHECK-S-OBJ-NOALIAS-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NOALIAS-NEXT: addi t1, t1, 1
# CHECK-S-OBJ: lui t1, 768
# CHECK-S-OBJ-NEXT: addiw t1, t1, -3
# CHECK-S-OBJ-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NEXT: addi t1, t1, 1
li x6, 12884889601 # 0x0000_0002_ffff_d001
# CHECK-S-OBJ-NOALIAS: lui t1, 1048371
# CHECK-S-OBJ-NOALIAS-NEXT: addiw t1, t1, 817
# CHECK-S-OBJ-NOALIAS-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NOALIAS-NEXT: addi t1, t1, 1
# CHECK-S-OBJ: lui t1, 1048371
# CHECK-S-OBJ-NEXT: addiw t1, t1, 817
# CHECK-S-OBJ-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NEXT: addi t1, t1, 1
li x6, -3435982847 # 0xffff_ffff_3333_1001
# CHECK-S-OBJ-NOALIAS: lui t1, 1048235
# CHECK-S-OBJ-NOALIAS-NEXT: addiw t1, t1, -1419
# CHECK-S-OBJ-NOALIAS-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NOALIAS-NEXT: addi t1, t1, 1
# CHECK-S-OBJ: lui t1, 1048235
# CHECK-S-OBJ-NEXT: addiw t1, t1, -1419
# CHECK-S-OBJ-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NEXT: addi t1, t1, 1
li x6, -5726842879 # 0xffff_fffe_aaa7_5001
# CHECK-S-OBJ-NOALIAS: lui t1, 1047962
# CHECK-S-OBJ-NOALIAS-NEXT: addiw t1, t1, -1645
# CHECK-S-OBJ-NOALIAS-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NOALIAS-NEXT: addi t1, t1, 1
# CHECK-S-OBJ: lui t1, 1047962
# CHECK-S-OBJ-NEXT: addiw t1, t1, -1645
# CHECK-S-OBJ-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NEXT: addi t1, t1, 1
li x6, -10307948543 # 0xffff_fffd_9999_3001