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[CFE][Codegen] Update auto-generated check lines for few GPU lit tests
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Authored by hsmhsm on Sep 28 2021, 8:51 PM.

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jdoerfert
yaxunl
tra
rjmccall

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rG393581d8a5cb: [CFE][Codegen] Update auto-generated check lines for few GPU lit tests

Summary

which is essentially required as a pre-commit for https://reviews.llvm.org/D110257.

Diff Detail

Repository: rG LLVM Github Monorepo

Unit TestsFailed

	Time	Test
	80 ms	x64 debian > Flang.Examples::omp-atomic.f90
	80 ms	x64 debian > Flang.Examples::omp-declarative-directive.f90
	60 ms	x64 debian > Flang.Examples::omp-device-constructs.f90
	60 ms	x64 debian > ORC-x86_64-linux.TestCases/Linux/x86-64::trivial-cxa-atexit.S
	50 ms	x64 debian > ORC-x86_64-linux.TestCases/Linux/x86-64::trivial-static-initializer.S
		View Full Test Results (6 Failed)

Event Timeline

hsmhsm created this revision.Sep 28 2021, 8:51 PM

Herald added a subscriber: jvesely. · View Herald TranscriptSep 28 2021, 8:51 PM

hsmhsm requested review of this revision.Sep 28 2021, 8:51 PM

Herald added a project: Restricted Project. · View Herald TranscriptSep 28 2021, 8:51 PM

Herald added subscribers: cfe-commits, sstefan1. · View Herald Transcript

Update list test - OpenMP/task_codegen.c which was got messed-up.

Harbormaster completed remote builds in B126244: Diff 375777.Sep 28 2021, 9:18 PM

Only update lit tests which undergo changes within https://reviews.llvm.org/D110257

Harbormaster completed remote builds in B126254: Diff 375788.Sep 28 2021, 11:36 PM

hsmhsm added a child revision: D110257: [CFE][Codegen] Make sure to maintain the contiguity of all the static allocas.Sep 28 2021, 11:53 PM

ping

I compared the auto generated check lines with original ones. Overall I think this will make life easier since it seems easier to inspect autogenerated lines than manually updating them.

Therefore LGTM. Thanks!

This revision is now accepted and ready to land.Oct 6 2021, 7:03 AM

This revision was landed with ongoing or failed builds.Oct 6 2021, 9:21 PM

Closed by commit rG393581d8a5cb: [CFE][Codegen] Update auto-generated check lines for few GPU lit tests (authored by hsmhsm). · Explain Why

This revision was automatically updated to reflect the committed changes.

hsmhsm added a commit: rG393581d8a5cb: [CFE][Codegen] Update auto-generated check lines for few GPU lit tests.

Revision Contents

Path

Size

clang/

test/

CodeGenCUDA/

builtins-amdgcn.cu

228 lines

CodeGenCXX/

amdgcn-automatic-variable.cpp

118 lines

amdgcn-func-arg.cpp

117 lines

builtin-amdgcn-atomic-inc-dec.cpp

347 lines

CodeGenSYCL/

address-space-deduction.cpp

118 lines

OpenMP/

distribute_parallel_for_if_codegen.cpp

1 line

distribute_parallel_for_simd_if_codegen.cpp

1056 lines

nvptx_allocate_codegen.cpp

4 lines

nvptx_data_sharing.cpp

4 lines

nvptx_multi_target_parallel_codegen.cpp

24 lines

nvptx_nested_parallel_codegen.cpp

30 lines

parallel_if_codegen.cpp

1 line

target_teams_distribute_parallel_for_if_codegen.cpp

1 line

teams_distribute_parallel_for_if_codegen.cpp

1 line

teams_distribute_parallel_for_simd_if_codegen.cpp

1056 lines

vla_crash.c

1 line

Diff 375777

clang/test/CodeGenCUDA/builtins-amdgcn.cu

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
	// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx906 -x hip \			// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx906 -x hip \
	// RUN: -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \			// RUN: -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
	// RUN: -o - \| FileCheck %s			// RUN: -o - \| FileCheck %s

	// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx906 -x hip \			// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx906 -x hip \
	// RUN: -aux-triple x86_64-pc-windows-msvc -fcuda-is-device -emit-llvm %s \			// RUN: -aux-triple x86_64-pc-windows-msvc -fcuda-is-device -emit-llvm %s \
	// RUN: -o - \| FileCheck %s			// RUN: -o - \| FileCheck %s

	#include "Inputs/cuda.h"			#include "Inputs/cuda.h"

	// CHECK-LABEL: @_Z16use_dispatch_ptrPi(			// CHECK-LABEL: @_Z16use_dispatch_ptrPi(
	// CHECK: %[[PTR:.]] = call align 4 dereferenceable(64) i8 addrspace(4) @llvm.amdgcn.dispatch.ptr()			// CHECK-NEXT: entry:
	// CHECK: %{{.}} = addrspacecast i8 addrspace(4) %[[PTR]] to i32*			// CHECK-NEXT: [[OUT:%.]] = alloca i32, align 8, addrspace(5)
				// CHECK-NEXT: [[OUT_ASCAST:%.]] = addrspacecast i32 addrspace(5)* [[OUT]] to i32**
				// CHECK-NEXT: [[OUT_ADDR:%.]] = alloca i32, align 8, addrspace(5)
				// CHECK-NEXT: [[OUT_ADDR_ASCAST:%.]] = addrspacecast i32 addrspace(5)* [[OUT_ADDR]] to i32**
				// CHECK-NEXT: [[DISPATCH_PTR:%.]] = alloca i32, align 8, addrspace(5)
				// CHECK-NEXT: [[DISPATCH_PTR_ASCAST:%.]] = addrspacecast i32 addrspace(5)* [[DISPATCH_PTR]] to i32**
				// CHECK-NEXT: [[TMP0:%.]] = addrspacecast i32 addrspace(1) [[OUT_COERCE:%.]] to i32
				// CHECK-NEXT: store i32* [[TMP0]], i32** [[OUT_ASCAST]], align 8
				// CHECK-NEXT: [[OUT1:%.]] = load i32, i32** [[OUT_ASCAST]], align 8
				// CHECK-NEXT: store i32* [[OUT1]], i32** [[OUT_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP1:%.]] = call align 4 dereferenceable(64) i8 addrspace(4) @llvm.amdgcn.dispatch.ptr()
				// CHECK-NEXT: [[TMP2:%.]] = addrspacecast i8 addrspace(4) [[TMP1]] to i32*
				// CHECK-NEXT: store i32* [[TMP2]], i32** [[DISPATCH_PTR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP3:%.]] = load i32, i32** [[DISPATCH_PTR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP4:%.]] = load i32, i32 [[TMP3]], align 4
				// CHECK-NEXT: [[TMP5:%.]] = load i32, i32** [[OUT_ADDR_ASCAST]], align 8
				// CHECK-NEXT: store i32 [[TMP4]], i32* [[TMP5]], align 4
				// CHECK-NEXT: ret void
				//
	__global__ void use_dispatch_ptr(int* out) {			__global__ void use_dispatch_ptr(int* out) {
	const int* dispatch_ptr = (const int*)__builtin_amdgcn_dispatch_ptr();			const int* dispatch_ptr = (const int*)__builtin_amdgcn_dispatch_ptr();
	out = dispatch_ptr;			out = dispatch_ptr;
	}			}

	// CHECK-LABEL: @_Z12test_ds_fmaxf(
	// CHECK: call contract float @llvm.amdgcn.ds.fmax.f32(float addrspace(3)* @_ZZ12test_ds_fmaxfE6shared, float %{{[^,]*}}, i32 0, i32 0, i1 false)
	__global__			__global__
				// CHECK-LABEL: @_Z12test_ds_fmaxf(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[SRC_ADDR:%.*]] = alloca float, align 4, addrspace(5)
				// CHECK-NEXT: [[SRC_ADDR_ASCAST:%.]] = addrspacecast float addrspace(5) [[SRC_ADDR]] to float*
				// CHECK-NEXT: [[X:%.*]] = alloca float, align 4, addrspace(5)
				// CHECK-NEXT: [[X_ASCAST:%.]] = addrspacecast float addrspace(5) [[X]] to float*
				// CHECK-NEXT: store float [[SRC:%.]], float [[SRC_ADDR_ASCAST]], align 4
				// CHECK-NEXT: [[TMP0:%.]] = load float, float [[SRC_ADDR_ASCAST]], align 4
				// CHECK-NEXT: [[TMP1:%.]] = call contract float @llvm.amdgcn.ds.fmax.f32(float addrspace(3) @_ZZ12test_ds_fmaxfE6shared, float [[TMP0]], i32 0, i32 0, i1 false)
				// CHECK-NEXT: store volatile float [[TMP1]], float* [[X_ASCAST]], align 4
				// CHECK-NEXT: ret void
				//
	void test_ds_fmax(float src) {			void test_ds_fmax(float src) {
	__shared__ float shared;			__shared__ float shared;
	volatile float x = __builtin_amdgcn_ds_fmaxf(&shared, src, 0, 0, false);			volatile float x = __builtin_amdgcn_ds_fmaxf(&shared, src, 0, 0, false);
	}			}

	// CHECK-LABEL: @_Z12test_ds_faddf(			// CHECK-LABEL: @_Z12test_ds_faddf(
	// CHECK: call contract float @llvm.amdgcn.ds.fadd.f32(float addrspace(3)* @_ZZ12test_ds_faddfE6shared, float %{{[^,]*}}, i32 0, i32 0, i1 false)			// CHECK-NEXT: entry:
				// CHECK-NEXT: [[SRC_ADDR:%.*]] = alloca float, align 4, addrspace(5)
				// CHECK-NEXT: [[SRC_ADDR_ASCAST:%.]] = addrspacecast float addrspace(5) [[SRC_ADDR]] to float*
				// CHECK-NEXT: [[X:%.*]] = alloca float, align 4, addrspace(5)
				// CHECK-NEXT: [[X_ASCAST:%.]] = addrspacecast float addrspace(5) [[X]] to float*
				// CHECK-NEXT: store float [[SRC:%.]], float [[SRC_ADDR_ASCAST]], align 4
				// CHECK-NEXT: [[TMP0:%.]] = load float, float [[SRC_ADDR_ASCAST]], align 4
				// CHECK-NEXT: [[TMP1:%.]] = call contract float @llvm.amdgcn.ds.fadd.f32(float addrspace(3) @_ZZ12test_ds_faddfE6shared, float [[TMP0]], i32 0, i32 0, i1 false)
				// CHECK-NEXT: store volatile float [[TMP1]], float* [[X_ASCAST]], align 4
				// CHECK-NEXT: ret void
				//
	__global__ void test_ds_fadd(float src) {			__global__ void test_ds_fadd(float src) {
	__shared__ float shared;			__shared__ float shared;
	volatile float x = __builtin_amdgcn_ds_faddf(&shared, src, 0, 0, false);			volatile float x = __builtin_amdgcn_ds_faddf(&shared, src, 0, 0, false);
	}			}

	// CHECK-LABEL: @_Z12test_ds_fminfPf(float %src, float addrspace(1)* %shared.coerce			// CHECK-LABEL: @_Z12test_ds_fminfPf(
	// CHECK: %shared = alloca float*, align 8, addrspace(5)			// CHECK-NEXT: entry:
	// CHECK: %shared.ascast = addrspacecast float* addrspace(5)* %shared to float**			// CHECK-NEXT: [[SHARED:%.]] = alloca float, align 8, addrspace(5)
	// CHECK: %shared.addr = alloca float*, align 8, addrspace(5)			// CHECK-NEXT: [[SHARED_ASCAST:%.]] = addrspacecast float addrspace(5)* [[SHARED]] to float**
	// CHECK: %shared.addr.ascast = addrspacecast float* addrspace(5)* %shared.addr to float**			// CHECK-NEXT: [[SRC_ADDR:%.*]] = alloca float, align 4, addrspace(5)
	// CHECK: %[[S0:.]] = addrspacecast float addrspace(1) %shared.coerce to float*			// CHECK-NEXT: [[SRC_ADDR_ASCAST:%.]] = addrspacecast float addrspace(5) [[SRC_ADDR]] to float*
	// CHECK: store float* %[[S0]], float** %shared.ascast, align 8			// CHECK-NEXT: [[SHARED_ADDR:%.]] = alloca float, align 8, addrspace(5)
	// CHECK: %shared1 = load float, float* %shared.ascast, align 8			// CHECK-NEXT: [[SHARED_ADDR_ASCAST:%.]] = addrspacecast float addrspace(5)* [[SHARED_ADDR]] to float**
	// CHECK: store float* %shared1, float** %shared.addr.ascast, align 8			// CHECK-NEXT: [[X:%.*]] = alloca float, align 4, addrspace(5)
	// CHECK: %[[S1:.]] = load float, float** %shared.addr.ascast, align 8			// CHECK-NEXT: [[X_ASCAST:%.]] = addrspacecast float addrspace(5) [[X]] to float*
	// CHECK: %[[S2:.]] = addrspacecast float %[[S1]] to float addrspace(3)*			// CHECK-NEXT: [[TMP0:%.]] = addrspacecast float addrspace(1) [[SHARED_COERCE:%.]] to float
	// CHECK: call contract float @llvm.amdgcn.ds.fmin.f32(float addrspace(3)* %[[S2]]			// CHECK-NEXT: store float* [[TMP0]], float** [[SHARED_ASCAST]], align 8
				// CHECK-NEXT: [[SHARED1:%.]] = load float, float** [[SHARED_ASCAST]], align 8
				// CHECK-NEXT: store float [[SRC:%.]], float [[SRC_ADDR_ASCAST]], align 4
				// CHECK-NEXT: store float* [[SHARED1]], float** [[SHARED_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP1:%.]] = load float, float** [[SHARED_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP2:%.]] = addrspacecast float [[TMP1]] to float addrspace(3)*
				// CHECK-NEXT: [[TMP3:%.]] = load float, float [[SRC_ADDR_ASCAST]], align 4
				// CHECK-NEXT: [[TMP4:%.]] = call contract float @llvm.amdgcn.ds.fmin.f32(float addrspace(3) [[TMP2]], float [[TMP3]], i32 0, i32 0, i1 false)
				// CHECK-NEXT: store volatile float [[TMP4]], float* [[X_ASCAST]], align 4
				// CHECK-NEXT: ret void
				//
	__global__ void test_ds_fmin(float src, float *shared) {			__global__ void test_ds_fmin(float src, float *shared) {
	volatile float x = __builtin_amdgcn_ds_fminf(shared, src, 0, 0, false);			volatile float x = __builtin_amdgcn_ds_fminf(shared, src, 0, 0, false);
	}			}

	// CHECK: @_Z33test_ret_builtin_nondef_addrspace			// CHECK-LABEL: @_Z33test_ret_builtin_nondef_addrspacev(
	// CHECK: %[[X:.]] = alloca i8, align 8, addrspace(5)			// CHECK-NEXT: entry:
	// CHECK: %[[XC:.]] = addrspacecast i8 addrspace(5)* %[[X]] to i8**			// CHECK-NEXT: [[X:%.]] = alloca i8, align 8, addrspace(5)
	// CHECK: %[[Y:.]] = call align 4 dereferenceable(64) i8 addrspace(4) @llvm.amdgcn.dispatch.ptr()			// CHECK-NEXT: [[X_ASCAST:%.]] = addrspacecast i8 addrspace(5)* [[X]] to i8**
	// CHECK: %[[YASCAST:.]] = addrspacecast i8 addrspace(4) %[[Y]] to i8*			// CHECK-NEXT: [[TMP0:%.]] = call align 4 dereferenceable(64) i8 addrspace(4) @llvm.amdgcn.dispatch.ptr()
	// CHECK: store i8* %[[YASCAST]], i8** %[[XC]], align 8			// CHECK-NEXT: [[TMP1:%.]] = addrspacecast i8 addrspace(4) [[TMP0]] to i8*
				// CHECK-NEXT: store i8* [[TMP1]], i8** [[X_ASCAST]], align 8
				// CHECK-NEXT: ret void
				//
	__device__ void test_ret_builtin_nondef_addrspace() {			__device__ void test_ret_builtin_nondef_addrspace() {
	void *x = __builtin_amdgcn_dispatch_ptr();			void *x = __builtin_amdgcn_dispatch_ptr();
	}			}

	// CHECK-LABEL: @_Z6endpgmv(			// CHECK-LABEL: @_Z6endpgmv(
	// CHECK: call void @llvm.amdgcn.endpgm()			// CHECK-NEXT: entry:
				// CHECK-NEXT: call void @llvm.amdgcn.endpgm()
				// CHECK-NEXT: ret void
				//
	__global__ void endpgm() {			__global__ void endpgm() {
	__builtin_amdgcn_endpgm();			__builtin_amdgcn_endpgm();
	}			}

	// Check the 64 bit argument is correctly passed to the intrinsic without truncation or assertion.			// Check the 64 bit argument is correctly passed to the intrinsic without truncation or assertion.

	// CHECK-LABEL: @_Z14test_uicmp_i64			// CHECK-LABEL: @_Z14test_uicmp_i64Pyyy(
	// CHECK: store i64* %out1, i64** %out.addr.ascast			// CHECK-NEXT: entry:
	// CHECK-NEXT: store i64 %a, i64* %a.addr.ascast			// CHECK-NEXT: [[OUT:%.]] = alloca i64, align 8, addrspace(5)
	// CHECK-NEXT: store i64 %b, i64* %b.addr.ascast			// CHECK-NEXT: [[OUT_ASCAST:%.]] = addrspacecast i64 addrspace(5)* [[OUT]] to i64**
	// CHECK-NEXT: %[[V0:.]] = load i64, i64 %a.addr.ascast			// CHECK-NEXT: [[OUT_ADDR:%.]] = alloca i64, align 8, addrspace(5)
	// CHECK-NEXT: %[[V1:.]] = load i64, i64 %b.addr.ascast			// CHECK-NEXT: [[OUT_ADDR_ASCAST:%.]] = addrspacecast i64 addrspace(5)* [[OUT_ADDR]] to i64**
	// CHECK-NEXT: %[[V2:.*]] = call i64 @llvm.amdgcn.icmp.i64.i64(i64 %[[V0]], i64 %[[V1]], i32 35)			// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
	// CHECK-NEXT: %[[V3:.]] = load i64, i64** %out.addr.ascast			// CHECK-NEXT: [[A_ADDR_ASCAST:%.]] = addrspacecast i64 addrspace(5) [[A_ADDR]] to i64*
	// CHECK-NEXT: store i64 %[[V2]], i64* %[[V3]]			// CHECK-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
				// CHECK-NEXT: [[B_ADDR_ASCAST:%.]] = addrspacecast i64 addrspace(5) [[B_ADDR]] to i64*
				// CHECK-NEXT: [[TMP0:%.]] = addrspacecast i64 addrspace(1) [[OUT_COERCE:%.]] to i64
				// CHECK-NEXT: store i64* [[TMP0]], i64** [[OUT_ASCAST]], align 8
				// CHECK-NEXT: [[OUT1:%.]] = load i64, i64** [[OUT_ASCAST]], align 8
				// CHECK-NEXT: store i64* [[OUT1]], i64** [[OUT_ADDR_ASCAST]], align 8
				// CHECK-NEXT: store i64 [[A:%.]], i64 [[A_ADDR_ASCAST]], align 8
				// CHECK-NEXT: store i64 [[B:%.]], i64 [[B_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP1:%.]] = load i64, i64 [[A_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP2:%.]] = load i64, i64 [[B_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.amdgcn.icmp.i64.i64(i64 [[TMP1]], i64 [[TMP2]], i32 35)
				// CHECK-NEXT: [[TMP4:%.]] = load i64, i64** [[OUT_ADDR_ASCAST]], align 8
				// CHECK-NEXT: store i64 [[TMP3]], i64* [[TMP4]], align 8
	// CHECK-NEXT: ret void			// CHECK-NEXT: ret void
				//
	__global__ void test_uicmp_i64(unsigned long long *out, unsigned long long a, unsigned long long b)			__global__ void test_uicmp_i64(unsigned long long *out, unsigned long long a, unsigned long long b)
	{			{
	*out = __builtin_amdgcn_uicmpl(a, b, 30+5);			*out = __builtin_amdgcn_uicmpl(a, b, 30+5);
	}			}

	// Check the 64 bit return value is correctly returned without truncation or assertion.			// Check the 64 bit return value is correctly returned without truncation or assertion.

	// CHECK-LABEL: @_Z14test_s_memtime			// CHECK-LABEL: @_Z14test_s_memtimePy(
	// CHECK: %[[V1:.*]] = call i64 @llvm.amdgcn.s.memtime()			// CHECK-NEXT: entry:
	// CHECK-NEXT: %[[PTR:.]] = load i64, i64** %out.addr.ascast			// CHECK-NEXT: [[OUT:%.]] = alloca i64, align 8, addrspace(5)
	// CHECK-NEXT: store i64 %[[V1]], i64* %[[PTR]]			// CHECK-NEXT: [[OUT_ASCAST:%.]] = addrspacecast i64 addrspace(5)* [[OUT]] to i64**
				// CHECK-NEXT: [[OUT_ADDR:%.]] = alloca i64, align 8, addrspace(5)
				// CHECK-NEXT: [[OUT_ADDR_ASCAST:%.]] = addrspacecast i64 addrspace(5)* [[OUT_ADDR]] to i64**
				// CHECK-NEXT: [[TMP0:%.]] = addrspacecast i64 addrspace(1) [[OUT_COERCE:%.]] to i64
				// CHECK-NEXT: store i64* [[TMP0]], i64** [[OUT_ASCAST]], align 8
				// CHECK-NEXT: [[OUT1:%.]] = load i64, i64** [[OUT_ASCAST]], align 8
				// CHECK-NEXT: store i64* [[OUT1]], i64** [[OUT_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.s.memtime()
				// CHECK-NEXT: [[TMP2:%.]] = load i64, i64** [[OUT_ADDR_ASCAST]], align 8
				// CHECK-NEXT: store i64 [[TMP1]], i64* [[TMP2]], align 8
	// CHECK-NEXT: ret void			// CHECK-NEXT: ret void
				//
	__global__ void test_s_memtime(unsigned long long* out)			__global__ void test_s_memtime(unsigned long long* out)
	{			{
	*out = __builtin_amdgcn_s_memtime();			*out = __builtin_amdgcn_s_memtime();
	}			}

	// Check a generic pointer can be passed as a shared pointer and a generic pointer.			// Check a generic pointer can be passed as a shared pointer and a generic pointer.
	__device__ void func(float *x);			__device__ void func(float *x);

	// CHECK: @_Z17test_ds_fmin_funcfPf			// CHECK-LABEL: @_Z17test_ds_fmin_funcfPf(
	// CHECK: %[[SHARED:.]] = alloca float, align 8, addrspace(5)			// CHECK-NEXT: entry:
	// CHECK: %[[SHARED_ASCAST:.]] = addrspacecast float addrspace(5)* %[[SHARED]] to float**			// CHECK-NEXT: [[SHARED:%.]] = alloca float, align 8, addrspace(5)
	// CHECK: %[[SRC_ADDR:.*]] = alloca float, align 4, addrspace(5)			// CHECK-NEXT: [[SHARED_ASCAST:%.]] = addrspacecast float addrspace(5)* [[SHARED]] to float**
	// CHECK: %[[SRC_ADDR_ASCAST:.]] = addrspacecast float addrspace(5) %[[SRC_ADDR]] to float*			// CHECK-NEXT: [[SRC_ADDR:%.*]] = alloca float, align 4, addrspace(5)
	// CHECK: %[[SHARED_ADDR:.]] = alloca float, align 8, addrspace(5)			// CHECK-NEXT: [[SRC_ADDR_ASCAST:%.]] = addrspacecast float addrspace(5) [[SRC_ADDR]] to float*
	// CHECK: %[[SHARED_ADDR_ASCAST:.]] = addrspacecast float addrspace(5)* %[[SHARED_ADDR]] to float**			// CHECK-NEXT: [[SHARED_ADDR:%.]] = alloca float, align 8, addrspace(5)
	// CHECK: %[[X:.*]] = alloca float, align 4, addrspace(5)			// CHECK-NEXT: [[SHARED_ADDR_ASCAST:%.]] = addrspacecast float addrspace(5)* [[SHARED_ADDR]] to float**
	// CHECK: %[[X_ASCAST:.]] = addrspacecast float addrspace(5) %[[X]] to float*			// CHECK-NEXT: [[X:%.*]] = alloca float, align 4, addrspace(5)
	// CHECK: %[[SHARED1:.]] = load float, float** %[[SHARED_ASCAST]], align 8			// CHECK-NEXT: [[X_ASCAST:%.]] = addrspacecast float addrspace(5) [[X]] to float*
	// CHECK: store float %src, float* %[[SRC_ADDR_ASCAST]], align 4			// CHECK-NEXT: [[TMP0:%.]] = addrspacecast float addrspace(1) [[SHARED_COERCE:%.]] to float
	// CHECK: store float* %[[SHARED1]], float** %[[SHARED_ADDR_ASCAST]], align 8			// CHECK-NEXT: store float* [[TMP0]], float** [[SHARED_ASCAST]], align 8
	// CHECK: %[[ARG0_PTR:.]] = load float, float** %[[SHARED_ADDR_ASCAST]], align 8			// CHECK-NEXT: [[SHARED1:%.]] = load float, float** [[SHARED_ASCAST]], align 8
	// CHECK: %[[ARG0:.]] = addrspacecast float %[[ARG0_PTR]] to float addrspace(3)*			// CHECK-NEXT: store float [[SRC:%.]], float [[SRC_ADDR_ASCAST]], align 4
	// CHECK: call contract float @llvm.amdgcn.ds.fmin.f32(float addrspace(3)* %[[ARG0]]			// CHECK-NEXT: store float* [[SHARED1]], float** [[SHARED_ADDR_ASCAST]], align 8
	// CHECK: %[[ARG0:.]] = load float, float** %[[SHARED_ADDR_ASCAST]], align 8			// CHECK-NEXT: [[TMP1:%.]] = load float, float** [[SHARED_ADDR_ASCAST]], align 8
	// CHECK: call void @_Z4funcPf(float* %[[ARG0]]) #8			// CHECK-NEXT: [[TMP2:%.]] = addrspacecast float [[TMP1]] to float addrspace(3)*
				// CHECK-NEXT: [[TMP3:%.]] = load float, float [[SRC_ADDR_ASCAST]], align 4
				// CHECK-NEXT: [[TMP4:%.]] = call contract float @llvm.amdgcn.ds.fmin.f32(float addrspace(3) [[TMP2]], float [[TMP3]], i32 0, i32 0, i1 false)
				// CHECK-NEXT: store volatile float [[TMP4]], float* [[X_ASCAST]], align 4
				// CHECK-NEXT: [[TMP5:%.]] = load float, float** [[SHARED_ADDR_ASCAST]], align 8
				// CHECK-NEXT: call void @_Z4funcPf(float* [[TMP5]]) #[[ATTR8:[0-9]+]]
				// CHECK-NEXT: ret void
				//
	__global__ void test_ds_fmin_func(float src, float *__restrict shared) {			__global__ void test_ds_fmin_func(float src, float *__restrict shared) {
	volatile float x = __builtin_amdgcn_ds_fminf(shared, src, 0, 0, false);			volatile float x = __builtin_amdgcn_ds_fminf(shared, src, 0, 0, false);
	func(shared);			func(shared);
	}			}

	// CHECK: @_Z14test_is_sharedPf(float addrspace(1)* %[[X_COERCE:.*]])
	// CHECK: %[[X:.]] = alloca float, align 8, addrspace(5)
	// CHECK: %[[X_ASCAST:.]] = addrspacecast float addrspace(5)* %[[X]] to float**
	// CHECK: %[[X_ADDR:.]] = alloca float, align 8, addrspace(5)
	// CHECK: %[[X_ADDR_ASCAST:.]] = addrspacecast float addrspace(5)* %[[X_ADDR]] to float**
	// CHECK: %[[X_FP:.]] = addrspacecast float addrspace(1) %[[X_COERCE]] to float*
	// CHECK: store float* %[[X_FP]], float** %[[X_ASCAST]], align 8
	// CHECK: %[[X1:.]] = load float, float** %[[X_ASCAST]], align 8
	// CHECK: store float* %[[X1]], float** %[[X_ADDR_ASCAST]], align 8
	// CHECK: %[[X_TMP:.]] = load float, float** %[[X_ADDR_ASCAST]], align 8
	// CHECK: %[[X_ARG:.]] = bitcast float %[[X_TMP]] to i8*
	// CHECK: call i1 @llvm.amdgcn.is.shared(i8* %[[X_ARG]])

				// CHECK-LABEL: @_Z14test_is_sharedPf(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[X:%.]] = alloca float, align 8, addrspace(5)
				// CHECK-NEXT: [[X_ASCAST:%.]] = addrspacecast float addrspace(5)* [[X]] to float**
				// CHECK-NEXT: [[X_ADDR:%.]] = alloca float, align 8, addrspace(5)
				// CHECK-NEXT: [[X_ADDR_ASCAST:%.]] = addrspacecast float addrspace(5)* [[X_ADDR]] to float**
				// CHECK-NEXT: [[RET:%.*]] = alloca i8, align 1, addrspace(5)
				// CHECK-NEXT: [[RET_ASCAST:%.]] = addrspacecast i8 addrspace(5) [[RET]] to i8*
				// CHECK-NEXT: [[TMP0:%.]] = addrspacecast float addrspace(1) [[X_COERCE:%.]] to float
				// CHECK-NEXT: store float* [[TMP0]], float** [[X_ASCAST]], align 8
				// CHECK-NEXT: [[X1:%.]] = load float, float** [[X_ASCAST]], align 8
				// CHECK-NEXT: store float* [[X1]], float** [[X_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP1:%.]] = load float, float** [[X_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP2:%.]] = bitcast float [[TMP1]] to i8*
				// CHECK-NEXT: [[TMP3:%.]] = call i1 @llvm.amdgcn.is.shared(i8 [[TMP2]])
				// CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TMP3]] to i8
				// CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[RET_ASCAST]], align 1
				// CHECK-NEXT: ret void
				//
	__global__ void test_is_shared(float *x){			__global__ void test_is_shared(float *x){
	bool ret = __builtin_amdgcn_is_shared(x);			bool ret = __builtin_amdgcn_is_shared(x);
	}			}

clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
	// RUN: %clang_cc1 -O0 -triple amdgcn---amdgiz -emit-llvm %s -o - \| FileCheck %s			// RUN: %clang_cc1 -O0 -triple amdgcn---amdgiz -emit-llvm %s -o - \| FileCheck %s

	// CHECK-LABEL: define{{.}} void @_Z5func1Pi(i32 %x)			// CHECK-LABEL: @_Z5func1Pi(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[X_ADDR:%.]] = alloca i32, align 8, addrspace(5)
				// CHECK-NEXT: [[X_ADDR_ASCAST:%.]] = addrspacecast i32 addrspace(5)* [[X_ADDR]] to i32**
				// CHECK-NEXT: store i32* [[X:%.]], i32* [[X_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP0:%.]] = load i32, i32** [[X_ADDR_ASCAST]], align 8
				// CHECK-NEXT: store i32 1, i32* [[TMP0]], align 4
				// CHECK-NEXT: ret void
				//
	void func1(int *x) {			void func1(int *x) {
	// CHECK: %[[x_addr:.]] = alloca i32{{.*}}addrspace(5)
	// CHECK: %[[r0:.]] = addrspacecast i32 addrspace(5)* %[[x_addr]] to i32**
	// CHECK: store i32* %x, i32** %[[r0]]
	// CHECK: %[[r1:.]] = load i32, i32** %[[r0]]
	// CHECK: store i32 1, i32* %[[r1]]
	*x = 1;			*x = 1;
	}			}

	// CHECK-LABEL: define{{.*}} void @_Z5func2v()			// CHECK-LABEL: @_Z5func2v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[LV1:%.*]] = alloca i32, align 4, addrspace(5)
				// CHECK-NEXT: [[LV1_ASCAST:%.]] = addrspacecast i32 addrspace(5) [[LV1]] to i32*
				// CHECK-NEXT: [[LV2:%.*]] = alloca i32, align 4, addrspace(5)
				// CHECK-NEXT: [[LV2_ASCAST:%.]] = addrspacecast i32 addrspace(5) [[LV2]] to i32*
				// CHECK-NEXT: [[LA:%.*]] = alloca [100 x i32], align 4, addrspace(5)
				// CHECK-NEXT: [[LA_ASCAST:%.]] = addrspacecast [100 x i32] addrspace(5) [[LA]] to [100 x i32]*
				// CHECK-NEXT: [[LP1:%.]] = alloca i32, align 8, addrspace(5)
				// CHECK-NEXT: [[LP1_ASCAST:%.]] = addrspacecast i32 addrspace(5)* [[LP1]] to i32**
				// CHECK-NEXT: [[LP2:%.]] = alloca i32, align 8, addrspace(5)
				// CHECK-NEXT: [[LP2_ASCAST:%.]] = addrspacecast i32 addrspace(5)* [[LP2]] to i32**
				// CHECK-NEXT: [[LVC:%.*]] = alloca i32, align 4, addrspace(5)
				// CHECK-NEXT: [[LVC_ASCAST:%.]] = addrspacecast i32 addrspace(5) [[LVC]] to i32*
				// CHECK-NEXT: store i32 1, i32* [[LV1_ASCAST]], align 4
				// CHECK-NEXT: store i32 2, i32* [[LV2_ASCAST]], align 4
				// CHECK-NEXT: [[ARRAYIDX:%.]] = getelementptr inbounds [100 x i32], [100 x i32] [[LA_ASCAST]], i64 0, i64 0
				// CHECK-NEXT: store i32 3, i32* [[ARRAYIDX]], align 4
				// CHECK-NEXT: store i32* [[LV1_ASCAST]], i32** [[LP1_ASCAST]], align 8
				// CHECK-NEXT: [[ARRAYDECAY:%.]] = getelementptr inbounds [100 x i32], [100 x i32] [[LA_ASCAST]], i64 0, i64 0
				// CHECK-NEXT: store i32* [[ARRAYDECAY]], i32** [[LP2_ASCAST]], align 8
				// CHECK-NEXT: call void @_Z5func1Pi(i32* [[LV1_ASCAST]])
				// CHECK-NEXT: store i32 4, i32* [[LVC_ASCAST]], align 4
				// CHECK-NEXT: store i32 4, i32* [[LV1_ASCAST]], align 4
				// CHECK-NEXT: ret void
				//
	void func2(void) {			void func2(void) {
	// CHECK: %lv1 = alloca i32, align 4, addrspace(5)
	// CHECK: %[[r0:.]] = addrspacecast i32 addrspace(5) %lv1 to i32*
	// CHECK: %lv2 = alloca i32, align 4, addrspace(5)
	// CHECK: %[[r1:.]] = addrspacecast i32 addrspace(5) %lv2 to i32*
	// CHECK: %la = alloca [100 x i32], align 4, addrspace(5)
	// CHECK: %[[r2:.]] = addrspacecast [100 x i32] addrspace(5) %la to [100 x i32]*
	// CHECK: %lp1 = alloca i32*, align 8, addrspace(5)
	// CHECK: %[[r3:.]] = addrspacecast i32 addrspace(5)* %lp1 to i32**
	// CHECK: %lp2 = alloca i32*, align 8, addrspace(5)
	// CHECK: %[[r4:.]] = addrspacecast i32 addrspace(5)* %lp2 to i32**
	// CHECK: %lvc = alloca i32, align 4, addrspace(5)
	// CHECK: %[[r5:.]] = addrspacecast i32 addrspace(5) %lvc to i32*

	// CHECK: store i32 1, i32* %[[r0]]
	int lv1;			int lv1;
	lv1 = 1;			lv1 = 1;
	// CHECK: store i32 2, i32* %[[r1]]
	int lv2 = 2;			int lv2 = 2;

	// CHECK: %[[arrayidx:.]] = getelementptr inbounds [100 x i32], [100 x i32] %[[r2]], i64 0, i64 0
	// CHECK: store i32 3, i32* %[[arrayidx]], align 4
	int la[100];			int la[100];
	la[0] = 3;			la[0] = 3;

	// CHECK: store i32* %[[r0]], i32** %[[r3]], align 8
	int *lp1 = &lv1;			int *lp1 = &lv1;

	// CHECK: %[[arraydecay:.]] = getelementptr inbounds [100 x i32], [100 x i32] %[[r2]], i64 0, i64 0
	// CHECK: store i32* %[[arraydecay]], i32** %[[r4]], align 8
	int *lp2 = la;			int *lp2 = la;

	// CHECK: call void @_Z5func1Pi(i32* %[[r0]])
	func1(&lv1);			func1(&lv1);

	// CHECK: store i32 4, i32* %[[r5]]
	// CHECK: store i32 4, i32* %[[r0]]
	const int lvc = 4;			const int lvc = 4;
	lv1 = lvc;			lv1 = lvc;
	}			}

	void destroy(int x);			void destroy(int x);

	class A {			class A {
	int x;			int x;
	public:			public:
	A():x(0) {}			A():x(0) {}
	~A() {			~A() {
	destroy(x);			destroy(x);
	}			}
	};			};

	// CHECK-LABEL: define{{.*}} void @_Z5func3v			// CHECK-LABEL: @_Z5func3v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = alloca [[CLASS_A:%.]], align 4, addrspace(5)
				// CHECK-NEXT: [[A_ASCAST:%.]] = addrspacecast [[CLASS_A]] addrspace(5) [[A]] to %class.A*
				// CHECK-NEXT: call void @_ZN1AC1Ev(%class.A* nonnull align 4 dereferenceable(4) [[A_ASCAST]])
				// CHECK-NEXT: call void @_ZN1AD1Ev(%class.A* nonnull align 4 dereferenceable(4) [[A_ASCAST]])
				// CHECK-NEXT: ret void
				//
	void func3() {			void func3() {
	// CHECK: %[[a:.*]] = alloca %class.A, align 4, addrspace(5)
	// CHECK: %[[r0:.]] = addrspacecast %class.A addrspace(5) %[[a]] to %class.A*
	// CHECK: call void @_ZN1AC1Ev(%class.A* {{[^,]*}} %[[r0]])
	// CHECK: call void @_ZN1AD1Ev(%class.A* {{[^,]*}} %[[r0]])
	A a;			A a;
	}			}

	// CHECK-LABEL: define{{.*}} void @_Z5func4i			// CHECK-LABEL: @_Z5func4i(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
				// CHECK-NEXT: [[X_ADDR_ASCAST:%.]] = addrspacecast i32 addrspace(5) [[X_ADDR]] to i32*
				// CHECK-NEXT: store i32 [[X:%.]], i32 [[X_ADDR_ASCAST]], align 4
				// CHECK-NEXT: call void @_Z5func1Pi(i32* [[X_ADDR_ASCAST]])
				// CHECK-NEXT: ret void
				//
	void func4(int x) {			void func4(int x) {
	// CHECK: %[[x_addr:.*]] = alloca i32, align 4, addrspace(5)
	// CHECK: %[[r0:.]] = addrspacecast i32 addrspace(5) %[[x_addr]] to i32*
	// CHECK: store i32 %x, i32* %[[r0]], align 4
	// CHECK: call void @_Z5func1Pi(i32* %[[r0]])
	func1(&x);			func1(&x);
	}			}

	// CHECK-LABEL: define{{.*}} void @_Z5func5v			// CHECK-LABEL: @_Z5func5v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[X:%.*]] = alloca i32, align 4, addrspace(5)
				// CHECK-NEXT: [[X_ASCAST:%.]] = addrspacecast i32 addrspace(5) [[X]] to i32*
				// CHECK-NEXT: ret void
				//
	void func5() {			void func5() {
	return;			return;
	int x = 0;			int x = 0;
	}			}

	// CHECK-LABEL: define{{.*}} void @_Z5func6v			// CHECK-LABEL: @_Z5func6v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[X:%.*]] = alloca i32, align 4, addrspace(5)
				// CHECK-NEXT: [[X_ASCAST:%.]] = addrspacecast i32 addrspace(5) [[X]] to i32*
				// CHECK-NEXT: ret void
				//
	void func6() {			void func6() {
	return;			return;
	int x;			int x;
	}			}

	// CHECK-LABEL: define{{.*}} void @_Z5func7v
	extern void use(int *);			extern void use(int *);
				// CHECK-LABEL: @_Z5func7v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[X:%.*]] = alloca i32, align 4, addrspace(5)
				// CHECK-NEXT: [[X_ASCAST:%.]] = addrspacecast i32 addrspace(5) [[X]] to i32*
				// CHECK-NEXT: br label [[LATER:%.*]]
				// CHECK: later:
				// CHECK-NEXT: call void @_Z3usePi(i32* [[X_ASCAST]])
				// CHECK-NEXT: ret void
				//
	void func7() {			void func7() {
	goto later;			goto later;
	int x;			int x;
	later:			later:
	use(&x);			use(&x);
	}			}

	// CHECK-NOT: !opencl.ocl.version

clang/test/CodeGenCXX/amdgcn-func-arg.cpp

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
	// RUN: %clang_cc1 -O0 -triple amdgcn -emit-llvm %s -o - \| FileCheck %s			// RUN: %clang_cc1 -O0 -triple amdgcn -emit-llvm %s -o - \| FileCheck %s

	class A {			class A {
	public:			public:
	int x;			int x;
	A():x(0) {}			A():x(0) {}
	~A() {}			~A() {}
	};			};

	class B {			class B {
	int x[100];			int x[100];
	};			};

	A g_a;			A g_a;
	B g_b;			B g_b;

	void func_with_ref_arg(A &a);			void func_with_ref_arg(A &a);
	void func_with_ref_arg(B &b);			void func_with_ref_arg(B &b);

	// CHECK-LABEL: define{{.}} void @_Z22func_with_indirect_arg1A(%class.A addrspace(5) %a)			// CHECK-LABEL: @_Z22func_with_indirect_arg1A(
	// CHECK: %p = alloca %class.A*, align 8, addrspace(5)			// CHECK-NEXT: entry:
	// CHECK: %[[r1:.+]] = addrspacecast %class.A* addrspace(5)* %p to %class.A**			// CHECK-NEXT: [[P:%.]] = alloca %class.A, align 8, addrspace(5)
	// CHECK: %[[r0:.+]] = addrspacecast %class.A addrspace(5)* %a to %class.A*			// CHECK-NEXT: [[P_ASCAST:%.]] = addrspacecast %class.A addrspace(5)* [[P]] to %class.A**
	// CHECK: store %class.A* %[[r0]], %class.A** %[[r1]], align 8			// CHECK-NEXT: [[A_ASCAST:%.]] = addrspacecast [[CLASS_A:%.]] addrspace(5)* [[A:%.]] to %class.A
				// CHECK-NEXT: store %class.A* [[A_ASCAST]], %class.A** [[P_ASCAST]], align 8
				// CHECK-NEXT: ret void
				//
	void func_with_indirect_arg(A a) {			void func_with_indirect_arg(A a) {
	A *p = &a;			A *p = &a;
	}			}

	// CHECK-LABEL: define{{.*}} void @_Z22test_indirect_arg_autov()			// CHECK-LABEL: @_Z22test_indirect_arg_autov(
	// CHECK: %a = alloca %class.A, align 4, addrspace(5)			// CHECK-NEXT: entry:
	// CHECK: %[[r0:.+]] = addrspacecast %class.A addrspace(5)* %a to %class.A*			// CHECK-NEXT: [[A:%.]] = alloca [[CLASS_A:%.]], align 4, addrspace(5)
	// CHECK: %agg.tmp = alloca %class.A, align 4, addrspace(5)			// CHECK-NEXT: [[A_ASCAST:%.]] = addrspacecast [[CLASS_A]] addrspace(5) [[A]] to %class.A*
	// CHECK: %[[r1:.+]] = addrspacecast %class.A addrspace(5)* %agg.tmp to %class.A*			// CHECK-NEXT: [[AGG_TMP:%.*]] = alloca [[CLASS_A]], align 4, addrspace(5)
	// CHECK: call void @_ZN1AC1Ev(%class.A* {{[^,]*}} %[[r0]])			// CHECK-NEXT: [[AGG_TMP_ASCAST:%.]] = addrspacecast [[CLASS_A]] addrspace(5) [[AGG_TMP]] to %class.A*
	// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64			// CHECK-NEXT: call void @_ZN1AC1Ev(%class.A* nonnull align 4 dereferenceable(4) [[A_ASCAST]])
	// CHECK: %[[r4:.+]] = addrspacecast %class.A* %[[r1]] to %class.A addrspace(5)*			// CHECK-NEXT: [[TMP0:%.]] = bitcast %class.A [[AGG_TMP_ASCAST]] to i8*
	// CHECK: call void @_Z22func_with_indirect_arg1A(%class.A addrspace(5)* %[[r4]])			// CHECK-NEXT: [[TMP1:%.]] = bitcast %class.A [[A_ASCAST]] to i8*
	// CHECK: call void @_ZN1AD1Ev(%class.A* {{[^,]*}} %[[r1]])			// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 [[TMP1]], i64 4, i1 false)
	// CHECK: call void @_Z17func_with_ref_argR1A(%class.A* nonnull align 4 dereferenceable(4) %[[r0]])			// CHECK-NEXT: [[AGG_TMP_ASCAST_ASCAST:%.]] = addrspacecast %class.A [[AGG_TMP_ASCAST]] to [[CLASS_A]] addrspace(5)*
	// CHECK: call void @_ZN1AD1Ev(%class.A* {{[^,]*}} %[[r0]])			// CHECK-NEXT: call void @_Z22func_with_indirect_arg1A([[CLASS_A]] addrspace(5)* [[AGG_TMP_ASCAST_ASCAST]])
				// CHECK-NEXT: call void @_ZN1AD1Ev(%class.A* nonnull align 4 dereferenceable(4) [[AGG_TMP_ASCAST]])
				// CHECK-NEXT: call void @_Z17func_with_ref_argR1A(%class.A* nonnull align 4 dereferenceable(4) [[A_ASCAST]])
				// CHECK-NEXT: call void @_ZN1AD1Ev(%class.A* nonnull align 4 dereferenceable(4) [[A_ASCAST]])
				// CHECK-NEXT: ret void
				//
	void test_indirect_arg_auto() {			void test_indirect_arg_auto() {
	A a;			A a;
	func_with_indirect_arg(a);			func_with_indirect_arg(a);
	func_with_ref_arg(a);			func_with_ref_arg(a);
	}			}

	// CHECK: define{{.*}} void @_Z24test_indirect_arg_globalv()			// CHECK-LABEL: @_Z24test_indirect_arg_globalv(
	// CHECK: %agg.tmp = alloca %class.A, align 4, addrspace(5)			// CHECK-NEXT: entry:
	// CHECK: %[[r0:.+]] = addrspacecast %class.A addrspace(5)* %agg.tmp to %class.A*			// CHECK-NEXT: [[AGG_TMP:%.]] = alloca [[CLASS_A:%.]], align 4, addrspace(5)
	// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64			// CHECK-NEXT: [[AGG_TMP_ASCAST:%.]] = addrspacecast [[CLASS_A]] addrspace(5) [[AGG_TMP]] to %class.A*
	// CHECK: %[[r2:.+]] = addrspacecast %class.A* %[[r0]] to %class.A addrspace(5)*			// CHECK-NEXT: [[TMP0:%.]] = bitcast %class.A [[AGG_TMP_ASCAST]] to i8*
	// CHECK: call void @_Z22func_with_indirect_arg1A(%class.A addrspace(5)* %[[r2]])			// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 addrspacecast (i8 addrspace(1)* bitcast ([[CLASS_A]] addrspace(1)* @g_a to i8 addrspace(1)) to i8), i64 4, i1 false)
	// CHECK: call void @_ZN1AD1Ev(%class.A* {{[^,]*}} %[[r0]])			// CHECK-NEXT: [[AGG_TMP_ASCAST_ASCAST:%.]] = addrspacecast %class.A [[AGG_TMP_ASCAST]] to [[CLASS_A]] addrspace(5)*
	// CHECK: call void @_Z17func_with_ref_argR1A(%class.A* nonnull align 4 dereferenceable(4) addrspacecast (%class.A addrspace(1)* @g_a to %class.A*))			// CHECK-NEXT: call void @_Z22func_with_indirect_arg1A([[CLASS_A]] addrspace(5)* [[AGG_TMP_ASCAST_ASCAST]])
				// CHECK-NEXT: call void @_ZN1AD1Ev(%class.A* nonnull align 4 dereferenceable(4) [[AGG_TMP_ASCAST]])
				// CHECK-NEXT: call void @_Z17func_with_ref_argR1A(%class.A* nonnull align 4 dereferenceable(4) addrspacecast ([[CLASS_A]] addrspace(1)* @g_a to %class.A*))
				// CHECK-NEXT: ret void
				//
	void test_indirect_arg_global() {			void test_indirect_arg_global() {
	func_with_indirect_arg(g_a);			func_with_indirect_arg(g_a);
	func_with_ref_arg(g_a);			func_with_ref_arg(g_a);
	}			}

	// CHECK-LABEL: define{{.}} void @_Z19func_with_byval_arg1B(%class.B addrspace(5) byval(%class.B) align 4 %b)			// CHECK-LABEL: @_Z19func_with_byval_arg1B(
	// CHECK: %p = alloca %class.B*, align 8, addrspace(5)			// CHECK-NEXT: entry:
	// CHECK: %[[r1:.+]] = addrspacecast %class.B* addrspace(5)* %p to %class.B**			// CHECK-NEXT: [[P:%.]] = alloca %class.B, align 8, addrspace(5)
	// CHECK: %[[r0:.+]] = addrspacecast %class.B addrspace(5)* %b to %class.B*			// CHECK-NEXT: [[P_ASCAST:%.]] = addrspacecast %class.B addrspace(5)* [[P]] to %class.B**
	// CHECK: store %class.B* %[[r0]], %class.B** %[[r1]], align 8			// CHECK-NEXT: [[B_ASCAST:%.]] = addrspacecast [[CLASS_B:%.]] addrspace(5)* [[B:%.]] to %class.B
				// CHECK-NEXT: store %class.B* [[B_ASCAST]], %class.B** [[P_ASCAST]], align 8
				// CHECK-NEXT: ret void
				//
	void func_with_byval_arg(B b) {			void func_with_byval_arg(B b) {
	B *p = &b;			B *p = &b;
	}			}

	// CHECK-LABEL: define{{.*}} void @_Z19test_byval_arg_autov()			// CHECK-LABEL: @_Z19test_byval_arg_autov(
	// CHECK: %b = alloca %class.B, align 4, addrspace(5)			// CHECK-NEXT: entry:
	// CHECK: %[[r0:.+]] = addrspacecast %class.B addrspace(5)* %b to %class.B*			// CHECK-NEXT: [[B:%.]] = alloca [[CLASS_B:%.]], align 4, addrspace(5)
	// CHECK: %agg.tmp = alloca %class.B, align 4, addrspace(5)			// CHECK-NEXT: [[B_ASCAST:%.]] = addrspacecast [[CLASS_B]] addrspace(5) [[B]] to %class.B*
	// CHECK: %[[r1:.+]] = addrspacecast %class.B addrspace(5)* %agg.tmp to %class.B*			// CHECK-NEXT: [[AGG_TMP:%.*]] = alloca [[CLASS_B]], align 4, addrspace(5)
	// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64			// CHECK-NEXT: [[AGG_TMP_ASCAST:%.]] = addrspacecast [[CLASS_B]] addrspace(5) [[AGG_TMP]] to %class.B*
	// CHECK: %[[r4:.+]] = addrspacecast %class.B* %[[r1]] to %class.B addrspace(5)*			// CHECK-NEXT: [[TMP0:%.]] = bitcast %class.B [[AGG_TMP_ASCAST]] to i8*
	// CHECK: call void @_Z19func_with_byval_arg1B(%class.B addrspace(5)* byval(%class.B) align 4 %[[r4]])			// CHECK-NEXT: [[TMP1:%.]] = bitcast %class.B [[B_ASCAST]] to i8*
	// CHECK: call void @_Z17func_with_ref_argR1B(%class.B* nonnull align 4 dereferenceable(400) %[[r0]])			// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 [[TMP1]], i64 400, i1 false)
				// CHECK-NEXT: [[AGG_TMP_ASCAST_ASCAST:%.]] = addrspacecast %class.B [[AGG_TMP_ASCAST]] to [[CLASS_B]] addrspace(5)*
				// CHECK-NEXT: call void @_Z19func_with_byval_arg1B([[CLASS_B]] addrspace(5)* byval([[CLASS_B]]) align 4 [[AGG_TMP_ASCAST_ASCAST]])
				// CHECK-NEXT: call void @_Z17func_with_ref_argR1B(%class.B* nonnull align 4 dereferenceable(400) [[B_ASCAST]])
				// CHECK-NEXT: ret void
				//
	void test_byval_arg_auto() {			void test_byval_arg_auto() {
	B b;			B b;
	func_with_byval_arg(b);			func_with_byval_arg(b);
	func_with_ref_arg(b);			func_with_ref_arg(b);
	}			}

	// CHECK-LABEL: define{{.*}} void @_Z21test_byval_arg_globalv()			// CHECK-LABEL: @_Z21test_byval_arg_globalv(
	// CHECK: %agg.tmp = alloca %class.B, align 4, addrspace(5)			// CHECK-NEXT: entry:
	// CHECK: %[[r0:.+]] = addrspacecast %class.B addrspace(5)* %agg.tmp to %class.B*			// CHECK-NEXT: [[AGG_TMP:%.]] = alloca [[CLASS_B:%.]], align 4, addrspace(5)
	// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64			// CHECK-NEXT: [[AGG_TMP_ASCAST:%.]] = addrspacecast [[CLASS_B]] addrspace(5) [[AGG_TMP]] to %class.B*
	// CHECK: %[[r2:.+]] = addrspacecast %class.B* %[[r0]] to %class.B addrspace(5)*			// CHECK-NEXT: [[TMP0:%.]] = bitcast %class.B [[AGG_TMP_ASCAST]] to i8*
	// CHECK: call void @_Z19func_with_byval_arg1B(%class.B addrspace(5)* byval(%class.B) align 4 %[[r2]])			// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 addrspacecast (i8 addrspace(1)* bitcast ([[CLASS_B]] addrspace(1)* @g_b to i8 addrspace(1)) to i8), i64 400, i1 false)
	// CHECK: call void @_Z17func_with_ref_argR1B(%class.B* nonnull align 4 dereferenceable(400) addrspacecast (%class.B addrspace(1)* @g_b to %class.B*))			// CHECK-NEXT: [[AGG_TMP_ASCAST_ASCAST:%.]] = addrspacecast %class.B [[AGG_TMP_ASCAST]] to [[CLASS_B]] addrspace(5)*
				// CHECK-NEXT: call void @_Z19func_with_byval_arg1B([[CLASS_B]] addrspace(5)* byval([[CLASS_B]]) align 4 [[AGG_TMP_ASCAST_ASCAST]])
				// CHECK-NEXT: call void @_Z17func_with_ref_argR1B(%class.B* nonnull align 4 dereferenceable(400) addrspacecast ([[CLASS_B]] addrspace(1)* @g_b to %class.B*))
				// CHECK-NEXT: ret void
				//
	void test_byval_arg_global() {			void test_byval_arg_global() {
	func_with_byval_arg(g_b);			func_with_byval_arg(g_b);
	func_with_ref_arg(g_b);			func_with_ref_arg(g_b);
	}			}

clang/test/CodeGenCXX/builtin-amdgcn-atomic-inc-dec.cpp

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
	// REQUIRES: amdgpu-registered-target			// REQUIRES: amdgpu-registered-target
	// RUN: %clang_cc1 %s -x hip -fcuda-is-device -emit-llvm -O0 -o - \			// RUN: %clang_cc1 %s -x hip -fcuda-is-device -emit-llvm -O0 -o - \
	// RUN: -triple=amdgcn-amd-amdhsa \| opt -S \| FileCheck %s			// RUN: -triple=amdgcn-amd-amdhsa \| opt -S \| FileCheck %s

				// CHECK-LABEL: @_Z29test_non_volatile_parameter32Pj(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[PTR_ADDR:%.]] = alloca i32, align 8, addrspace(5)
				// CHECK-NEXT: [[PTR_ADDR_ASCAST:%.]] = addrspacecast i32 addrspace(5)* [[PTR_ADDR]] to i32**
				// CHECK-NEXT: [[RES:%.*]] = alloca i32, align 4, addrspace(5)
				// CHECK-NEXT: [[RES_ASCAST:%.]] = addrspacecast i32 addrspace(5) [[RES]] to i32*
				// CHECK-NEXT: store i32* [[PTR:%.]], i32* [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP0:%.]] = load i32, i32** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP1:%.]] = load i32, i32** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP2:%.]] = load i32, i32 [[TMP1]], align 4
				// CHECK-NEXT: [[TMP3:%.]] = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32 [[TMP0]], i32 [[TMP2]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP3]], i32* [[RES_ASCAST]], align 4
				// CHECK-NEXT: [[TMP4:%.]] = load i32, i32** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP5:%.]] = load i32, i32** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP6:%.]] = load i32, i32 [[TMP5]], align 4
				// CHECK-NEXT: [[TMP7:%.]] = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32 [[TMP4]], i32 [[TMP6]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP7]], i32* [[RES_ASCAST]], align 4
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_non_volatile_parameter32(__UINT32_TYPE__ *ptr) {			__attribute__((device)) void test_non_volatile_parameter32(__UINT32_TYPE__ *ptr) {
	// CHECK-LABEL: test_non_volatile_parameter32
	__UINT32_TYPE__ res;			__UINT32_TYPE__ res;
	// CHECK: %ptr.addr = alloca i32*, align 8, addrspace(5)
	// CHECK-NEXT: %ptr.addr.ascast = addrspacecast i32* addrspace(5)* %ptr.addr to i32**
	// CHECK-NEXT: %res = alloca i32, align 4, addrspace(5)
	// CHECK-NEXT: %res.ascast = addrspacecast i32 addrspace(5)* %res to i32*
	// CHECK-NEXT: store i32* %ptr, i32** %ptr.addr.ascast, align 8
	// CHECK-NEXT: %0 = load i32, i32* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %1 = load i32, i32* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %2 = load i32, i32* %1, align 4
	// CHECK-NEXT: %3 = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32* %0, i32 %2, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i32 %3, i32* %res.ascast, align 4
	res = __builtin_amdgcn_atomic_inc32(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");			res = __builtin_amdgcn_atomic_inc32(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");

	// CHECK: %4 = load i32, i32* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %5 = load i32, i32* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %6 = load i32, i32* %5, align 4
	// CHECK-NEXT: %7 = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32* %4, i32 %6, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i32 %7, i32* %res.ascast, align 4
	res = __builtin_amdgcn_atomic_dec32(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");			res = __builtin_amdgcn_atomic_dec32(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");
	}			}

				// CHECK-LABEL: @_Z29test_non_volatile_parameter64Py(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[PTR_ADDR:%.]] = alloca i64, align 8, addrspace(5)
				// CHECK-NEXT: [[PTR_ADDR_ASCAST:%.]] = addrspacecast i64 addrspace(5)* [[PTR_ADDR]] to i64**
				// CHECK-NEXT: [[RES:%.*]] = alloca i64, align 8, addrspace(5)
				// CHECK-NEXT: [[RES_ASCAST:%.]] = addrspacecast i64 addrspace(5) [[RES]] to i64*
				// CHECK-NEXT: store i64* [[PTR:%.]], i64* [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP0:%.]] = load i64, i64** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP1:%.]] = load i64, i64** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP2:%.]] = load i64, i64 [[TMP1]], align 8
				// CHECK-NEXT: [[TMP3:%.]] = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64 [[TMP0]], i64 [[TMP2]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP3]], i64* [[RES_ASCAST]], align 8
				// CHECK-NEXT: [[TMP4:%.]] = load i64, i64** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP5:%.]] = load i64, i64** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP6:%.]] = load i64, i64 [[TMP5]], align 8
				// CHECK-NEXT: [[TMP7:%.]] = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64 [[TMP4]], i64 [[TMP6]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP7]], i64* [[RES_ASCAST]], align 8
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_non_volatile_parameter64(__UINT64_TYPE__ *ptr) {			__attribute__((device)) void test_non_volatile_parameter64(__UINT64_TYPE__ *ptr) {
	// CHECK-LABEL: test_non_volatile_parameter64
	__UINT64_TYPE__ res;			__UINT64_TYPE__ res;
	// CHECK: %ptr.addr = alloca i64*, align 8, addrspace(5)
	// CHECK-NEXT: %ptr.addr.ascast = addrspacecast i64* addrspace(5)* %ptr.addr to i64**
	// CHECK-NEXT: %res = alloca i64, align 8, addrspace(5)
	// CHECK-NEXT: %res.ascast = addrspacecast i64 addrspace(5)* %res to i64*
	// CHECK-NEXT: store i64* %ptr, i64** %ptr.addr.ascast, align 8
	// CHECK-NEXT: %0 = load i64, i64* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %1 = load i64, i64* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %2 = load i64, i64* %1, align 8
	// CHECK-NEXT: %3 = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64* %0, i64 %2, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i64 %3, i64* %res.ascast, align 8
	res = __builtin_amdgcn_atomic_inc64(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");			res = __builtin_amdgcn_atomic_inc64(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");

	// CHECK: %4 = load i64, i64* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %5 = load i64, i64* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %6 = load i64, i64* %5, align 8
	// CHECK-NEXT: %7 = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64* %4, i64 %6, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i64 %7, i64* %res.ascast, align 8
	res = __builtin_amdgcn_atomic_dec64(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");			res = __builtin_amdgcn_atomic_dec64(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");
	}			}

				// CHECK-LABEL: @_Z25test_volatile_parameter32PVj(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[PTR_ADDR:%.]] = alloca i32, align 8, addrspace(5)
				// CHECK-NEXT: [[PTR_ADDR_ASCAST:%.]] = addrspacecast i32 addrspace(5)* [[PTR_ADDR]] to i32**
				// CHECK-NEXT: [[RES:%.*]] = alloca i32, align 4, addrspace(5)
				// CHECK-NEXT: [[RES_ASCAST:%.]] = addrspacecast i32 addrspace(5) [[RES]] to i32*
				// CHECK-NEXT: store i32* [[PTR:%.]], i32* [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP0:%.]] = load i32, i32** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP1:%.]] = load i32, i32** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP2:%.]] = load volatile i32, i32 [[TMP1]], align 4
				// CHECK-NEXT: [[TMP3:%.]] = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32 [[TMP0]], i32 [[TMP2]], i32 7, i32 2, i1 true)
				// CHECK-NEXT: store i32 [[TMP3]], i32* [[RES_ASCAST]], align 4
				// CHECK-NEXT: [[TMP4:%.]] = load i32, i32** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP5:%.]] = load i32, i32** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP6:%.]] = load volatile i32, i32 [[TMP5]], align 4
				// CHECK-NEXT: [[TMP7:%.]] = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32 [[TMP4]], i32 [[TMP6]], i32 7, i32 2, i1 true)
				// CHECK-NEXT: store i32 [[TMP7]], i32* [[RES_ASCAST]], align 4
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_volatile_parameter32(volatile __UINT32_TYPE__ *ptr) {			__attribute__((device)) void test_volatile_parameter32(volatile __UINT32_TYPE__ *ptr) {
	// CHECK-LABEL: test_volatile_parameter32
	__UINT32_TYPE__ res;			__UINT32_TYPE__ res;
	// CHECK: %ptr.addr = alloca i32*, align 8, addrspace(5)
	// CHECK-NEXT: %ptr.addr.ascast = addrspacecast i32* addrspace(5)* %ptr.addr to i32**
	// CHECK-NEXT: %res = alloca i32, align 4, addrspace(5)
	// CHECK-NEXT: %res.ascast = addrspacecast i32 addrspace(5)* %res to i32*
	// CHECK-NEXT: store i32* %ptr, i32** %ptr.addr.ascast, align 8
	// CHECK-NEXT: %0 = load i32, i32* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %1 = load i32, i32* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %2 = load volatile i32, i32* %1, align 4
	// CHECK-NEXT: %3 = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32* %0, i32 %2, i32 7, i32 2, i1 true)
	// CHECK-NEXT: store i32 %3, i32* %res.ascast, align 4
	res = __builtin_amdgcn_atomic_inc32(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");			res = __builtin_amdgcn_atomic_inc32(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");

	// CHECK: %4 = load i32, i32* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %5 = load i32, i32* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %6 = load volatile i32, i32* %5, align 4
	// CHECK-NEXT: %7 = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32* %4, i32 %6, i32 7, i32 2, i1 true)
	// CHECK-NEXT: store i32 %7, i32* %res.ascast, align 4
	res = __builtin_amdgcn_atomic_dec32(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");			res = __builtin_amdgcn_atomic_dec32(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");
	}			}

				// CHECK-LABEL: @_Z25test_volatile_parameter64PVy(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[PTR_ADDR:%.]] = alloca i64, align 8, addrspace(5)
				// CHECK-NEXT: [[PTR_ADDR_ASCAST:%.]] = addrspacecast i64 addrspace(5)* [[PTR_ADDR]] to i64**
				// CHECK-NEXT: [[RES:%.*]] = alloca i64, align 8, addrspace(5)
				// CHECK-NEXT: [[RES_ASCAST:%.]] = addrspacecast i64 addrspace(5) [[RES]] to i64*
				// CHECK-NEXT: store i64* [[PTR:%.]], i64* [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP0:%.]] = load i64, i64** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP1:%.]] = load i64, i64** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP2:%.]] = load volatile i64, i64 [[TMP1]], align 8
				// CHECK-NEXT: [[TMP3:%.]] = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64 [[TMP0]], i64 [[TMP2]], i32 7, i32 2, i1 true)
				// CHECK-NEXT: store i64 [[TMP3]], i64* [[RES_ASCAST]], align 8
				// CHECK-NEXT: [[TMP4:%.]] = load i64, i64** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP5:%.]] = load i64, i64** [[PTR_ADDR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP6:%.]] = load volatile i64, i64 [[TMP5]], align 8
				// CHECK-NEXT: [[TMP7:%.]] = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64 [[TMP4]], i64 [[TMP6]], i32 7, i32 2, i1 true)
				// CHECK-NEXT: store i64 [[TMP7]], i64* [[RES_ASCAST]], align 8
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_volatile_parameter64(volatile __UINT64_TYPE__ *ptr) {			__attribute__((device)) void test_volatile_parameter64(volatile __UINT64_TYPE__ *ptr) {
	// CHECK-LABEL: test_volatile_parameter64
	__UINT64_TYPE__ res;			__UINT64_TYPE__ res;
	// CHECK: %ptr.addr = alloca i64*, align 8, addrspace(5)
	// CHECK-NEXT: %ptr.addr.ascast = addrspacecast i64* addrspace(5)* %ptr.addr to i64**
	// CHECK-NEXT: %res = alloca i64, align 8, addrspace(5)
	// CHECK-NEXT: %res.ascast = addrspacecast i64 addrspace(5)* %res to i64*
	// CHECK-NEXT: store i64* %ptr, i64** %ptr.addr.ascast, align 8
	// CHECK-NEXT: %0 = load i64, i64* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %1 = load i64, i64* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %2 = load volatile i64, i64* %1, align 8
	// CHECK-NEXT: %3 = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64* %0, i64 %2, i32 7, i32 2, i1 true)
	// CHECK-NEXT: store i64 %3, i64* %res.ascast, align 8
	res = __builtin_amdgcn_atomic_inc64(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");			res = __builtin_amdgcn_atomic_inc64(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");

	// CHECK: %4 = load i64, i64* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %5 = load i64, i64* %ptr.addr.ascast, align 8
	// CHECK-NEXT: %6 = load volatile i64, i64* %5, align 8
	// CHECK-NEXT: %7 = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64* %4, i64 %6, i32 7, i32 2, i1 true)
	// CHECK-NEXT: store i64 %7, i64* %res.ascast, align 8
	res = __builtin_amdgcn_atomic_dec64(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");			res = __builtin_amdgcn_atomic_dec64(ptr, *ptr, __ATOMIC_SEQ_CST, "workgroup");
	}			}

				// CHECK-LABEL: @_Z13test_shared32v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[TMP0:%.]] = load i32, i32 addrspacecast (i32 addrspace(3)* @_ZZ13test_shared32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP1:%.]] = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32 addrspacecast (i32 addrspace(3)* @_ZZ13test_shared32vE3val to i32*), i32 [[TMP0]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP1]], i32* addrspacecast (i32 addrspace(3)* @_ZZ13test_shared32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP2:%.]] = load i32, i32 addrspacecast (i32 addrspace(3)* @_ZZ13test_shared32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP3:%.]] = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32 addrspacecast (i32 addrspace(3)* @_ZZ13test_shared32vE3val to i32*), i32 [[TMP2]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP3]], i32* addrspacecast (i32 addrspace(3)* @_ZZ13test_shared32vE3val to i32*), align 4
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_shared32() {			__attribute__((device)) void test_shared32() {
	// CHECK-LABEL: test_shared32
	__attribute__((shared)) __UINT32_TYPE__ val;			__attribute__((shared)) __UINT32_TYPE__ val;

	// CHECK: %0 = load i32, i32* addrspacecast (i32 addrspace(3)* @_ZZ13test_shared32vE3val to i32*), align 4
	// CHECK-NEXT: %1 = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32* addrspacecast (i32 addrspace(3)* @_ZZ13test_shared32vE3val to i32*), i32 %0, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i32 %1, i32* addrspacecast (i32 addrspace(3)* @_ZZ13test_shared32vE3val to i32*), align 4
	val = __builtin_amdgcn_atomic_inc32(&val, val, __ATOMIC_SEQ_CST, "workgroup");			val = __builtin_amdgcn_atomic_inc32(&val, val, __ATOMIC_SEQ_CST, "workgroup");

	// CHECK: %2 = load i32, i32* addrspacecast (i32 addrspace(3)* @_ZZ13test_shared32vE3val to i32*), align 4
	// CHECK-NEXT: %3 = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32* addrspacecast (i32 addrspace(3)* @_ZZ13test_shared32vE3val to i32*), i32 %2, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i32 %3, i32* addrspacecast (i32 addrspace(3)* @_ZZ13test_shared32vE3val to i32*), align 4
	val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_SEQ_CST, "workgroup");			val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_SEQ_CST, "workgroup");
	}			}

				// CHECK-LABEL: @_Z13test_shared64v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[TMP0:%.]] = load i64, i64 addrspacecast (i64 addrspace(3)* @_ZZ13test_shared64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP1:%.]] = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64 addrspacecast (i64 addrspace(3)* @_ZZ13test_shared64vE3val to i64*), i64 [[TMP0]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP1]], i64* addrspacecast (i64 addrspace(3)* @_ZZ13test_shared64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP2:%.]] = load i64, i64 addrspacecast (i64 addrspace(3)* @_ZZ13test_shared64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP3:%.]] = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64 addrspacecast (i64 addrspace(3)* @_ZZ13test_shared64vE3val to i64*), i64 [[TMP2]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP3]], i64* addrspacecast (i64 addrspace(3)* @_ZZ13test_shared64vE3val to i64*), align 8
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_shared64() {			__attribute__((device)) void test_shared64() {
	// CHECK-LABEL: test_shared64
	__attribute__((shared)) __UINT64_TYPE__ val;			__attribute__((shared)) __UINT64_TYPE__ val;

	// CHECK: %0 = load i64, i64* addrspacecast (i64 addrspace(3)* @_ZZ13test_shared64vE3val to i64*), align 8
	// CHECK-NEXT: %1 = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64* addrspacecast (i64 addrspace(3)* @_ZZ13test_shared64vE3val to i64*), i64 %0, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i64 %1, i64* addrspacecast (i64 addrspace(3)* @_ZZ13test_shared64vE3val to i64*), align 8
	val = __builtin_amdgcn_atomic_inc64(&val, val, __ATOMIC_SEQ_CST, "workgroup");			val = __builtin_amdgcn_atomic_inc64(&val, val, __ATOMIC_SEQ_CST, "workgroup");

	// CHECK: %2 = load i64, i64* addrspacecast (i64 addrspace(3)* @_ZZ13test_shared64vE3val to i64*), align 8
	// CHECK-NEXT: %3 = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64* addrspacecast (i64 addrspace(3)* @_ZZ13test_shared64vE3val to i64*), i64 %2, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i64 %3, i64* addrspacecast (i64 addrspace(3)* @_ZZ13test_shared64vE3val to i64*), align 8
	val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_SEQ_CST, "workgroup");			val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_SEQ_CST, "workgroup");
	}			}

	__attribute__((device)) __UINT32_TYPE__ global_val32;			__attribute__((device)) __UINT32_TYPE__ global_val32;
				// CHECK-LABEL: @_Z13test_global32v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[TMP0:%.]] = load i32, i32 addrspacecast (i32 addrspace(1)* @global_val32 to i32*), align 4
				// CHECK-NEXT: [[TMP1:%.]] = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32 addrspacecast (i32 addrspace(1)* @global_val32 to i32*), i32 [[TMP0]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP1]], i32* addrspacecast (i32 addrspace(1)* @global_val32 to i32*), align 4
				// CHECK-NEXT: [[TMP2:%.]] = load i32, i32 addrspacecast (i32 addrspace(1)* @global_val32 to i32*), align 4
				// CHECK-NEXT: [[TMP3:%.]] = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32 addrspacecast (i32 addrspace(1)* @global_val32 to i32*), i32 [[TMP2]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP3]], i32* addrspacecast (i32 addrspace(1)* @global_val32 to i32*), align 4
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_global32() {			__attribute__((device)) void test_global32() {
	// CHECK-LABEL: test_global32
	// CHECK: %0 = load i32, i32* addrspacecast (i32 addrspace(1)* @global_val32 to i32*), align 4
	// CHECK-NEXT: %1 = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32* addrspacecast (i32 addrspace(1)* @global_val32 to i32*), i32 %0, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i32 %1, i32* addrspacecast (i32 addrspace(1)* @global_val32 to i32*), align 4
	global_val32 = __builtin_amdgcn_atomic_inc32(&global_val32, global_val32, __ATOMIC_SEQ_CST, "workgroup");			global_val32 = __builtin_amdgcn_atomic_inc32(&global_val32, global_val32, __ATOMIC_SEQ_CST, "workgroup");

	// CHECK: %2 = load i32, i32* addrspacecast (i32 addrspace(1)* @global_val32 to i32*), align 4
	// CHECK-NEXT: %3 = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32* addrspacecast (i32 addrspace(1)* @global_val32 to i32*), i32 %2, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i32 %3, i32* addrspacecast (i32 addrspace(1)* @global_val32 to i32*), align 4
	global_val32 = __builtin_amdgcn_atomic_dec32(&global_val32, global_val32, __ATOMIC_SEQ_CST, "workgroup");			global_val32 = __builtin_amdgcn_atomic_dec32(&global_val32, global_val32, __ATOMIC_SEQ_CST, "workgroup");
	}			}

	__attribute__((device)) __UINT64_TYPE__ global_val64;			__attribute__((device)) __UINT64_TYPE__ global_val64;
				// CHECK-LABEL: @_Z13test_global64v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[TMP0:%.]] = load i64, i64 addrspacecast (i64 addrspace(1)* @global_val64 to i64*), align 8
				// CHECK-NEXT: [[TMP1:%.]] = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64 addrspacecast (i64 addrspace(1)* @global_val64 to i64*), i64 [[TMP0]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP1]], i64* addrspacecast (i64 addrspace(1)* @global_val64 to i64*), align 8
				// CHECK-NEXT: [[TMP2:%.]] = load i64, i64 addrspacecast (i64 addrspace(1)* @global_val64 to i64*), align 8
				// CHECK-NEXT: [[TMP3:%.]] = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64 addrspacecast (i64 addrspace(1)* @global_val64 to i64*), i64 [[TMP2]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP3]], i64* addrspacecast (i64 addrspace(1)* @global_val64 to i64*), align 8
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_global64() {			__attribute__((device)) void test_global64() {
	// CHECK-LABEL: test_global64
	// CHECK: %0 = load i64, i64* addrspacecast (i64 addrspace(1)* @global_val64 to i64*), align 8
	// CHECK-NEXT: %1 = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64* addrspacecast (i64 addrspace(1)* @global_val64 to i64*), i64 %0, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i64 %1, i64* addrspacecast (i64 addrspace(1)* @global_val64 to i64*), align 8
	global_val64 = __builtin_amdgcn_atomic_inc64(&global_val64, global_val64, __ATOMIC_SEQ_CST, "workgroup");			global_val64 = __builtin_amdgcn_atomic_inc64(&global_val64, global_val64, __ATOMIC_SEQ_CST, "workgroup");

	// CHECK: %2 = load i64, i64* addrspacecast (i64 addrspace(1)* @global_val64 to i64*), align 8
	// CHECK-NEXT: %3 = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64* addrspacecast (i64 addrspace(1)* @global_val64 to i64*), i64 %2, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i64 %3, i64* addrspacecast (i64 addrspace(1)* @global_val64 to i64*), align 8
	global_val64 = __builtin_amdgcn_atomic_dec64(&global_val64, global_val64, __ATOMIC_SEQ_CST, "workgroup");			global_val64 = __builtin_amdgcn_atomic_dec64(&global_val64, global_val64, __ATOMIC_SEQ_CST, "workgroup");
	}			}

	__attribute__((constant)) __UINT32_TYPE__ cval32;			__attribute__((constant)) __UINT32_TYPE__ cval32;
				// CHECK-LABEL: @_Z15test_constant32v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[LOCAL_VAL:%.*]] = alloca i32, align 4, addrspace(5)
				// CHECK-NEXT: [[LOCAL_VAL_ASCAST:%.]] = addrspacecast i32 addrspace(5) [[LOCAL_VAL]] to i32*
				// CHECK-NEXT: [[TMP0:%.]] = load i32, i32 addrspacecast (i32 addrspace(4)* @cval32 to i32*), align 4
				// CHECK-NEXT: [[TMP1:%.]] = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32 addrspacecast (i32 addrspace(4)* @cval32 to i32*), i32 [[TMP0]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP1]], i32* [[LOCAL_VAL_ASCAST]], align 4
				// CHECK-NEXT: [[TMP2:%.]] = load i32, i32 addrspacecast (i32 addrspace(4)* @cval32 to i32*), align 4
				// CHECK-NEXT: [[TMP3:%.]] = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32 addrspacecast (i32 addrspace(4)* @cval32 to i32*), i32 [[TMP2]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP3]], i32* [[LOCAL_VAL_ASCAST]], align 4
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_constant32() {			__attribute__((device)) void test_constant32() {
	// CHECK-LABEL: test_constant32
	__UINT32_TYPE__ local_val;			__UINT32_TYPE__ local_val;

	// CHECK: %0 = load i32, i32* addrspacecast (i32 addrspace(4)* @cval32 to i32*), align 4
	// CHECK-NEXT: %1 = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32* addrspacecast (i32 addrspace(4)* @cval32 to i32*), i32 %0, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i32 %1, i32* %local_val.ascast, align 4
	local_val = __builtin_amdgcn_atomic_inc32(&cval32, cval32, __ATOMIC_SEQ_CST, "workgroup");			local_val = __builtin_amdgcn_atomic_inc32(&cval32, cval32, __ATOMIC_SEQ_CST, "workgroup");

	// CHECK: %2 = load i32, i32* addrspacecast (i32 addrspace(4)* @cval32 to i32*), align 4
	// CHECK-NEXT: %3 = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32* addrspacecast (i32 addrspace(4)* @cval32 to i32*), i32 %2, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i32 %3, i32* %local_val.ascast, align 4
	local_val = __builtin_amdgcn_atomic_dec32(&cval32, cval32, __ATOMIC_SEQ_CST, "workgroup");			local_val = __builtin_amdgcn_atomic_dec32(&cval32, cval32, __ATOMIC_SEQ_CST, "workgroup");
	}			}

	__attribute__((constant)) __UINT64_TYPE__ cval64;			__attribute__((constant)) __UINT64_TYPE__ cval64;
				// CHECK-LABEL: @_Z15test_constant64v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[LOCAL_VAL:%.*]] = alloca i64, align 8, addrspace(5)
				// CHECK-NEXT: [[LOCAL_VAL_ASCAST:%.]] = addrspacecast i64 addrspace(5) [[LOCAL_VAL]] to i64*
				// CHECK-NEXT: [[TMP0:%.]] = load i64, i64 addrspacecast (i64 addrspace(4)* @cval64 to i64*), align 8
				// CHECK-NEXT: [[TMP1:%.]] = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64 addrspacecast (i64 addrspace(4)* @cval64 to i64*), i64 [[TMP0]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP1]], i64* [[LOCAL_VAL_ASCAST]], align 8
				// CHECK-NEXT: [[TMP2:%.]] = load i64, i64 addrspacecast (i64 addrspace(4)* @cval64 to i64*), align 8
				// CHECK-NEXT: [[TMP3:%.]] = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64 addrspacecast (i64 addrspace(4)* @cval64 to i64*), i64 [[TMP2]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP3]], i64* [[LOCAL_VAL_ASCAST]], align 8
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_constant64() {			__attribute__((device)) void test_constant64() {
	// CHECK-LABEL: test_constant64
	__UINT64_TYPE__ local_val;			__UINT64_TYPE__ local_val;

	// CHECK: %0 = load i64, i64* addrspacecast (i64 addrspace(4)* @cval64 to i64*), align 8
	// CHECK-NEXT: %1 = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64* addrspacecast (i64 addrspace(4)* @cval64 to i64*), i64 %0, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i64 %1, i64* %local_val.ascast, align 8
	local_val = __builtin_amdgcn_atomic_inc64(&cval64, cval64, __ATOMIC_SEQ_CST, "workgroup");			local_val = __builtin_amdgcn_atomic_inc64(&cval64, cval64, __ATOMIC_SEQ_CST, "workgroup");

	// CHECK: %2 = load i64, i64* addrspacecast (i64 addrspace(4)* @cval64 to i64*), align 8
	// CHECK-NEXT: %3 = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64* addrspacecast (i64 addrspace(4)* @cval64 to i64*), i64 %2, i32 7, i32 2, i1 false)
	// CHECK-NEXT: store i64 %3, i64* %local_val.ascast, align 8
	local_val = __builtin_amdgcn_atomic_dec64(&cval64, cval64, __ATOMIC_SEQ_CST, "workgroup");			local_val = __builtin_amdgcn_atomic_dec64(&cval64, cval64, __ATOMIC_SEQ_CST, "workgroup");
	}			}

				// CHECK-LABEL: @_Z12test_order32v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[TMP0:%.]] = load i32, i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP1:%.]] = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), i32 [[TMP0]], i32 2, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP1]], i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP2:%.]] = load i32, i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP3:%.]] = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), i32 [[TMP2]], i32 4, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP3]], i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP4:%.]] = load i32, i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP5:%.]] = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), i32 [[TMP4]], i32 4, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP5]], i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP6:%.]] = load i32, i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP7:%.]] = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), i32 [[TMP6]], i32 5, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP7]], i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP8:%.]] = load i32, i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP9:%.]] = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), i32 [[TMP8]], i32 6, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP9]], i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP10:%.]] = load i32, i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP11:%.]] = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), i32 [[TMP10]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP11]], i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32*), align 4
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_order32() {			__attribute__((device)) void test_order32() {
	// CHECK-LABEL: test_order32
	__attribute__((shared)) __UINT32_TYPE__ val;			__attribute__((shared)) __UINT32_TYPE__ val;

	// CHECK: call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32), i32 {{.}}, i32 2, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_inc32(&val, val, __ATOMIC_RELAXED, "workgroup");			val = __builtin_amdgcn_atomic_inc32(&val, val, __ATOMIC_RELAXED, "workgroup");

	// CHECK: call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32), i32 {{.}}, i32 4, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_inc32(&val, val, __ATOMIC_CONSUME, "workgroup");			val = __builtin_amdgcn_atomic_inc32(&val, val, __ATOMIC_CONSUME, "workgroup");

	// CHECK: call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32), i32 {{.}}, i32 4, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_inc32(&val, val, __ATOMIC_ACQUIRE, "workgroup");			val = __builtin_amdgcn_atomic_inc32(&val, val, __ATOMIC_ACQUIRE, "workgroup");

	// CHECK: call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32), i32 {{.}}, i32 5, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_RELEASE, "workgroup");			val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_RELEASE, "workgroup");

	// CHECK: call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32), i32 {{.}}, i32 6, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_ACQ_REL, "workgroup");			val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_ACQ_REL, "workgroup");

	// CHECK: call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_order32vE3val to i32), i32 {{.}}, i32 7, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_SEQ_CST, "workgroup");			val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_SEQ_CST, "workgroup");
	}			}

				// CHECK-LABEL: @_Z12test_order64v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[TMP0:%.]] = load i64, i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP1:%.]] = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), i64 [[TMP0]], i32 2, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP1]], i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP2:%.]] = load i64, i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP3:%.]] = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), i64 [[TMP2]], i32 4, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP3]], i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP4:%.]] = load i64, i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP5:%.]] = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), i64 [[TMP4]], i32 4, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP5]], i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP6:%.]] = load i64, i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP7:%.]] = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), i64 [[TMP6]], i32 5, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP7]], i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP8:%.]] = load i64, i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP9:%.]] = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), i64 [[TMP8]], i32 6, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP9]], i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP10:%.]] = load i64, i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP11:%.]] = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), i64 [[TMP10]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP11]], i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64*), align 8
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_order64() {			__attribute__((device)) void test_order64() {
	// CHECK-LABEL: test_order64
	__attribute__((shared)) __UINT64_TYPE__ val;			__attribute__((shared)) __UINT64_TYPE__ val;

	// CHECK: call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64), i64 {{.}}, i32 2, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_inc64(&val, val, __ATOMIC_RELAXED, "workgroup");			val = __builtin_amdgcn_atomic_inc64(&val, val, __ATOMIC_RELAXED, "workgroup");

	// CHECK: call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64), i64 {{.}}, i32 4, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_CONSUME, "workgroup");			val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_CONSUME, "workgroup");

	// CHECK: call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64), i64 {{.}}, i32 4, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_inc64(&val, val, __ATOMIC_ACQUIRE, "workgroup");			val = __builtin_amdgcn_atomic_inc64(&val, val, __ATOMIC_ACQUIRE, "workgroup");

	// CHECK: call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64), i64 {{.}}, i32 5, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_RELEASE, "workgroup");			val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_RELEASE, "workgroup");

	// CHECK: call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64), i64 {{.}}, i32 6, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_ACQ_REL, "workgroup");			val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_ACQ_REL, "workgroup");

	// CHECK: call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_order64vE3val to i64), i64 {{.}}, i32 7, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_SEQ_CST, "workgroup");			val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_SEQ_CST, "workgroup");
	}			}

				// CHECK-LABEL: @_Z12test_scope32v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[TMP0:%.]] = load i32, i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP1:%.]] = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), i32 [[TMP0]], i32 7, i32 1, i1 false)
				// CHECK-NEXT: store i32 [[TMP1]], i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP2:%.]] = load i32, i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP3:%.]] = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), i32 [[TMP2]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i32 [[TMP3]], i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP4:%.]] = load i32, i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP5:%.]] = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), i32 [[TMP4]], i32 7, i32 3, i1 false)
				// CHECK-NEXT: store i32 [[TMP5]], i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP6:%.]] = load i32, i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), align 4
				// CHECK-NEXT: [[TMP7:%.]] = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32 addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), i32 [[TMP6]], i32 7, i32 4, i1 false)
				// CHECK-NEXT: store i32 [[TMP7]], i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), align 4
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_scope32() {			__attribute__((device)) void test_scope32() {
	// CHECK-LABEL: test_scope32
	__attribute__((shared)) __UINT32_TYPE__ val;			__attribute__((shared)) __UINT32_TYPE__ val;

	// CHECK: %1 = call i32 @llvm.amdgcn.atomic.inc.i32.p0i32(i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), i32 %0, i32 7, i32 1, i1 false)
	val = __builtin_amdgcn_atomic_inc32(&val, val, __ATOMIC_SEQ_CST, "");			val = __builtin_amdgcn_atomic_inc32(&val, val, __ATOMIC_SEQ_CST, "");

	// CHECK: %3 = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), i32 %2, i32 7, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_SEQ_CST, "workgroup");			val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_SEQ_CST, "workgroup");

	// CHECK: %5 = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), i32 %4, i32 7, i32 3, i1 false)
	val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_SEQ_CST, "agent");			val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_SEQ_CST, "agent");

	// CHECK: %7 = call i32 @llvm.amdgcn.atomic.dec.i32.p0i32(i32* addrspacecast (i32 addrspace(3)* @_ZZ12test_scope32vE3val to i32*), i32 %6, i32 7, i32 4, i1 false)
	val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_SEQ_CST, "wavefront");			val = __builtin_amdgcn_atomic_dec32(&val, val, __ATOMIC_SEQ_CST, "wavefront");
	}			}

				// CHECK-LABEL: @_Z12test_scope64v(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[TMP0:%.]] = load i64, i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP1:%.]] = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), i64 [[TMP0]], i32 7, i32 1, i1 false)
				// CHECK-NEXT: store i64 [[TMP1]], i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP2:%.]] = load i64, i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP3:%.]] = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), i64 [[TMP2]], i32 7, i32 2, i1 false)
				// CHECK-NEXT: store i64 [[TMP3]], i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP4:%.]] = load i64, i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP5:%.]] = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), i64 [[TMP4]], i32 7, i32 3, i1 false)
				// CHECK-NEXT: store i64 [[TMP5]], i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP6:%.]] = load i64, i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), align 8
				// CHECK-NEXT: [[TMP7:%.]] = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64 addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), i64 [[TMP6]], i32 7, i32 4, i1 false)
				// CHECK-NEXT: store i64 [[TMP7]], i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), align 8
				// CHECK-NEXT: ret void
				//
	__attribute__((device)) void test_scope64() {			__attribute__((device)) void test_scope64() {
	// CHECK-LABEL: test_scope64
	__attribute__((shared)) __UINT64_TYPE__ val;			__attribute__((shared)) __UINT64_TYPE__ val;

	// CHECK: %1 = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), i64 %0, i32 7, i32 1, i1 false)
	val = __builtin_amdgcn_atomic_inc64(&val, val, __ATOMIC_SEQ_CST, "");			val = __builtin_amdgcn_atomic_inc64(&val, val, __ATOMIC_SEQ_CST, "");

	// CHECK: %3 = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), i64 %2, i32 7, i32 2, i1 false)
	val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_SEQ_CST, "workgroup");			val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_SEQ_CST, "workgroup");

	// CHECK: %5 = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), i64 %4, i32 7, i32 3, i1 false)
	val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_SEQ_CST, "agent");			val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_SEQ_CST, "agent");

	// CHECK: %7 = call i64 @llvm.amdgcn.atomic.dec.i64.p0i64(i64* addrspacecast (i64 addrspace(3)* @_ZZ12test_scope64vE3val to i64*), i64 %6, i32 7, i32 4, i1 false)
	val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_SEQ_CST, "wavefront");			val = __builtin_amdgcn_atomic_dec64(&val, val, __ATOMIC_SEQ_CST, "wavefront");
	}			}

clang/test/CodeGenSYCL/address-space-deduction.cpp

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
	// RUN: %clang_cc1 -triple spir64 -fsycl-is-device -disable-llvm-passes -emit-llvm %s -o - \| FileCheck %s			// RUN: %clang_cc1 -triple spir64 -fsycl-is-device -disable-llvm-passes -emit-llvm %s -o - \| FileCheck %s

	// CHECK: @_ZZ4testvE3foo = internal addrspace(1) constant i32 66, align 4
	// CHECK: @[[STR:[.a-zA-Z0-9_]+]] = private unnamed_addr addrspace(1) constant [14 x i8] c"Hello, world!\00", align 1

	// CHECK-LABEL: @_Z4testv			// CHECK-LABEL: @_Z4testv(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
				// CHECK-NEXT: [[I_ASCAST:%.]] = addrspacecast i32 [[I]] to i32 addrspace(4)*
				// CHECK-NEXT: [[PPTR:%.]] = alloca i32 addrspace(4), align 8
				// CHECK-NEXT: [[PPTR_ASCAST:%.]] = addrspacecast i32 addrspace(4)* [[PPTR]] to i32 addrspace(4)* addrspace(4)*
				// CHECK-NEXT: [[IS_I_PTR:%.*]] = alloca i8, align 1
				// CHECK-NEXT: [[IS_I_PTR_ASCAST:%.]] = addrspacecast i8 [[IS_I_PTR]] to i8 addrspace(4)*
				// CHECK-NEXT: [[VAR23:%.*]] = alloca i32, align 4
				// CHECK-NEXT: [[VAR23_ASCAST:%.]] = addrspacecast i32 [[VAR23]] to i32 addrspace(4)*
				// CHECK-NEXT: [[CP:%.]] = alloca i8 addrspace(4), align 8
				// CHECK-NEXT: [[CP_ASCAST:%.]] = addrspacecast i8 addrspace(4)* [[CP]] to i8 addrspace(4)* addrspace(4)*
				// CHECK-NEXT: [[ARR:%.*]] = alloca [42 x i32], align 4
				// CHECK-NEXT: [[ARR_ASCAST:%.]] = addrspacecast [42 x i32] [[ARR]] to [42 x i32] addrspace(4)*
				// CHECK-NEXT: [[CPP:%.]] = alloca i8 addrspace(4), align 8
				// CHECK-NEXT: [[CPP_ASCAST:%.]] = addrspacecast i8 addrspace(4)* [[CPP]] to i8 addrspace(4)* addrspace(4)*
				// CHECK-NEXT: [[APTR:%.]] = alloca i32 addrspace(4), align 8
				// CHECK-NEXT: [[APTR_ASCAST:%.]] = addrspacecast i32 addrspace(4)* [[APTR]] to i32 addrspace(4)* addrspace(4)*
				// CHECK-NEXT: [[STR:%.]] = alloca i8 addrspace(4), align 8
				// CHECK-NEXT: [[STR_ASCAST:%.]] = addrspacecast i8 addrspace(4)* [[STR]] to i8 addrspace(4)* addrspace(4)*
				// CHECK-NEXT: [[PHI_STR:%.]] = alloca i8 addrspace(4), align 8
				// CHECK-NEXT: [[PHI_STR_ASCAST:%.]] = addrspacecast i8 addrspace(4)* [[PHI_STR]] to i8 addrspace(4)* addrspace(4)*
				// CHECK-NEXT: [[SELECT_NULL:%.]] = alloca i8 addrspace(4), align 8
				// CHECK-NEXT: [[SELECT_NULL_ASCAST:%.]] = addrspacecast i8 addrspace(4)* [[SELECT_NULL]] to i8 addrspace(4)* addrspace(4)*
				// CHECK-NEXT: [[SELECT_STR_TRIVIAL1:%.]] = alloca i8 addrspace(4), align 8
				// CHECK-NEXT: [[SELECT_STR_TRIVIAL1_ASCAST:%.]] = addrspacecast i8 addrspace(4)* [[SELECT_STR_TRIVIAL1]] to i8 addrspace(4)* addrspace(4)*
				// CHECK-NEXT: [[SELECT_STR_TRIVIAL2:%.]] = alloca i8 addrspace(4), align 8
				// CHECK-NEXT: [[SELECT_STR_TRIVIAL2_ASCAST:%.]] = addrspacecast i8 addrspace(4)* [[SELECT_STR_TRIVIAL2]] to i8 addrspace(4)* addrspace(4)*
				// CHECK-NEXT: store i32 0, i32 addrspace(4)* [[I_ASCAST]], align 4
				// CHECK-NEXT: store i32 addrspace(4)* [[I_ASCAST]], i32 addrspace(4)* addrspace(4)* [[PPTR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP0:%.]] = load i32 addrspace(4), i32 addrspace(4)* addrspace(4)* [[PPTR_ASCAST]], align 8
				// CHECK-NEXT: [[CMP:%.]] = icmp eq i32 addrspace(4) [[TMP0]], [[I_ASCAST]]
				// CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
				// CHECK-NEXT: store i8 [[FROMBOOL]], i8 addrspace(4)* [[IS_I_PTR_ASCAST]], align 1
				// CHECK-NEXT: [[TMP1:%.]] = load i32 addrspace(4), i32 addrspace(4)* addrspace(4)* [[PPTR_ASCAST]], align 8
				// CHECK-NEXT: store i32 66, i32 addrspace(4)* [[TMP1]], align 4
				// CHECK-NEXT: store i32 23, i32 addrspace(4)* [[VAR23_ASCAST]], align 4
				// CHECK-NEXT: [[TMP2:%.]] = bitcast i32 addrspace(4) [[VAR23_ASCAST]] to i8 addrspace(4)*
				// CHECK-NEXT: store i8 addrspace(4)* [[TMP2]], i8 addrspace(4)* addrspace(4)* [[CP_ASCAST]], align 8
				// CHECK-NEXT: [[TMP3:%.]] = load i8 addrspace(4), i8 addrspace(4)* addrspace(4)* [[CP_ASCAST]], align 8
				// CHECK-NEXT: store i8 41, i8 addrspace(4)* [[TMP3]], align 1
				// CHECK-NEXT: [[ARRAYDECAY:%.]] = getelementptr inbounds [42 x i32], [42 x i32] addrspace(4) [[ARR_ASCAST]], i64 0, i64 0
				// CHECK-NEXT: [[TMP4:%.]] = bitcast i32 addrspace(4) [[ARRAYDECAY]] to i8 addrspace(4)*
				// CHECK-NEXT: store i8 addrspace(4)* [[TMP4]], i8 addrspace(4)* addrspace(4)* [[CPP_ASCAST]], align 8
				// CHECK-NEXT: [[TMP5:%.]] = load i8 addrspace(4), i8 addrspace(4)* addrspace(4)* [[CPP_ASCAST]], align 8
				// CHECK-NEXT: store i8 43, i8 addrspace(4)* [[TMP5]], align 1
				// CHECK-NEXT: [[ARRAYDECAY1:%.]] = getelementptr inbounds [42 x i32], [42 x i32] addrspace(4) [[ARR_ASCAST]], i64 0, i64 0
				// CHECK-NEXT: [[ADD_PTR:%.]] = getelementptr inbounds i32, i32 addrspace(4) [[ARRAYDECAY1]], i64 10
				// CHECK-NEXT: store i32 addrspace(4)* [[ADD_PTR]], i32 addrspace(4)* addrspace(4)* [[APTR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP6:%.]] = load i32 addrspace(4), i32 addrspace(4)* addrspace(4)* [[APTR_ASCAST]], align 8
				// CHECK-NEXT: [[ARRAYDECAY2:%.]] = getelementptr inbounds [42 x i32], [42 x i32] addrspace(4) [[ARR_ASCAST]], i64 0, i64 0
				// CHECK-NEXT: [[ADD_PTR3:%.]] = getelementptr inbounds i32, i32 addrspace(4) [[ARRAYDECAY2]], i64 168
				// CHECK-NEXT: [[CMP4:%.]] = icmp ult i32 addrspace(4) [[TMP6]], [[ADD_PTR3]]
				// CHECK-NEXT: br i1 [[CMP4]], label [[IF_THEN:%.]], label [[IF_END:%.]]
				// CHECK: if.then:
				// CHECK-NEXT: [[TMP7:%.]] = load i32 addrspace(4), i32 addrspace(4)* addrspace(4)* [[APTR_ASCAST]], align 8
				// CHECK-NEXT: store i32 44, i32 addrspace(4)* [[TMP7]], align 4
				// CHECK-NEXT: br label [[IF_END]]
				// CHECK: if.end:
				// CHECK-NEXT: store i8 addrspace(4)* getelementptr inbounds ([14 x i8], [14 x i8] addrspace(4)* addrspacecast ([14 x i8] addrspace(1)* @.str to [14 x i8] addrspace(4)), i64 0, i64 0), i8 addrspace(4) addrspace(4)* [[STR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP8:%.]] = load i8 addrspace(4), i8 addrspace(4)* addrspace(4)* [[STR_ASCAST]], align 8
				// CHECK-NEXT: [[ARRAYIDX:%.]] = getelementptr inbounds i8, i8 addrspace(4) [[TMP8]], i64 0
				// CHECK-NEXT: [[TMP9:%.]] = load i8, i8 addrspace(4) [[ARRAYIDX]], align 1
				// CHECK-NEXT: [[CONV:%.*]] = sext i8 [[TMP9]] to i32
				// CHECK-NEXT: store i32 [[CONV]], i32 addrspace(4)* [[I_ASCAST]], align 4
				// CHECK-NEXT: [[TMP10:%.]] = load i32, i32 addrspace(4) [[I_ASCAST]], align 4
				// CHECK-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], 2
				// CHECK-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.]], label [[COND_FALSE:%.]]
				// CHECK: cond.true:
				// CHECK-NEXT: [[TMP11:%.]] = load i8 addrspace(4), i8 addrspace(4)* addrspace(4)* [[STR_ASCAST]], align 8
				// CHECK-NEXT: br label [[COND_END:%.*]]
				// CHECK: cond.false:
				// CHECK-NEXT: br label [[COND_END]]
				// CHECK: cond.end:
				// CHECK-NEXT: [[COND:%.]] = phi i8 addrspace(4) [ [[TMP11]], [[COND_TRUE]] ], [ getelementptr inbounds ([21 x i8], [21 x i8] addrspace(4)* addrspacecast ([21 x i8] addrspace(1)* @.str.1 to [21 x i8] addrspace(4)*), i64 0, i64 0), [[COND_FALSE]] ]
				// CHECK-NEXT: store i8 addrspace(4)* [[COND]], i8 addrspace(4)* addrspace(4)* [[PHI_STR_ASCAST]], align 8
				// CHECK-NEXT: [[TMP12:%.]] = load i32, i32 addrspace(4) [[I_ASCAST]], align 4
				// CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP12]], 2
				// CHECK-NEXT: [[TMP13:%.*]] = zext i1 [[CMP6]] to i64
				// CHECK-NEXT: [[COND7:%.]] = select i1 [[CMP6]], i8 addrspace(4) getelementptr inbounds ([24 x i8], [24 x i8] addrspace(4)* addrspacecast ([24 x i8] addrspace(1)* @.str.2 to [24 x i8] addrspace(4)), i64 0, i64 0), i8 addrspace(4) null
				// CHECK-NEXT: store i8 addrspace(4)* [[COND7]], i8 addrspace(4)* addrspace(4)* [[SELECT_NULL_ASCAST]], align 8
				// CHECK-NEXT: [[TMP14:%.]] = load i8 addrspace(4), i8 addrspace(4)* addrspace(4)* [[STR_ASCAST]], align 8
				// CHECK-NEXT: store i8 addrspace(4)* [[TMP14]], i8 addrspace(4)* addrspace(4)* [[SELECT_STR_TRIVIAL1_ASCAST]], align 8
				// CHECK-NEXT: store i8 addrspace(4)* getelementptr inbounds ([21 x i8], [21 x i8] addrspace(4)* addrspacecast ([21 x i8] addrspace(1)* @.str.1 to [21 x i8] addrspace(4)), i64 0, i64 0), i8 addrspace(4) addrspace(4)* [[SELECT_STR_TRIVIAL2_ASCAST]], align 8
				// CHECK-NEXT: ret void
				//
	void test() {			void test() {
	static const int foo = 0x42;			static const int foo = 0x42;

	// CHECK: %i.ascast = addrspacecast i32* %i to i32 addrspace(4)*
	// CHECK: %[[ARR:[a-zA-Z0-9]+]] = alloca [42 x i32]
	// CHECK: %[[ARR]].ascast = addrspacecast [42 x i32]* %[[ARR]] to [42 x i32] addrspace(4)*

	int i = 0;			int i = 0;
	int *pptr = &i;			int *pptr = &i;
	// CHECK: store i32 addrspace(4)* %i.ascast, i32 addrspace(4)* addrspace(4)* %pptr.ascast
	bool is_i_ptr = (pptr == &i);			bool is_i_ptr = (pptr == &i);
	// CHECK: %[[VALPPTR:[0-9]+]] = load i32 addrspace(4), i32 addrspace(4) addrspace(4)* %pptr.ascast
	// CHECK: %cmp{{[0-9]}} = icmp eq i32 addrspace(4) %[[VALPPTR]], %i.ascast
	*pptr = foo;			*pptr = foo;

	int var23 = 23;			int var23 = 23;
	char cp = (char )&var23;			char cp = (char )&var23;
	*cp = 41;			*cp = 41;
	// CHECK: store i32 23, i32 addrspace(4)* %[[VAR:[a-zA-Z0-9.]+]]
	// CHECK: [[VARCAST:%.]] = bitcast i32 addrspace(4) %[[VAR]] to i8 addrspace(4)*
	// CHECK: store i8 addrspace(4)* [[VARCAST]], i8 addrspace(4)* addrspace(4)* %{{.*}}

	int arr[42];			int arr[42];
	char cpp = (char )arr;			char cpp = (char )arr;
	*cpp = 43;			*cpp = 43;
	// CHECK: [[ARRDECAY:%.]] = getelementptr inbounds [42 x i32], [42 x i32] addrspace(4) %[[ARR]].ascast, i64 0, i64 0
	// CHECK: [[ARRCAST:%.]] = bitcast i32 addrspace(4) [[ARRDECAY]] to i8 addrspace(4)*
	// CHECK: store i8 addrspace(4)* [[ARRCAST]], i8 addrspace(4)* addrspace(4)* %{{.*}}

	int *aptr = arr + 10;			int *aptr = arr + 10;
	if (aptr < arr + sizeof(arr))			if (aptr < arr + sizeof(arr))
	*aptr = 44;			*aptr = 44;
	// CHECK: %[[VALAPTR:.]] = load i32 addrspace(4), i32 addrspace(4)* addrspace(4)* %aptr.ascast
	// CHECK: %[[ARRDCY2:.]] = getelementptr inbounds [42 x i32], [42 x i32] addrspace(4) %[[ARR]].ascast, i64 0, i64 0
	// CHECK: %[[ADDPTR:.]] = getelementptr inbounds i32, i32 addrspace(4) %[[ARRDCY2]], i64 168
	// CHECK: %cmp{{[0-9]+}} = icmp ult i32 addrspace(4)* %[[VALAPTR]], %[[ADDPTR]]

	const char *str = "Hello, world!";			const char *str = "Hello, world!";
	// CHECK: store i8 addrspace(4)* getelementptr inbounds ([14 x i8], [14 x i8] addrspace(4)* addrspacecast ([14 x i8] addrspace(1)* @[[STR]] to [14 x i8] addrspace(4)), i64 0, i64 0), i8 addrspace(4) addrspace(4)* %[[STRVAL:[a-zA-Z0-9]+]].ascast, align 8

	i = str[0];			i = str[0];

	const char *phi_str = i > 2 ? str : "Another hello world!";			const char *phi_str = i > 2 ? str : "Another hello world!";
	(void)phi_str;			(void)phi_str;
	// CHECK: %[[COND:[a-zA-Z0-9]+]] = icmp sgt i32 %{{.*}}, 2
	// CHECK: br i1 %[[COND]], label %[[CONDTRUE:[.a-zA-Z0-9]+]], label %[[CONDFALSE:[.a-zA-Z0-9]+]]

	// CHECK: [[CONDTRUE]]:
	// CHECK-NEXT: %[[VALTRUE:[a-zA-Z0-9]+]] = load i8 addrspace(4), i8 addrspace(4) addrspace(4)* %str.ascast
	// CHECK-NEXT: br label %[[CONDEND:[.a-zA-Z0-9]+]]

	// CHECK: [[CONDFALSE]]:

	// CHECK: [[CONDEND]]:
	// CHECK-NEXT: phi i8 addrspace(4)* [ %[[VALTRUE]], %[[CONDTRUE]] ], [ getelementptr inbounds ([21 x i8], [21 x i8] addrspace(4)* addrspacecast ([21 x i8] addrspace(1)* @{{.}} to [21 x i8] addrspace(4)), i64 0, i64 0), %[[CONDFALSE]] ]

	const char *select_null = i > 2 ? "Yet another Hello world" : nullptr;			const char *select_null = i > 2 ? "Yet another Hello world" : nullptr;
	(void)select_null;			(void)select_null;
	// CHECK: select i1 %{{.}}, i8 addrspace(4) getelementptr inbounds ([24 x i8], [24 x i8] addrspace(4)* addrspacecast ([24 x i8] addrspace(1)* @{{.}} to [24 x i8] addrspace(4)), i64 0, i64 0)

	const char *select_str_trivial1 = true ? str : "Another hello world!";			const char *select_str_trivial1 = true ? str : "Another hello world!";
	(void)select_str_trivial1;			(void)select_str_trivial1;
	// CHECK: %[[TRIVIALTRUE:[a-zA-Z0-9]+]] = load i8 addrspace(4), i8 addrspace(4) addrspace(4)* %[[STRVAL]]
	// CHECK: store i8 addrspace(4)* %[[TRIVIALTRUE]], i8 addrspace(4)* addrspace(4)* %{{.*}}, align 8

	const char *select_str_trivial2 = false ? str : "Another hello world!";			const char *select_str_trivial2 = false ? str : "Another hello world!";
	(void)select_str_trivial2;			(void)select_str_trivial2;
	}			}

clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp

This file is larger than 256 KB, so syntax highlighting is disabled by default.

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	//			//
	//			//
	// CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg			// CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
	// CHECK14-SAME: () #[[ATTR5:[0-9]+]] {			// CHECK14-SAME: () #[[ATTR5:[0-9]+]] {
	// CHECK14-NEXT: entry:			// CHECK14-NEXT: entry:
	// CHECK14-NEXT: call void @__tgt_register_requires(i64 1)			// CHECK14-NEXT: call void @__tgt_register_requires(i64 1)
	// CHECK14-NEXT: ret void			// CHECK14-NEXT: ret void
	//			//
	//
	No newline at end of file

clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp

This file is larger than 256 KB, so syntax highlighting is disabled by default.

	Show First 20 Lines • Show All 194 Lines • ▼ Show 20 Lines
	// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK1-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK1-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z9gtid_testv()			// CHECK1-NEXT: call void @_Z9gtid_testv()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK1-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK1-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z3fn4v()			// CHECK1-NEXT: call void @_Z3fn4v()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z3fn5v()			// CHECK1-NEXT: call void @_Z3fn5v()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: br label [[OMP_IF_END]]			// CHECK1-NEXT: br label [[OMP_IF_END]]
	// CHECK1: omp_if.end:			// CHECK1: omp_if.end:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
	// CHECK1-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0			// CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
	// CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z3fn6v()			// CHECK1-NEXT: call void @_Z3fn6v()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK1-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK1-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z3fn1v()			// CHECK1-NEXT: call void @_Z3fn1v()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK1-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z3fn2v()			// CHECK1-NEXT: call void @_Z3fn2v()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: br label [[OMP_IF_END]]			// CHECK1-NEXT: br label [[OMP_IF_END]]
	// CHECK1: omp_if.end:			// CHECK1: omp_if.end:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
	// CHECK1-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0			// CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
	// CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z3fn3v()			// CHECK1-NEXT: call void @_Z3fn3v()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK2-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK2-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK2-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @_Z9gtid_testv()			// CHECK2-NEXT: call void @_Z9gtid_testv()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK2-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK2-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @_Z3fn4v()			// CHECK2-NEXT: call void @_Z3fn4v()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK2-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK2-NEXT: call void @_Z3fn5v()			// CHECK2-NEXT: call void @_Z3fn5v()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
	▲ Show 20 Lines • Show All 77 Lines • ▼ Show 20 Lines
	// CHECK2-NEXT: br label [[OMP_IF_END]]			// CHECK2-NEXT: br label [[OMP_IF_END]]
	// CHECK2: omp_if.end:			// CHECK2: omp_if.end:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
	// CHECK2-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0			// CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
	// CHECK2-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @_Z3fn6v()			// CHECK2-NEXT: call void @_Z3fn6v()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK2-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK2-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK2-NEXT: call void @_Z3fn1v()			// CHECK2-NEXT: call void @_Z3fn1v()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK2-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK2-NEXT: call void @_Z3fn2v()			// CHECK2-NEXT: call void @_Z3fn2v()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
	▲ Show 20 Lines • Show All 77 Lines • ▼ Show 20 Lines
	// CHECK2-NEXT: br label [[OMP_IF_END]]			// CHECK2-NEXT: br label [[OMP_IF_END]]
	// CHECK2: omp_if.end:			// CHECK2: omp_if.end:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
	// CHECK2-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0			// CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
	// CHECK2-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK2-NEXT: call void @_Z3fn3v()			// CHECK2-NEXT: call void @_Z3fn3v()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
	▲ Show 20 Lines • Show All 88 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK3-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK3-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK3-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: call void @_Z9gtid_testv()			// CHECK3-NEXT: call void @_Z9gtid_testv()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK3-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK3-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: call void @_Z3fn4v()			// CHECK3-NEXT: call void @_Z3fn4v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK3-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: call void @_Z3fn5v()			// CHECK3-NEXT: call void @_Z3fn5v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
	▲ Show 20 Lines • Show All 96 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: br label [[OMP_IF_END]]			// CHECK3-NEXT: br label [[OMP_IF_END]]
	// CHECK3: omp_if.end:			// CHECK3: omp_if.end:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_IF_END23:%.*]]			// CHECK3-NEXT: br label [[OMP_IF_END23:%.*]]
	// CHECK3: omp_if.else7:			// CHECK3: omp_if.else7:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
	// CHECK3: omp.inner.for.cond8:			// CHECK3: omp.inner.for.cond8:
	// CHECK3-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP21:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4			// CHECK3-NEXT: [[TMP21:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4
	// CHECK3-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]			// CHECK3-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
	Show All 23 Lines
	// CHECK3-NEXT: br label [[OMP_IF_END19]]			// CHECK3-NEXT: br label [[OMP_IF_END19]]
	// CHECK3: omp_if.end19:			// CHECK3: omp_if.end19:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC20:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC20:%.*]]
	// CHECK3: omp.inner.for.inc20:			// CHECK3: omp.inner.for.inc20:
	// CHECK3-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP31:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP31:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]			// CHECK3-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
	// CHECK3-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP38:![0-9]+]]
	// CHECK3: omp.inner.for.end22:			// CHECK3: omp.inner.for.end22:
	// CHECK3-NEXT: br label [[OMP_IF_END23]]			// CHECK3-NEXT: br label [[OMP_IF_END23]]
	// CHECK3: omp_if.end23:			// CHECK3: omp_if.end23:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP32:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP32:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0			// CHECK3-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
	▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: call void @_Z3fn6v()			// CHECK3-NEXT: call void @_Z3fn6v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK3: omp_if.else:			// CHECK3: omp_if.else:
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK3-NEXT: call void @_Z3fn6v()			// CHECK3-NEXT: call void @_Z3fn6v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK3: omp.body.continue15:			// CHECK3: omp.body.continue15:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK3: omp.inner.for.inc16:			// CHECK3: omp.inner.for.inc16:
	// CHECK3-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP42:![0-9]+]]
	// CHECK3: omp.inner.for.end18:			// CHECK3: omp.inner.for.end18:
	// CHECK3-NEXT: br label [[OMP_IF_END]]			// CHECK3-NEXT: br label [[OMP_IF_END]]
	// CHECK3: omp_if.end:			// CHECK3: omp_if.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK3-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK3-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK3-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: call void @_Z3fn6v()			// CHECK3-NEXT: call void @_Z3fn6v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK3: omp_if.else:			// CHECK3: omp_if.else:
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK3-NEXT: call void @_Z3fn6v()			// CHECK3-NEXT: call void @_Z3fn6v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK3: omp.body.continue15:			// CHECK3: omp.body.continue15:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK3: omp.inner.for.inc16:			// CHECK3: omp.inner.for.inc16:
	// CHECK3-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP46:![0-9]+]]
	// CHECK3: omp.inner.for.end18:			// CHECK3: omp.inner.for.end18:
	// CHECK3-NEXT: br label [[OMP_IF_END]]			// CHECK3-NEXT: br label [[OMP_IF_END]]
	// CHECK3: omp_if.end:			// CHECK3: omp_if.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK3-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK3-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK3-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 114 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK3-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK3-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: call void @_Z3fn1v()			// CHECK3-NEXT: call void @_Z3fn1v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK3-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: call void @_Z3fn2v()			// CHECK3-NEXT: call void @_Z3fn2v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: br label [[OMP_IF_END]]			// CHECK3-NEXT: br label [[OMP_IF_END]]
	// CHECK3: omp_if.end:			// CHECK3: omp_if.end:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
	// CHECK3-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0			// CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
	// CHECK3-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: call void @_Z3fn3v()			// CHECK3-NEXT: call void @_Z3fn3v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK4-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK4-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
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	// CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK4-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @_Z9gtid_testv()			// CHECK4-NEXT: call void @_Z9gtid_testv()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK4-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK4-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @_Z3fn4v()			// CHECK4-NEXT: call void @_Z3fn4v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK4-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @_Z3fn5v()			// CHECK4-NEXT: call void @_Z3fn5v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	▲ Show 20 Lines • Show All 96 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: br label [[OMP_IF_END]]			// CHECK4-NEXT: br label [[OMP_IF_END]]
	// CHECK4: omp_if.end:			// CHECK4: omp_if.end:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_IF_END23:%.*]]			// CHECK4-NEXT: br label [[OMP_IF_END23:%.*]]
	// CHECK4: omp_if.else7:			// CHECK4: omp_if.else7:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
	// CHECK4: omp.inner.for.cond8:			// CHECK4: omp.inner.for.cond8:
	// CHECK4-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP21:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4			// CHECK4-NEXT: [[TMP21:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4
	// CHECK4-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]			// CHECK4-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
	Show All 23 Lines
	// CHECK4-NEXT: br label [[OMP_IF_END19]]			// CHECK4-NEXT: br label [[OMP_IF_END19]]
	// CHECK4: omp_if.end19:			// CHECK4: omp_if.end19:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC20:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC20:%.*]]
	// CHECK4: omp.inner.for.inc20:			// CHECK4: omp.inner.for.inc20:
	// CHECK4-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP31:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP31:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]			// CHECK4-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
	// CHECK4-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP38:![0-9]+]]
	// CHECK4: omp.inner.for.end22:			// CHECK4: omp.inner.for.end22:
	// CHECK4-NEXT: br label [[OMP_IF_END23]]			// CHECK4-NEXT: br label [[OMP_IF_END23]]
	// CHECK4: omp_if.end23:			// CHECK4: omp_if.end23:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP32:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP32:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0			// CHECK4-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
	▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @_Z3fn6v()			// CHECK4-NEXT: call void @_Z3fn6v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK4-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK4: omp_if.else:			// CHECK4: omp_if.else:
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK4-NEXT: call void @_Z3fn6v()			// CHECK4-NEXT: call void @_Z3fn6v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK4: omp.body.continue15:			// CHECK4: omp.body.continue15:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK4: omp.inner.for.inc16:			// CHECK4: omp.inner.for.inc16:
	// CHECK4-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK4-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP42:![0-9]+]]
	// CHECK4: omp.inner.for.end18:			// CHECK4: omp.inner.for.end18:
	// CHECK4-NEXT: br label [[OMP_IF_END]]			// CHECK4-NEXT: br label [[OMP_IF_END]]
	// CHECK4: omp_if.end:			// CHECK4: omp_if.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK4-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK4-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK4-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @_Z3fn6v()			// CHECK4-NEXT: call void @_Z3fn6v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK4-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK4: omp_if.else:			// CHECK4: omp_if.else:
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK4-NEXT: call void @_Z3fn6v()			// CHECK4-NEXT: call void @_Z3fn6v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK4: omp.body.continue15:			// CHECK4: omp.body.continue15:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK4: omp.inner.for.inc16:			// CHECK4: omp.inner.for.inc16:
	// CHECK4-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK4-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP46:![0-9]+]]
	// CHECK4: omp.inner.for.end18:			// CHECK4: omp.inner.for.end18:
	// CHECK4-NEXT: br label [[OMP_IF_END]]			// CHECK4-NEXT: br label [[OMP_IF_END]]
	// CHECK4: omp_if.end:			// CHECK4: omp_if.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK4-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK4-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK4-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 114 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK4-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK4-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
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	// CHECK4-NEXT: call void @_Z3fn1v()			// CHECK4-NEXT: call void @_Z3fn1v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
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	// CHECK4-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK4-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
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	// CHECK4-NEXT: call void @_Z3fn2v()			// CHECK4-NEXT: call void @_Z3fn2v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
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	// CHECK4-NEXT: br label [[OMP_IF_END]]			// CHECK4-NEXT: br label [[OMP_IF_END]]
	// CHECK4: omp_if.end:			// CHECK4: omp_if.end:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
	// CHECK4-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0			// CHECK4-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
	// CHECK4-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @_Z3fn3v()			// CHECK4-NEXT: call void @_Z3fn3v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	Show All 24 Lines
	// CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK5-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK5-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK5: omp.inner.for.cond:			// CHECK5: omp.inner.for.cond:
	// CHECK5-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK5-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !2			// CHECK5-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK5: omp.inner.for.body:			// CHECK5: omp.inner.for.body:
	// CHECK5-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK5-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2			// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK5: omp.body.continue:			// CHECK5: omp.body.continue:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK5: omp.inner.for.inc:			// CHECK5: omp.inner.for.inc:
	// CHECK5-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK5-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
	// CHECK5: omp.inner.for.end:			// CHECK5: omp.inner.for.end:
	// CHECK5-NEXT: store i32 100, i32* [[I]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK5-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK5-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK5: omp.inner.for.cond7:			// CHECK5: omp.inner.for.cond7:
	// CHECK5-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK5-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !6			// CHECK5-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK5: omp.inner.for.body9:			// CHECK5: omp.inner.for.body9:
	// CHECK5-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK5-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !6			// CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK5-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !6			// CHECK5-NEXT: call void @_Z9gtid_testv()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK5: omp.body.continue12:			// CHECK5: omp.body.continue12:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK5: omp.inner.for.inc13:			// CHECK5: omp.inner.for.inc13:
	// CHECK5-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK5-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK5: omp.inner.for.end15:			// CHECK5: omp.inner.for.end15:
	// CHECK5-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK5-NEXT: ret void			// CHECK5-NEXT: ret void
	//			//
	//			//
	// CHECK5-LABEL: define {{[^@]+}}@main			// CHECK5-LABEL: define {{[^@]+}}@main
	// CHECK5-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK5-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 16 Lines
	// CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK5-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK5-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK5: omp.inner.for.cond:			// CHECK5: omp.inner.for.cond:
	// CHECK5-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK5-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !9			// CHECK5-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK5: omp.inner.for.body:			// CHECK5: omp.inner.for.body:
	// CHECK5-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK5-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9			// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK5-NEXT: call void @_Z3fn4v(), !llvm.access.group !9			// CHECK5-NEXT: call void @_Z3fn4v()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK5: omp.body.continue:			// CHECK5: omp.body.continue:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK5: omp.inner.for.inc:			// CHECK5: omp.inner.for.inc:
	// CHECK5-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK5-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
	// CHECK5: omp.inner.for.end:			// CHECK5: omp.inner.for.end:
	// CHECK5-NEXT: store i32 100, i32* [[I]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK5-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK5-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK5: omp.inner.for.cond7:			// CHECK5: omp.inner.for.cond7:
	// CHECK5-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK5-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !12			// CHECK5-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK5: omp.inner.for.body9:			// CHECK5: omp.inner.for.body9:
	// CHECK5-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK5-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !12			// CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK5-NEXT: call void @_Z3fn5v(), !llvm.access.group !12			// CHECK5-NEXT: call void @_Z3fn5v()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK5: omp.body.continue12:			// CHECK5: omp.body.continue12:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK5: omp.inner.for.inc13:			// CHECK5: omp.inner.for.inc13:
	// CHECK5-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK5-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
	// CHECK5: omp.inner.for.end15:			// CHECK5: omp.inner.for.end15:
	// CHECK5-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK5-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK5-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK5-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4			// CHECK5-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK5: omp.inner.for.cond21:			// CHECK5: omp.inner.for.cond21:
	// CHECK5-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK5-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !15			// CHECK5-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]			// CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
	// CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK5: omp.inner.for.body23:			// CHECK5: omp.inner.for.body23:
	// CHECK5-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK5-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1			// CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
	// CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !15			// CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK5-NEXT: call void @_Z3fn6v(), !llvm.access.group !15			// CHECK5-NEXT: call void @_Z3fn6v()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK5: omp.body.continue26:			// CHECK5: omp.body.continue26:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK5: omp.inner.for.inc27:			// CHECK5: omp.inner.for.inc27:
	// CHECK5-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK5-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1			// CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
	// CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK5: omp.inner.for.end29:			// CHECK5: omp.inner.for.end29:
	// CHECK5-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK5-NEXT: [[TMP15:%.]] = load i32, i32 @Arg, align 4			// CHECK5-NEXT: [[TMP15:%.]] = load i32, i32 @Arg, align 4
	// CHECK5-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]])			// CHECK5-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]])
	// CHECK5-NEXT: ret i32 [[CALL]]			// CHECK5-NEXT: ret i32 [[CALL]]
	//			//
	//			//
	Show All 18 Lines
	// CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK5-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK5-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK5-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK5-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK5: omp.inner.for.cond:			// CHECK5: omp.inner.for.cond:
	// CHECK5-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK5-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !18			// CHECK5-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK5: omp.inner.for.body:			// CHECK5: omp.inner.for.body:
	// CHECK5-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK5-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18			// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK5-NEXT: call void @_Z3fn1v(), !llvm.access.group !18			// CHECK5-NEXT: call void @_Z3fn1v()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK5: omp.body.continue:			// CHECK5: omp.body.continue:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK5: omp.inner.for.inc:			// CHECK5: omp.inner.for.inc:
	// CHECK5-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK5-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
	// CHECK5: omp.inner.for.end:			// CHECK5: omp.inner.for.end:
	// CHECK5-NEXT: store i32 100, i32* [[I]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK5-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK5-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK5: omp.inner.for.cond7:			// CHECK5: omp.inner.for.cond7:
	// CHECK5-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK5-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !21			// CHECK5-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK5: omp.inner.for.body9:			// CHECK5: omp.inner.for.body9:
	// CHECK5-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK5-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !21			// CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK5-NEXT: call void @_Z3fn2v(), !llvm.access.group !21			// CHECK5-NEXT: call void @_Z3fn2v()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK5: omp.body.continue12:			// CHECK5: omp.body.continue12:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK5: omp.inner.for.inc13:			// CHECK5: omp.inner.for.inc13:
	// CHECK5-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK5-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
	// CHECK5: omp.inner.for.end15:			// CHECK5: omp.inner.for.end15:
	// CHECK5-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK5-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK5-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK5-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4			// CHECK5-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK5: omp.inner.for.cond21:			// CHECK5: omp.inner.for.cond21:
	// CHECK5-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK5-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !24			// CHECK5-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]			// CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
	// CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK5: omp.inner.for.body23:			// CHECK5: omp.inner.for.body23:
	// CHECK5-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK5-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1			// CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
	// CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !24			// CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK5-NEXT: call void @_Z3fn3v(), !llvm.access.group !24			// CHECK5-NEXT: call void @_Z3fn3v()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK5: omp.body.continue26:			// CHECK5: omp.body.continue26:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK5: omp.inner.for.inc27:			// CHECK5: omp.inner.for.inc27:
	// CHECK5-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK5-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1			// CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
	// CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
	// CHECK5: omp.inner.for.end29:			// CHECK5: omp.inner.for.end29:
	// CHECK5-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK5-NEXT: ret i32 0			// CHECK5-NEXT: ret i32 0
	//			//
	//			//
	// CHECK6-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK6-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK6-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
	Show All 9 Lines
	// CHECK6-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK6-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK6-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK6-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK6-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK6-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK6: omp.inner.for.cond:			// CHECK6: omp.inner.for.cond:
	// CHECK6-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK6-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !2			// CHECK6-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK6: omp.inner.for.body:			// CHECK6: omp.inner.for.body:
	// CHECK6-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK6-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2			// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK6: omp.body.continue:			// CHECK6: omp.body.continue:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK6: omp.inner.for.inc:			// CHECK6: omp.inner.for.inc:
	// CHECK6-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK6-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
	// CHECK6: omp.inner.for.end:			// CHECK6: omp.inner.for.end:
	// CHECK6-NEXT: store i32 100, i32* [[I]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK6-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK6-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK6: omp.inner.for.cond7:			// CHECK6: omp.inner.for.cond7:
	// CHECK6-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK6-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !6			// CHECK6-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK6: omp.inner.for.body9:			// CHECK6: omp.inner.for.body9:
	// CHECK6-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK6-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !6			// CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK6-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !6			// CHECK6-NEXT: call void @_Z9gtid_testv()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK6: omp.body.continue12:			// CHECK6: omp.body.continue12:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK6: omp.inner.for.inc13:			// CHECK6: omp.inner.for.inc13:
	// CHECK6-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK6-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK6: omp.inner.for.end15:			// CHECK6: omp.inner.for.end15:
	// CHECK6-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK6-NEXT: ret void			// CHECK6-NEXT: ret void
	//			//
	//			//
	// CHECK6-LABEL: define {{[^@]+}}@main			// CHECK6-LABEL: define {{[^@]+}}@main
	// CHECK6-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK6-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 16 Lines
	// CHECK6-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK6-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK6-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK6-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK6: omp.inner.for.cond:			// CHECK6: omp.inner.for.cond:
	// CHECK6-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK6-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !9			// CHECK6-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK6: omp.inner.for.body:			// CHECK6: omp.inner.for.body:
	// CHECK6-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK6-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9			// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK6-NEXT: call void @_Z3fn4v(), !llvm.access.group !9			// CHECK6-NEXT: call void @_Z3fn4v()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK6: omp.body.continue:			// CHECK6: omp.body.continue:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK6: omp.inner.for.inc:			// CHECK6: omp.inner.for.inc:
	// CHECK6-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK6-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
	// CHECK6: omp.inner.for.end:			// CHECK6: omp.inner.for.end:
	// CHECK6-NEXT: store i32 100, i32* [[I]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK6-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK6-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK6: omp.inner.for.cond7:			// CHECK6: omp.inner.for.cond7:
	// CHECK6-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK6-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !12			// CHECK6-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK6: omp.inner.for.body9:			// CHECK6: omp.inner.for.body9:
	// CHECK6-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK6-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !12			// CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK6-NEXT: call void @_Z3fn5v(), !llvm.access.group !12			// CHECK6-NEXT: call void @_Z3fn5v()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK6: omp.body.continue12:			// CHECK6: omp.body.continue12:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK6: omp.inner.for.inc13:			// CHECK6: omp.inner.for.inc13:
	// CHECK6-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK6-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
	// CHECK6: omp.inner.for.end15:			// CHECK6: omp.inner.for.end15:
	// CHECK6-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK6-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK6-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK6-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4			// CHECK6-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK6: omp.inner.for.cond21:			// CHECK6: omp.inner.for.cond21:
	// CHECK6-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK6-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !15			// CHECK6-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK6-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]			// CHECK6-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
	// CHECK6-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK6-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK6: omp.inner.for.body23:			// CHECK6: omp.inner.for.body23:
	// CHECK6-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK6-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1			// CHECK6-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
	// CHECK6-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK6-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK6-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !15			// CHECK6-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK6-NEXT: call void @_Z3fn6v(), !llvm.access.group !15			// CHECK6-NEXT: call void @_Z3fn6v()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK6: omp.body.continue26:			// CHECK6: omp.body.continue26:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK6: omp.inner.for.inc27:			// CHECK6: omp.inner.for.inc27:
	// CHECK6-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK6-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1			// CHECK6-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
	// CHECK6-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK6-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK6: omp.inner.for.end29:			// CHECK6: omp.inner.for.end29:
	// CHECK6-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK6-NEXT: [[TMP15:%.]] = load i32, i32 @Arg, align 4			// CHECK6-NEXT: [[TMP15:%.]] = load i32, i32 @Arg, align 4
	// CHECK6-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]])			// CHECK6-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]])
	// CHECK6-NEXT: ret i32 [[CALL]]			// CHECK6-NEXT: ret i32 [[CALL]]
	//			//
	//			//
	Show All 18 Lines
	// CHECK6-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK6-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK6-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK6-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK6-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK6-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK6: omp.inner.for.cond:			// CHECK6: omp.inner.for.cond:
	// CHECK6-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK6-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !18			// CHECK6-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK6: omp.inner.for.body:			// CHECK6: omp.inner.for.body:
	// CHECK6-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK6-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18			// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK6-NEXT: call void @_Z3fn1v(), !llvm.access.group !18			// CHECK6-NEXT: call void @_Z3fn1v()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK6: omp.body.continue:			// CHECK6: omp.body.continue:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK6: omp.inner.for.inc:			// CHECK6: omp.inner.for.inc:
	// CHECK6-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK6-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
	// CHECK6: omp.inner.for.end:			// CHECK6: omp.inner.for.end:
	// CHECK6-NEXT: store i32 100, i32* [[I]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK6-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK6-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK6: omp.inner.for.cond7:			// CHECK6: omp.inner.for.cond7:
	// CHECK6-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK6-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !21			// CHECK6-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK6: omp.inner.for.body9:			// CHECK6: omp.inner.for.body9:
	// CHECK6-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK6-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !21			// CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK6-NEXT: call void @_Z3fn2v(), !llvm.access.group !21			// CHECK6-NEXT: call void @_Z3fn2v()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK6: omp.body.continue12:			// CHECK6: omp.body.continue12:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK6: omp.inner.for.inc13:			// CHECK6: omp.inner.for.inc13:
	// CHECK6-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK6-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
	// CHECK6: omp.inner.for.end15:			// CHECK6: omp.inner.for.end15:
	// CHECK6-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK6-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK6-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK6-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4			// CHECK6-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK6: omp.inner.for.cond21:			// CHECK6: omp.inner.for.cond21:
	// CHECK6-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK6-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !24			// CHECK6-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK6-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]			// CHECK6-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
	// CHECK6-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK6-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK6: omp.inner.for.body23:			// CHECK6: omp.inner.for.body23:
	// CHECK6-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK6-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1			// CHECK6-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
	// CHECK6-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK6-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK6-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !24			// CHECK6-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK6-NEXT: call void @_Z3fn3v(), !llvm.access.group !24			// CHECK6-NEXT: call void @_Z3fn3v()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK6: omp.body.continue26:			// CHECK6: omp.body.continue26:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK6: omp.inner.for.inc27:			// CHECK6: omp.inner.for.inc27:
	// CHECK6-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK6-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1			// CHECK6-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
	// CHECK6-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK6-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
	// CHECK6: omp.inner.for.end29:			// CHECK6: omp.inner.for.end29:
	// CHECK6-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK6-NEXT: ret i32 0			// CHECK6-NEXT: ret i32 0
	//			//
	//			//
	// CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
	Show All 9 Lines
	// CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK7-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK7-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK7: omp.inner.for.cond:			// CHECK7: omp.inner.for.cond:
	// CHECK7-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK7-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !2			// CHECK7-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK7: omp.inner.for.body:			// CHECK7: omp.inner.for.body:
	// CHECK7-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK7-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2			// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK7: omp.body.continue:			// CHECK7: omp.body.continue:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK7: omp.inner.for.inc:			// CHECK7: omp.inner.for.inc:
	// CHECK7-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK7-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
	// CHECK7: omp.inner.for.end:			// CHECK7: omp.inner.for.end:
	// CHECK7-NEXT: store i32 100, i32* [[I]], align 4			// CHECK7-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK7-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK7-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK7: omp.inner.for.cond7:			// CHECK7: omp.inner.for.cond7:
	// CHECK7-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK7-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !6			// CHECK7-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK7: omp.inner.for.body9:			// CHECK7: omp.inner.for.body9:
	// CHECK7-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK7-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !6			// CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK7-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !6			// CHECK7-NEXT: call void @_Z9gtid_testv()
	// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK7: omp.body.continue12:			// CHECK7: omp.body.continue12:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK7: omp.inner.for.inc13:			// CHECK7: omp.inner.for.inc13:
	// CHECK7-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK7-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK7: omp.inner.for.end15:			// CHECK7: omp.inner.for.end15:
	// CHECK7-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK7-NEXT: ret void			// CHECK7-NEXT: ret void
	//			//
	//			//
	// CHECK7-LABEL: define {{[^@]+}}@main			// CHECK7-LABEL: define {{[^@]+}}@main
	// CHECK7-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK7-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 17 Lines
	// CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK7-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK7-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK7: omp.inner.for.cond:			// CHECK7: omp.inner.for.cond:
	// CHECK7-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK7-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !9			// CHECK7-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK7: omp.inner.for.body:			// CHECK7: omp.inner.for.body:
	// CHECK7-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK7-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9			// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK7-NEXT: call void @_Z3fn4v(), !llvm.access.group !9			// CHECK7-NEXT: call void @_Z3fn4v()
	// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK7: omp.body.continue:			// CHECK7: omp.body.continue:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK7: omp.inner.for.inc:			// CHECK7: omp.inner.for.inc:
	// CHECK7-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK7-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
	// CHECK7: omp.inner.for.end:			// CHECK7: omp.inner.for.end:
	// CHECK7-NEXT: store i32 100, i32* [[I]], align 4			// CHECK7-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK7-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK7-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 27 Lines
	// CHECK7-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK7-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1			// CHECK7-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1
	// CHECK7-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1			// CHECK7-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
	// CHECK7-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]			// CHECK7-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]
	// CHECK7: omp_if.then:			// CHECK7: omp_if.then:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
	// CHECK7: omp.inner.for.cond22:			// CHECK7: omp.inner.for.cond22:
	// CHECK7-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK7-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !14			// CHECK7-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK7-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]			// CHECK7-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
	// CHECK7-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]			// CHECK7-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]
	// CHECK7: omp.inner.for.body24:			// CHECK7: omp.inner.for.body24:
	// CHECK7-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK7-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1			// CHECK7-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
	// CHECK7-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]			// CHECK7-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
	// CHECK7-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group !14			// CHECK7-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4
	// CHECK7-NEXT: call void @_Z3fn6v(), !llvm.access.group !14			// CHECK7-NEXT: call void @_Z3fn6v()
	// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]			// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
	// CHECK7: omp.body.continue27:			// CHECK7: omp.body.continue27:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
	// CHECK7: omp.inner.for.inc28:			// CHECK7: omp.inner.for.inc28:
	// CHECK7-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK7-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1			// CHECK7-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
	// CHECK7-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK7-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP15:![0-9]+]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP15:![0-9]+]]
	// CHECK7: omp.inner.for.end30:			// CHECK7: omp.inner.for.end30:
	// CHECK7-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK7-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK7: omp_if.else:			// CHECK7: omp_if.else:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
	// CHECK7: omp.inner.for.cond31:			// CHECK7: omp.inner.for.cond31:
	// CHECK7-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4			// CHECK7-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4			// CHECK7-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
	// CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK7-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK7-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK7-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK7-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK7: omp.inner.for.cond:			// CHECK7: omp.inner.for.cond:
	// CHECK7-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK7-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !18			// CHECK7-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK7: omp.inner.for.body:			// CHECK7: omp.inner.for.body:
	// CHECK7-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK7-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18			// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK7-NEXT: call void @_Z3fn1v(), !llvm.access.group !18			// CHECK7-NEXT: call void @_Z3fn1v()
	// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK7: omp.body.continue:			// CHECK7: omp.body.continue:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK7: omp.inner.for.inc:			// CHECK7: omp.inner.for.inc:
	// CHECK7-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK7-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
	// CHECK7: omp.inner.for.end:			// CHECK7: omp.inner.for.end:
	// CHECK7-NEXT: store i32 100, i32* [[I]], align 4			// CHECK7-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK7-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK7-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 19 Lines
	// CHECK7: omp.inner.for.end15:			// CHECK7: omp.inner.for.end15:
	// CHECK7-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK7-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK7-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK7-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4			// CHECK7-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK7: omp.inner.for.cond21:			// CHECK7: omp.inner.for.cond21:
	// CHECK7-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK7-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !22			// CHECK7-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK7-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]			// CHECK7-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
	// CHECK7-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK7-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK7: omp.inner.for.body23:			// CHECK7: omp.inner.for.body23:
	// CHECK7-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK7-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1			// CHECK7-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
	// CHECK7-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK7-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK7-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !22			// CHECK7-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK7-NEXT: call void @_Z3fn3v(), !llvm.access.group !22			// CHECK7-NEXT: call void @_Z3fn3v()
	// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK7: omp.body.continue26:			// CHECK7: omp.body.continue26:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK7: omp.inner.for.inc27:			// CHECK7: omp.inner.for.inc27:
	// CHECK7-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK7-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1			// CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
	// CHECK7-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK7-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]
	// CHECK7: omp.inner.for.end29:			// CHECK7: omp.inner.for.end29:
	// CHECK7-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK7-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK7-NEXT: ret i32 0			// CHECK7-NEXT: ret i32 0
	//			//
	//			//
	// CHECK8-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK8-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK8-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
	Show All 9 Lines
	// CHECK8-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK8-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK8-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK8-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK8-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK8-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK8: omp.inner.for.cond:			// CHECK8: omp.inner.for.cond:
	// CHECK8-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK8-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !2			// CHECK8-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK8: omp.inner.for.body:			// CHECK8: omp.inner.for.body:
	// CHECK8-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK8-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2			// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK8: omp.body.continue:			// CHECK8: omp.body.continue:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK8: omp.inner.for.inc:			// CHECK8: omp.inner.for.inc:
	// CHECK8-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK8-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
	// CHECK8: omp.inner.for.end:			// CHECK8: omp.inner.for.end:
	// CHECK8-NEXT: store i32 100, i32* [[I]], align 4			// CHECK8-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK8-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK8-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK8: omp.inner.for.cond7:			// CHECK8: omp.inner.for.cond7:
	// CHECK8-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK8-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !6			// CHECK8-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK8-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK8-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK8-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK8-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK8: omp.inner.for.body9:			// CHECK8: omp.inner.for.body9:
	// CHECK8-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK8-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK8-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK8-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK8-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK8-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !6			// CHECK8-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK8-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !6			// CHECK8-NEXT: call void @_Z9gtid_testv()
	// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK8: omp.body.continue12:			// CHECK8: omp.body.continue12:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK8: omp.inner.for.inc13:			// CHECK8: omp.inner.for.inc13:
	// CHECK8-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK8-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK8-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK8-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK8-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK8: omp.inner.for.end15:			// CHECK8: omp.inner.for.end15:
	// CHECK8-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK8-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK8-NEXT: ret void			// CHECK8-NEXT: ret void
	//			//
	//			//
	// CHECK8-LABEL: define {{[^@]+}}@main			// CHECK8-LABEL: define {{[^@]+}}@main
	// CHECK8-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK8-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 17 Lines
	// CHECK8-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK8-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK8-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK8-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK8: omp.inner.for.cond:			// CHECK8: omp.inner.for.cond:
	// CHECK8-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK8-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !9			// CHECK8-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK8: omp.inner.for.body:			// CHECK8: omp.inner.for.body:
	// CHECK8-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK8-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9			// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK8-NEXT: call void @_Z3fn4v(), !llvm.access.group !9			// CHECK8-NEXT: call void @_Z3fn4v()
	// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK8: omp.body.continue:			// CHECK8: omp.body.continue:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK8: omp.inner.for.inc:			// CHECK8: omp.inner.for.inc:
	// CHECK8-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK8-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
	// CHECK8: omp.inner.for.end:			// CHECK8: omp.inner.for.end:
	// CHECK8-NEXT: store i32 100, i32* [[I]], align 4			// CHECK8-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK8-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK8-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 27 Lines
	// CHECK8-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK8-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK8-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK8-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1			// CHECK8-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1
	// CHECK8-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1			// CHECK8-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
	// CHECK8-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]			// CHECK8-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]
	// CHECK8: omp_if.then:			// CHECK8: omp_if.then:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
	// CHECK8: omp.inner.for.cond22:			// CHECK8: omp.inner.for.cond22:
	// CHECK8-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK8-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !14			// CHECK8-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK8-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]			// CHECK8-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
	// CHECK8-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]			// CHECK8-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]
	// CHECK8: omp.inner.for.body24:			// CHECK8: omp.inner.for.body24:
	// CHECK8-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK8-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1			// CHECK8-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
	// CHECK8-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]			// CHECK8-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
	// CHECK8-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group !14			// CHECK8-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4
	// CHECK8-NEXT: call void @_Z3fn6v(), !llvm.access.group !14			// CHECK8-NEXT: call void @_Z3fn6v()
	// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]			// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
	// CHECK8: omp.body.continue27:			// CHECK8: omp.body.continue27:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
	// CHECK8: omp.inner.for.inc28:			// CHECK8: omp.inner.for.inc28:
	// CHECK8-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK8-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1			// CHECK8-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
	// CHECK8-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK8-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP15:![0-9]+]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP15:![0-9]+]]
	// CHECK8: omp.inner.for.end30:			// CHECK8: omp.inner.for.end30:
	// CHECK8-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK8-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK8: omp_if.else:			// CHECK8: omp_if.else:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
	// CHECK8: omp.inner.for.cond31:			// CHECK8: omp.inner.for.cond31:
	// CHECK8-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4			// CHECK8-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4			// CHECK8-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
	// CHECK8-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK8-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK8-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK8-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK8-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK8-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK8: omp.inner.for.cond:			// CHECK8: omp.inner.for.cond:
	// CHECK8-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK8-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !18			// CHECK8-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK8: omp.inner.for.body:			// CHECK8: omp.inner.for.body:
	// CHECK8-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK8-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18			// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK8-NEXT: call void @_Z3fn1v(), !llvm.access.group !18			// CHECK8-NEXT: call void @_Z3fn1v()
	// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK8: omp.body.continue:			// CHECK8: omp.body.continue:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK8: omp.inner.for.inc:			// CHECK8: omp.inner.for.inc:
	// CHECK8-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK8-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
	// CHECK8: omp.inner.for.end:			// CHECK8: omp.inner.for.end:
	// CHECK8-NEXT: store i32 100, i32* [[I]], align 4			// CHECK8-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK8-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK8-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 19 Lines
	// CHECK8: omp.inner.for.end15:			// CHECK8: omp.inner.for.end15:
	// CHECK8-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK8-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK8-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK8-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK8-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4			// CHECK8-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK8: omp.inner.for.cond21:			// CHECK8: omp.inner.for.cond21:
	// CHECK8-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK8-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !22			// CHECK8-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK8-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]			// CHECK8-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
	// CHECK8-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK8-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK8: omp.inner.for.body23:			// CHECK8: omp.inner.for.body23:
	// CHECK8-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK8-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1			// CHECK8-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
	// CHECK8-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK8-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK8-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !22			// CHECK8-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK8-NEXT: call void @_Z3fn3v(), !llvm.access.group !22			// CHECK8-NEXT: call void @_Z3fn3v()
	// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK8: omp.body.continue26:			// CHECK8: omp.body.continue26:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK8: omp.inner.for.inc27:			// CHECK8: omp.inner.for.inc27:
	// CHECK8-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK8-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1			// CHECK8-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
	// CHECK8-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK8-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]
	// CHECK8: omp.inner.for.end29:			// CHECK8: omp.inner.for.end29:
	// CHECK8-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK8-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK8-NEXT: ret i32 0			// CHECK8-NEXT: ret i32 0
	//			//
	//			//
	// CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
	▲ Show 20 Lines • Show All 73 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK9-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK9-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
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	// CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK9-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @_Z9gtid_testv()			// CHECK9-NEXT: call void @_Z9gtid_testv()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK9-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK9-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @_Z3fn4v()			// CHECK9-NEXT: call void @_Z3fn4v()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
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	// CHECK9-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK9-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @_Z3fn5v()			// CHECK9-NEXT: call void @_Z3fn5v()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
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	// CHECK9-NEXT: br label [[OMP_IF_END]]			// CHECK9-NEXT: br label [[OMP_IF_END]]
	// CHECK9: omp_if.end:			// CHECK9: omp_if.end:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
	// CHECK9-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0			// CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
	// CHECK9-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @_Z3fn6v()			// CHECK9-NEXT: call void @_Z3fn6v()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK9-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK9-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP49:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @_Z3fn1v()			// CHECK9-NEXT: call void @_Z3fn1v()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK9-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @_Z3fn2v()			// CHECK9-NEXT: call void @_Z3fn2v()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 77 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: br label [[OMP_IF_END]]			// CHECK9-NEXT: br label [[OMP_IF_END]]
	// CHECK9: omp_if.end:			// CHECK9: omp_if.end:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP61:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
	// CHECK9-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0			// CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
	// CHECK9-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
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	// CHECK9-NEXT: call void @_Z3fn3v()			// CHECK9-NEXT: call void @_Z3fn3v()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP64:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
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	// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK10-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK10-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK10-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: call void @_Z9gtid_testv()			// CHECK10-NEXT: call void @_Z9gtid_testv()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK10-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK10-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: call void @_Z3fn4v()			// CHECK10-NEXT: call void @_Z3fn4v()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK10-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: call void @_Z3fn5v()			// CHECK10-NEXT: call void @_Z3fn5v()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: br label [[OMP_IF_END]]			// CHECK10-NEXT: br label [[OMP_IF_END]]
	// CHECK10: omp_if.end:			// CHECK10: omp_if.end:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
	// CHECK10-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0			// CHECK10-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
	// CHECK10-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: call void @_Z3fn6v()			// CHECK10-NEXT: call void @_Z3fn6v()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK10-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK10-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP49:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: call void @_Z3fn1v()			// CHECK10-NEXT: call void @_Z3fn1v()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK10-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: call void @_Z3fn2v()			// CHECK10-NEXT: call void @_Z3fn2v()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 77 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: br label [[OMP_IF_END]]			// CHECK10-NEXT: br label [[OMP_IF_END]]
	// CHECK10: omp_if.end:			// CHECK10: omp_if.end:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP61:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
	// CHECK10-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0			// CHECK10-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
	// CHECK10-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: call void @_Z3fn3v()			// CHECK10-NEXT: call void @_Z3fn3v()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP64:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK11-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK11-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
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	// CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
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	// CHECK11-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK11-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @_Z9gtid_testv()			// CHECK11-NEXT: call void @_Z9gtid_testv()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK11-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK11-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @_Z3fn4v()			// CHECK11-NEXT: call void @_Z3fn4v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK11-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @_Z3fn5v()			// CHECK11-NEXT: call void @_Z3fn5v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 96 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: br label [[OMP_IF_END]]			// CHECK11-NEXT: br label [[OMP_IF_END]]
	// CHECK11: omp_if.end:			// CHECK11: omp_if.end:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_IF_END23:%.*]]			// CHECK11-NEXT: br label [[OMP_IF_END23:%.*]]
	// CHECK11: omp_if.else7:			// CHECK11: omp_if.else7:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
	// CHECK11: omp.inner.for.cond8:			// CHECK11: omp.inner.for.cond8:
	// CHECK11-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP21:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4			// CHECK11-NEXT: [[TMP21:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4
	// CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]			// CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
	Show All 23 Lines
	// CHECK11-NEXT: br label [[OMP_IF_END19]]			// CHECK11-NEXT: br label [[OMP_IF_END19]]
	// CHECK11: omp_if.end19:			// CHECK11: omp_if.end19:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC20:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC20:%.*]]
	// CHECK11: omp.inner.for.inc20:			// CHECK11: omp.inner.for.inc20:
	// CHECK11-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP31:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP31:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]			// CHECK11-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
	// CHECK11-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP42:![0-9]+]]
	// CHECK11: omp.inner.for.end22:			// CHECK11: omp.inner.for.end22:
	// CHECK11-NEXT: br label [[OMP_IF_END23]]			// CHECK11-NEXT: br label [[OMP_IF_END23]]
	// CHECK11: omp_if.end23:			// CHECK11: omp_if.end23:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP32:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP32:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0			// CHECK11-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
	▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @_Z3fn6v()			// CHECK11-NEXT: call void @_Z3fn6v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK11: omp_if.else:			// CHECK11: omp_if.else:
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK11-NEXT: call void @_Z3fn6v()			// CHECK11-NEXT: call void @_Z3fn6v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK11: omp.body.continue15:			// CHECK11: omp.body.continue15:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK11: omp.inner.for.inc16:			// CHECK11: omp.inner.for.inc16:
	// CHECK11-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP46:![0-9]+]]
	// CHECK11: omp.inner.for.end18:			// CHECK11: omp.inner.for.end18:
	// CHECK11-NEXT: br label [[OMP_IF_END]]			// CHECK11-NEXT: br label [[OMP_IF_END]]
	// CHECK11: omp_if.end:			// CHECK11: omp_if.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK11-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK11-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK11-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @_Z3fn6v()			// CHECK11-NEXT: call void @_Z3fn6v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK11: omp_if.else:			// CHECK11: omp_if.else:
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK11-NEXT: call void @_Z3fn6v()			// CHECK11-NEXT: call void @_Z3fn6v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK11: omp.body.continue15:			// CHECK11: omp.body.continue15:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK11: omp.inner.for.inc16:			// CHECK11: omp.inner.for.inc16:
	// CHECK11-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP31:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP50:![0-9]+]]
	// CHECK11: omp.inner.for.end18:			// CHECK11: omp.inner.for.end18:
	// CHECK11-NEXT: br label [[OMP_IF_END]]			// CHECK11-NEXT: br label [[OMP_IF_END]]
	// CHECK11: omp_if.end:			// CHECK11: omp_if.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK11-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK11-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK11-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 114 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK11-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK11-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
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	// CHECK11-NEXT: call void @_Z3fn1v()			// CHECK11-NEXT: call void @_Z3fn1v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
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	// CHECK11-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK11-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @_Z3fn2v()			// CHECK11-NEXT: call void @_Z3fn2v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
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	// CHECK11-NEXT: br label [[OMP_IF_END]]			// CHECK11-NEXT: br label [[OMP_IF_END]]
	// CHECK11: omp_if.end:			// CHECK11: omp_if.end:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
	// CHECK11-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0			// CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
	// CHECK11-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @_Z3fn3v()			// CHECK11-NEXT: call void @_Z3fn3v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP63:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 88 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK12-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK12-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK12-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @_Z9gtid_testv()			// CHECK12-NEXT: call void @_Z9gtid_testv()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK12-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK12-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @_Z3fn4v()			// CHECK12-NEXT: call void @_Z3fn4v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK12-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @_Z3fn5v()			// CHECK12-NEXT: call void @_Z3fn5v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 96 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: br label [[OMP_IF_END]]			// CHECK12-NEXT: br label [[OMP_IF_END]]
	// CHECK12: omp_if.end:			// CHECK12: omp_if.end:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_IF_END23:%.*]]			// CHECK12-NEXT: br label [[OMP_IF_END23:%.*]]
	// CHECK12: omp_if.else7:			// CHECK12: omp_if.else7:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
	// CHECK12: omp.inner.for.cond8:			// CHECK12: omp.inner.for.cond8:
	// CHECK12-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP21:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4			// CHECK12-NEXT: [[TMP21:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4
	// CHECK12-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]			// CHECK12-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
	Show All 23 Lines
	// CHECK12-NEXT: br label [[OMP_IF_END19]]			// CHECK12-NEXT: br label [[OMP_IF_END19]]
	// CHECK12: omp_if.end19:			// CHECK12: omp_if.end19:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC20:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC20:%.*]]
	// CHECK12: omp.inner.for.inc20:			// CHECK12: omp.inner.for.inc20:
	// CHECK12-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP31:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP31:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]			// CHECK12-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
	// CHECK12-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP42:![0-9]+]]
	// CHECK12: omp.inner.for.end22:			// CHECK12: omp.inner.for.end22:
	// CHECK12-NEXT: br label [[OMP_IF_END23]]			// CHECK12-NEXT: br label [[OMP_IF_END23]]
	// CHECK12: omp_if.end23:			// CHECK12: omp_if.end23:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP32:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP32:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0			// CHECK12-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
	▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @_Z3fn6v()			// CHECK12-NEXT: call void @_Z3fn6v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK12-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK12: omp_if.else:			// CHECK12: omp_if.else:
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK12-NEXT: call void @_Z3fn6v()			// CHECK12-NEXT: call void @_Z3fn6v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK12: omp.body.continue15:			// CHECK12: omp.body.continue15:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK12: omp.inner.for.inc16:			// CHECK12: omp.inner.for.inc16:
	// CHECK12-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP46:![0-9]+]]
	// CHECK12: omp.inner.for.end18:			// CHECK12: omp.inner.for.end18:
	// CHECK12-NEXT: br label [[OMP_IF_END]]			// CHECK12-NEXT: br label [[OMP_IF_END]]
	// CHECK12: omp_if.end:			// CHECK12: omp_if.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK12-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK12-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK12-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @_Z3fn6v()			// CHECK12-NEXT: call void @_Z3fn6v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK12-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK12: omp_if.else:			// CHECK12: omp_if.else:
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK12-NEXT: call void @_Z3fn6v()			// CHECK12-NEXT: call void @_Z3fn6v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK12: omp.body.continue15:			// CHECK12: omp.body.continue15:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK12: omp.inner.for.inc16:			// CHECK12: omp.inner.for.inc16:
	// CHECK12-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP31:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP50:![0-9]+]]
	// CHECK12: omp.inner.for.end18:			// CHECK12: omp.inner.for.end18:
	// CHECK12-NEXT: br label [[OMP_IF_END]]			// CHECK12-NEXT: br label [[OMP_IF_END]]
	// CHECK12: omp_if.end:			// CHECK12: omp_if.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK12-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK12-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK12-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 114 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK12-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK12-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
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	// CHECK12-NEXT: call void @_Z3fn1v()			// CHECK12-NEXT: call void @_Z3fn1v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK12-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @_Z3fn2v()			// CHECK12-NEXT: call void @_Z3fn2v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 77 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: br label [[OMP_IF_END]]			// CHECK12-NEXT: br label [[OMP_IF_END]]
	// CHECK12: omp_if.end:			// CHECK12: omp_if.end:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
	// CHECK12-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0			// CHECK12-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
	// CHECK12-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @_Z3fn3v()			// CHECK12-NEXT: call void @_Z3fn3v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP63:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	Show All 24 Lines
	// CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK13-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK13-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK13: omp.inner.for.cond:			// CHECK13: omp.inner.for.cond:
	// CHECK13-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK13-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !6			// CHECK13-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK13: omp.inner.for.body:			// CHECK13: omp.inner.for.body:
	// CHECK13-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK13-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6			// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK13: omp.body.continue:			// CHECK13: omp.body.continue:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK13: omp.inner.for.inc:			// CHECK13: omp.inner.for.inc:
	// CHECK13-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK13-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK13: omp.inner.for.end:			// CHECK13: omp.inner.for.end:
	// CHECK13-NEXT: store i32 100, i32* [[I]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK13-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK13-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK13: omp.inner.for.cond7:			// CHECK13: omp.inner.for.cond7:
	// CHECK13-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK13-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !10			// CHECK13-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK13: omp.inner.for.body9:			// CHECK13: omp.inner.for.body9:
	// CHECK13-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK13-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !10			// CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK13-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !10			// CHECK13-NEXT: call void @_Z9gtid_testv()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK13: omp.body.continue12:			// CHECK13: omp.body.continue12:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK13: omp.inner.for.inc13:			// CHECK13: omp.inner.for.inc13:
	// CHECK13-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK13-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]
	// CHECK13: omp.inner.for.end15:			// CHECK13: omp.inner.for.end15:
	// CHECK13-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK13-NEXT: ret void			// CHECK13-NEXT: ret void
	//			//
	//			//
	// CHECK13-LABEL: define {{[^@]+}}@main			// CHECK13-LABEL: define {{[^@]+}}@main
	// CHECK13-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK13-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 16 Lines
	// CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK13-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK13-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK13: omp.inner.for.cond:			// CHECK13: omp.inner.for.cond:
	// CHECK13-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK13-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !13			// CHECK13-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK13: omp.inner.for.body:			// CHECK13: omp.inner.for.body:
	// CHECK13-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK13-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13			// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK13-NEXT: call void @_Z3fn4v(), !llvm.access.group !13			// CHECK13-NEXT: call void @_Z3fn4v()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK13: omp.body.continue:			// CHECK13: omp.body.continue:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK13: omp.inner.for.inc:			// CHECK13: omp.inner.for.inc:
	// CHECK13-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK13-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
	// CHECK13: omp.inner.for.end:			// CHECK13: omp.inner.for.end:
	// CHECK13-NEXT: store i32 100, i32* [[I]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK13-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK13-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK13: omp.inner.for.cond7:			// CHECK13: omp.inner.for.cond7:
	// CHECK13-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK13-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !16			// CHECK13-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK13: omp.inner.for.body9:			// CHECK13: omp.inner.for.body9:
	// CHECK13-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK13-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16			// CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK13-NEXT: call void @_Z3fn5v(), !llvm.access.group !16			// CHECK13-NEXT: call void @_Z3fn5v()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK13: omp.body.continue12:			// CHECK13: omp.body.continue12:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK13: omp.inner.for.inc13:			// CHECK13: omp.inner.for.inc13:
	// CHECK13-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK13-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
	// CHECK13: omp.inner.for.end15:			// CHECK13: omp.inner.for.end15:
	// CHECK13-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK13-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK13-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4			// CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK13: omp.inner.for.cond21:			// CHECK13: omp.inner.for.cond21:
	// CHECK13-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK13-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !19			// CHECK13-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]			// CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
	// CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK13: omp.inner.for.body23:			// CHECK13: omp.inner.for.body23:
	// CHECK13-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK13-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1			// CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
	// CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !19			// CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK13-NEXT: call void @_Z3fn6v(), !llvm.access.group !19			// CHECK13-NEXT: call void @_Z3fn6v()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK13: omp.body.continue26:			// CHECK13: omp.body.continue26:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK13: omp.inner.for.inc27:			// CHECK13: omp.inner.for.inc27:
	// CHECK13-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK13-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1			// CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
	// CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP20:![0-9]+]]
	// CHECK13: omp.inner.for.end29:			// CHECK13: omp.inner.for.end29:
	// CHECK13-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK13-NEXT: [[TMP15:%.]] = load i32, i32 @Arg, align 4			// CHECK13-NEXT: [[TMP15:%.]] = load i32, i32 @Arg, align 4
	// CHECK13-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]])			// CHECK13-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]])
	// CHECK13-NEXT: ret i32 [[CALL]]			// CHECK13-NEXT: ret i32 [[CALL]]
	//			//
	//			//
	Show All 18 Lines
	// CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK13-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK13-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK13-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK13-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK13: omp.inner.for.cond:			// CHECK13: omp.inner.for.cond:
	// CHECK13-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK13-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !22			// CHECK13-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK13: omp.inner.for.body:			// CHECK13: omp.inner.for.body:
	// CHECK13-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK13-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22			// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK13-NEXT: call void @_Z3fn1v(), !llvm.access.group !22			// CHECK13-NEXT: call void @_Z3fn1v()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK13: omp.body.continue:			// CHECK13: omp.body.continue:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK13: omp.inner.for.inc:			// CHECK13: omp.inner.for.inc:
	// CHECK13-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK13-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
	// CHECK13: omp.inner.for.end:			// CHECK13: omp.inner.for.end:
	// CHECK13-NEXT: store i32 100, i32* [[I]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK13-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK13-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK13: omp.inner.for.cond7:			// CHECK13: omp.inner.for.cond7:
	// CHECK13-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK13-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !25			// CHECK13-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK13: omp.inner.for.body9:			// CHECK13: omp.inner.for.body9:
	// CHECK13-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK13-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !25			// CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK13-NEXT: call void @_Z3fn2v(), !llvm.access.group !25			// CHECK13-NEXT: call void @_Z3fn2v()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK13: omp.body.continue12:			// CHECK13: omp.body.continue12:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK13: omp.inner.for.inc13:			// CHECK13: omp.inner.for.inc13:
	// CHECK13-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK13-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP26:![0-9]+]]
	// CHECK13: omp.inner.for.end15:			// CHECK13: omp.inner.for.end15:
	// CHECK13-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK13-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK13-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4			// CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK13: omp.inner.for.cond21:			// CHECK13: omp.inner.for.cond21:
	// CHECK13-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK13-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !28			// CHECK13-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]			// CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
	// CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK13: omp.inner.for.body23:			// CHECK13: omp.inner.for.body23:
	// CHECK13-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK13-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1			// CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
	// CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !28			// CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK13-NEXT: call void @_Z3fn3v(), !llvm.access.group !28			// CHECK13-NEXT: call void @_Z3fn3v()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK13: omp.body.continue26:			// CHECK13: omp.body.continue26:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK13: omp.inner.for.inc27:			// CHECK13: omp.inner.for.inc27:
	// CHECK13-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK13-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1			// CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
	// CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP29:![0-9]+]]
	// CHECK13: omp.inner.for.end29:			// CHECK13: omp.inner.for.end29:
	// CHECK13-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK13-NEXT: ret i32 0			// CHECK13-NEXT: ret i32 0
	//			//
	//			//
	// CHECK14-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK14-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK14-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK14-SAME: () #[[ATTR0:[0-9]+]] {
	Show All 9 Lines
	// CHECK14-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK14-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK14-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK14-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK14: omp.inner.for.cond:			// CHECK14: omp.inner.for.cond:
	// CHECK14-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK14-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !6			// CHECK14-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK14: omp.inner.for.body:			// CHECK14: omp.inner.for.body:
	// CHECK14-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK14-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6			// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK14: omp.body.continue:			// CHECK14: omp.body.continue:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK14: omp.inner.for.inc:			// CHECK14: omp.inner.for.inc:
	// CHECK14-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK14-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK14: omp.inner.for.end:			// CHECK14: omp.inner.for.end:
	// CHECK14-NEXT: store i32 100, i32* [[I]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK14-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK14-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK14: omp.inner.for.cond7:			// CHECK14: omp.inner.for.cond7:
	// CHECK14-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK14-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !10			// CHECK14-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK14: omp.inner.for.body9:			// CHECK14: omp.inner.for.body9:
	// CHECK14-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK14-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !10			// CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK14-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !10			// CHECK14-NEXT: call void @_Z9gtid_testv()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK14: omp.body.continue12:			// CHECK14: omp.body.continue12:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK14: omp.inner.for.inc13:			// CHECK14: omp.inner.for.inc13:
	// CHECK14-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK14-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]
	// CHECK14: omp.inner.for.end15:			// CHECK14: omp.inner.for.end15:
	// CHECK14-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK14-NEXT: ret void			// CHECK14-NEXT: ret void
	//			//
	//			//
	// CHECK14-LABEL: define {{[^@]+}}@main			// CHECK14-LABEL: define {{[^@]+}}@main
	// CHECK14-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK14-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 16 Lines
	// CHECK14-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK14-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK14-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK14-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK14: omp.inner.for.cond:			// CHECK14: omp.inner.for.cond:
	// CHECK14-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK14-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !13			// CHECK14-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK14: omp.inner.for.body:			// CHECK14: omp.inner.for.body:
	// CHECK14-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK14-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13			// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK14-NEXT: call void @_Z3fn4v(), !llvm.access.group !13			// CHECK14-NEXT: call void @_Z3fn4v()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK14: omp.body.continue:			// CHECK14: omp.body.continue:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK14: omp.inner.for.inc:			// CHECK14: omp.inner.for.inc:
	// CHECK14-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK14-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
	// CHECK14: omp.inner.for.end:			// CHECK14: omp.inner.for.end:
	// CHECK14-NEXT: store i32 100, i32* [[I]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK14-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK14-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK14: omp.inner.for.cond7:			// CHECK14: omp.inner.for.cond7:
	// CHECK14-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK14-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !16			// CHECK14-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK14: omp.inner.for.body9:			// CHECK14: omp.inner.for.body9:
	// CHECK14-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK14-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16			// CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK14-NEXT: call void @_Z3fn5v(), !llvm.access.group !16			// CHECK14-NEXT: call void @_Z3fn5v()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK14: omp.body.continue12:			// CHECK14: omp.body.continue12:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK14: omp.inner.for.inc13:			// CHECK14: omp.inner.for.inc13:
	// CHECK14-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK14-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
	// CHECK14: omp.inner.for.end15:			// CHECK14: omp.inner.for.end15:
	// CHECK14-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK14-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK14-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK14-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4			// CHECK14-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK14: omp.inner.for.cond21:			// CHECK14: omp.inner.for.cond21:
	// CHECK14-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK14-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !19			// CHECK14-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK14-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]			// CHECK14-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
	// CHECK14-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK14-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK14: omp.inner.for.body23:			// CHECK14: omp.inner.for.body23:
	// CHECK14-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK14-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1			// CHECK14-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
	// CHECK14-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK14-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK14-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !19			// CHECK14-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK14-NEXT: call void @_Z3fn6v(), !llvm.access.group !19			// CHECK14-NEXT: call void @_Z3fn6v()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK14: omp.body.continue26:			// CHECK14: omp.body.continue26:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK14: omp.inner.for.inc27:			// CHECK14: omp.inner.for.inc27:
	// CHECK14-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK14-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1			// CHECK14-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
	// CHECK14-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK14-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP20:![0-9]+]]
	// CHECK14: omp.inner.for.end29:			// CHECK14: omp.inner.for.end29:
	// CHECK14-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK14-NEXT: [[TMP15:%.]] = load i32, i32 @Arg, align 4			// CHECK14-NEXT: [[TMP15:%.]] = load i32, i32 @Arg, align 4
	// CHECK14-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]])			// CHECK14-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]])
	// CHECK14-NEXT: ret i32 [[CALL]]			// CHECK14-NEXT: ret i32 [[CALL]]
	//			//
	//			//
	Show All 18 Lines
	// CHECK14-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK14-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK14-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK14-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK14-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK14-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK14: omp.inner.for.cond:			// CHECK14: omp.inner.for.cond:
	// CHECK14-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK14-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !22			// CHECK14-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK14: omp.inner.for.body:			// CHECK14: omp.inner.for.body:
	// CHECK14-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK14-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22			// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK14-NEXT: call void @_Z3fn1v(), !llvm.access.group !22			// CHECK14-NEXT: call void @_Z3fn1v()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK14: omp.body.continue:			// CHECK14: omp.body.continue:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK14: omp.inner.for.inc:			// CHECK14: omp.inner.for.inc:
	// CHECK14-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK14-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
	// CHECK14: omp.inner.for.end:			// CHECK14: omp.inner.for.end:
	// CHECK14-NEXT: store i32 100, i32* [[I]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK14-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK14-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK14: omp.inner.for.cond7:			// CHECK14: omp.inner.for.cond7:
	// CHECK14-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK14-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !25			// CHECK14-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK14: omp.inner.for.body9:			// CHECK14: omp.inner.for.body9:
	// CHECK14-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK14-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !25			// CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK14-NEXT: call void @_Z3fn2v(), !llvm.access.group !25			// CHECK14-NEXT: call void @_Z3fn2v()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK14: omp.body.continue12:			// CHECK14: omp.body.continue12:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK14: omp.inner.for.inc13:			// CHECK14: omp.inner.for.inc13:
	// CHECK14-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK14-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP26:![0-9]+]]
	// CHECK14: omp.inner.for.end15:			// CHECK14: omp.inner.for.end15:
	// CHECK14-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK14-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK14-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK14-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4			// CHECK14-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK14: omp.inner.for.cond21:			// CHECK14: omp.inner.for.cond21:
	// CHECK14-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK14-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !28			// CHECK14-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK14-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]			// CHECK14-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
	// CHECK14-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK14-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK14: omp.inner.for.body23:			// CHECK14: omp.inner.for.body23:
	// CHECK14-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK14-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1			// CHECK14-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
	// CHECK14-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK14-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK14-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !28			// CHECK14-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK14-NEXT: call void @_Z3fn3v(), !llvm.access.group !28			// CHECK14-NEXT: call void @_Z3fn3v()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK14: omp.body.continue26:			// CHECK14: omp.body.continue26:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK14: omp.inner.for.inc27:			// CHECK14: omp.inner.for.inc27:
	// CHECK14-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK14-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1			// CHECK14-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
	// CHECK14-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK14-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP29:![0-9]+]]
	// CHECK14: omp.inner.for.end29:			// CHECK14: omp.inner.for.end29:
	// CHECK14-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK14-NEXT: ret i32 0			// CHECK14-NEXT: ret i32 0
	//			//
	//			//
	// CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK15-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
	Show All 9 Lines
	// CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK15-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK15-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK15: omp.inner.for.cond:			// CHECK15: omp.inner.for.cond:
	// CHECK15-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK15-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !6			// CHECK15-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK15: omp.inner.for.body:			// CHECK15: omp.inner.for.body:
	// CHECK15-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK15-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6			// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK15: omp.body.continue:			// CHECK15: omp.body.continue:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK15: omp.inner.for.inc:			// CHECK15: omp.inner.for.inc:
	// CHECK15-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK15-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK15: omp.inner.for.end:			// CHECK15: omp.inner.for.end:
	// CHECK15-NEXT: store i32 100, i32* [[I]], align 4			// CHECK15-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK15-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK15-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK15: omp.inner.for.cond7:			// CHECK15: omp.inner.for.cond7:
	// CHECK15-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK15-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !10			// CHECK15-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK15: omp.inner.for.body9:			// CHECK15: omp.inner.for.body9:
	// CHECK15-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK15-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !10			// CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK15-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !10			// CHECK15-NEXT: call void @_Z9gtid_testv()
	// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK15: omp.body.continue12:			// CHECK15: omp.body.continue12:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK15: omp.inner.for.inc13:			// CHECK15: omp.inner.for.inc13:
	// CHECK15-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK15-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]
	// CHECK15: omp.inner.for.end15:			// CHECK15: omp.inner.for.end15:
	// CHECK15-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK15-NEXT: ret void			// CHECK15-NEXT: ret void
	//			//
	//			//
	// CHECK15-LABEL: define {{[^@]+}}@main			// CHECK15-LABEL: define {{[^@]+}}@main
	// CHECK15-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK15-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 17 Lines
	// CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK15-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK15-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK15: omp.inner.for.cond:			// CHECK15: omp.inner.for.cond:
	// CHECK15-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK15-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !13			// CHECK15-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK15: omp.inner.for.body:			// CHECK15: omp.inner.for.body:
	// CHECK15-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK15-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13			// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK15-NEXT: call void @_Z3fn4v(), !llvm.access.group !13			// CHECK15-NEXT: call void @_Z3fn4v()
	// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK15: omp.body.continue:			// CHECK15: omp.body.continue:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK15: omp.inner.for.inc:			// CHECK15: omp.inner.for.inc:
	// CHECK15-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK15-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
	// CHECK15: omp.inner.for.end:			// CHECK15: omp.inner.for.end:
	// CHECK15-NEXT: store i32 100, i32* [[I]], align 4			// CHECK15-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK15-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK15-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 27 Lines
	// CHECK15-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK15-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1			// CHECK15-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1
	// CHECK15-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1			// CHECK15-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
	// CHECK15-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]			// CHECK15-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]
	// CHECK15: omp_if.then:			// CHECK15: omp_if.then:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
	// CHECK15: omp.inner.for.cond22:			// CHECK15: omp.inner.for.cond22:
	// CHECK15-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK15-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !18			// CHECK15-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]			// CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
	// CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]			// CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]
	// CHECK15: omp.inner.for.body24:			// CHECK15: omp.inner.for.body24:
	// CHECK15-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK15-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1			// CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
	// CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]			// CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
	// CHECK15-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group !18			// CHECK15-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4
	// CHECK15-NEXT: call void @_Z3fn6v(), !llvm.access.group !18			// CHECK15-NEXT: call void @_Z3fn6v()
	// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]			// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
	// CHECK15: omp.body.continue27:			// CHECK15: omp.body.continue27:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
	// CHECK15: omp.inner.for.inc28:			// CHECK15: omp.inner.for.inc28:
	// CHECK15-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK15-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1			// CHECK15-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
	// CHECK15-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK15-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP19:![0-9]+]]
	// CHECK15: omp.inner.for.end30:			// CHECK15: omp.inner.for.end30:
	// CHECK15-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK15-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK15: omp_if.else:			// CHECK15: omp_if.else:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
	// CHECK15: omp.inner.for.cond31:			// CHECK15: omp.inner.for.cond31:
	// CHECK15-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4			// CHECK15-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4			// CHECK15-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
	// CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK15-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK15-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK15-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK15-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK15: omp.inner.for.cond:			// CHECK15: omp.inner.for.cond:
	// CHECK15-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK15-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !22			// CHECK15-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK15: omp.inner.for.body:			// CHECK15: omp.inner.for.body:
	// CHECK15-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK15-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22			// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK15-NEXT: call void @_Z3fn1v(), !llvm.access.group !22			// CHECK15-NEXT: call void @_Z3fn1v()
	// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK15: omp.body.continue:			// CHECK15: omp.body.continue:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK15: omp.inner.for.inc:			// CHECK15: omp.inner.for.inc:
	// CHECK15-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK15-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
	// CHECK15: omp.inner.for.end:			// CHECK15: omp.inner.for.end:
	// CHECK15-NEXT: store i32 100, i32* [[I]], align 4			// CHECK15-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK15-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK15-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 19 Lines
	// CHECK15: omp.inner.for.end15:			// CHECK15: omp.inner.for.end15:
	// CHECK15-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK15-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK15-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4			// CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK15: omp.inner.for.cond21:			// CHECK15: omp.inner.for.cond21:
	// CHECK15-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK15-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !26			// CHECK15-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK15-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]			// CHECK15-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
	// CHECK15-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK15-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK15: omp.inner.for.body23:			// CHECK15: omp.inner.for.body23:
	// CHECK15-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK15-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1			// CHECK15-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
	// CHECK15-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK15-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK15-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !26			// CHECK15-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK15-NEXT: call void @_Z3fn3v(), !llvm.access.group !26			// CHECK15-NEXT: call void @_Z3fn3v()
	// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK15: omp.body.continue26:			// CHECK15: omp.body.continue26:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK15: omp.inner.for.inc27:			// CHECK15: omp.inner.for.inc27:
	// CHECK15-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK15-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1			// CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
	// CHECK15-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK15-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP27:![0-9]+]]
	// CHECK15: omp.inner.for.end29:			// CHECK15: omp.inner.for.end29:
	// CHECK15-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK15-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK15-NEXT: ret i32 0			// CHECK15-NEXT: ret i32 0
	//			//
	//			//
	// CHECK16-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK16-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK16-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK16-SAME: () #[[ATTR0:[0-9]+]] {
	Show All 9 Lines
	// CHECK16-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK16-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK16-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK16-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK16-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK16-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK16: omp.inner.for.cond:			// CHECK16: omp.inner.for.cond:
	// CHECK16-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK16-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !6			// CHECK16-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK16: omp.inner.for.body:			// CHECK16: omp.inner.for.body:
	// CHECK16-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK16-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6			// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK16: omp.body.continue:			// CHECK16: omp.body.continue:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK16: omp.inner.for.inc:			// CHECK16: omp.inner.for.inc:
	// CHECK16-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK16-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK16: omp.inner.for.end:			// CHECK16: omp.inner.for.end:
	// CHECK16-NEXT: store i32 100, i32* [[I]], align 4			// CHECK16-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK16-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK16-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK16: omp.inner.for.cond7:			// CHECK16: omp.inner.for.cond7:
	// CHECK16-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK16-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !10			// CHECK16-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK16-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK16-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK16-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK16-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK16: omp.inner.for.body9:			// CHECK16: omp.inner.for.body9:
	// CHECK16-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK16-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK16-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !10			// CHECK16-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK16-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !10			// CHECK16-NEXT: call void @_Z9gtid_testv()
	// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK16: omp.body.continue12:			// CHECK16: omp.body.continue12:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK16: omp.inner.for.inc13:			// CHECK16: omp.inner.for.inc13:
	// CHECK16-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK16-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK16-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK16-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK16-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]
	// CHECK16: omp.inner.for.end15:			// CHECK16: omp.inner.for.end15:
	// CHECK16-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK16-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK16-NEXT: ret void			// CHECK16-NEXT: ret void
	//			//
	//			//
	// CHECK16-LABEL: define {{[^@]+}}@main			// CHECK16-LABEL: define {{[^@]+}}@main
	// CHECK16-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK16-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 17 Lines
	// CHECK16-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK16-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK16-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK16-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK16: omp.inner.for.cond:			// CHECK16: omp.inner.for.cond:
	// CHECK16-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK16-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !13			// CHECK16-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK16: omp.inner.for.body:			// CHECK16: omp.inner.for.body:
	// CHECK16-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK16-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13			// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK16-NEXT: call void @_Z3fn4v(), !llvm.access.group !13			// CHECK16-NEXT: call void @_Z3fn4v()
	// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK16: omp.body.continue:			// CHECK16: omp.body.continue:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK16: omp.inner.for.inc:			// CHECK16: omp.inner.for.inc:
	// CHECK16-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK16-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
	// CHECK16: omp.inner.for.end:			// CHECK16: omp.inner.for.end:
	// CHECK16-NEXT: store i32 100, i32* [[I]], align 4			// CHECK16-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK16-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK16-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 27 Lines
	// CHECK16-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK16-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK16-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK16-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1			// CHECK16-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1
	// CHECK16-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1			// CHECK16-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
	// CHECK16-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]			// CHECK16-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]
	// CHECK16: omp_if.then:			// CHECK16: omp_if.then:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
	// CHECK16: omp.inner.for.cond22:			// CHECK16: omp.inner.for.cond22:
	// CHECK16-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK16-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !18			// CHECK16-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK16-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]			// CHECK16-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
	// CHECK16-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]			// CHECK16-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]
	// CHECK16: omp.inner.for.body24:			// CHECK16: omp.inner.for.body24:
	// CHECK16-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK16-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1			// CHECK16-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
	// CHECK16-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]			// CHECK16-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
	// CHECK16-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group !18			// CHECK16-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4
	// CHECK16-NEXT: call void @_Z3fn6v(), !llvm.access.group !18			// CHECK16-NEXT: call void @_Z3fn6v()
	// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]			// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
	// CHECK16: omp.body.continue27:			// CHECK16: omp.body.continue27:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
	// CHECK16: omp.inner.for.inc28:			// CHECK16: omp.inner.for.inc28:
	// CHECK16-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK16-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1			// CHECK16-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
	// CHECK16-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK16-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP19:![0-9]+]]
	// CHECK16: omp.inner.for.end30:			// CHECK16: omp.inner.for.end30:
	// CHECK16-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK16-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK16: omp_if.else:			// CHECK16: omp_if.else:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
	// CHECK16: omp.inner.for.cond31:			// CHECK16: omp.inner.for.cond31:
	// CHECK16-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4			// CHECK16-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4			// CHECK16-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
	// CHECK16-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK16-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK16-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK16-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK16-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK16-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK16: omp.inner.for.cond:			// CHECK16: omp.inner.for.cond:
	// CHECK16-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK16-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !22			// CHECK16-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK16: omp.inner.for.body:			// CHECK16: omp.inner.for.body:
	// CHECK16-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK16-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22			// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK16-NEXT: call void @_Z3fn1v(), !llvm.access.group !22			// CHECK16-NEXT: call void @_Z3fn1v()
	// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK16: omp.body.continue:			// CHECK16: omp.body.continue:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK16: omp.inner.for.inc:			// CHECK16: omp.inner.for.inc:
	// CHECK16-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK16-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
	// CHECK16: omp.inner.for.end:			// CHECK16: omp.inner.for.end:
	// CHECK16-NEXT: store i32 100, i32* [[I]], align 4			// CHECK16-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK16-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK16-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 19 Lines
	// CHECK16: omp.inner.for.end15:			// CHECK16: omp.inner.for.end15:
	// CHECK16-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK16-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK16-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK16-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK16-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4			// CHECK16-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK16: omp.inner.for.cond21:			// CHECK16: omp.inner.for.cond21:
	// CHECK16-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK16-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !26			// CHECK16-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK16-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]			// CHECK16-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
	// CHECK16-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK16-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK16: omp.inner.for.body23:			// CHECK16: omp.inner.for.body23:
	// CHECK16-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK16-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1			// CHECK16-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
	// CHECK16-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK16-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK16-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !26			// CHECK16-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK16-NEXT: call void @_Z3fn3v(), !llvm.access.group !26			// CHECK16-NEXT: call void @_Z3fn3v()
	// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK16: omp.body.continue26:			// CHECK16: omp.body.continue26:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK16: omp.inner.for.inc27:			// CHECK16: omp.inner.for.inc27:
	// CHECK16-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK16-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1			// CHECK16-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
	// CHECK16-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK16-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP27:![0-9]+]]
	// CHECK16: omp.inner.for.end29:			// CHECK16: omp.inner.for.end29:
	// CHECK16-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK16-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK16-NEXT: ret i32 0			// CHECK16-NEXT: ret i32 0
	//			//

clang/test/OpenMP/nvptx_allocate_codegen.cpp

	Show First 20 Lines • Show All 85 Lines • ▼ Show 20 Lines
	// CHECK1-LABEL: define {{[^@]+}}@main			// CHECK1-LABEL: define {{[^@]+}}@main
	// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
	// CHECK1-NEXT: entry:			// CHECK1-NEXT: entry:
	// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4			// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
	// CHECK1-NEXT: [[B:%.*]] = alloca double, align 8			// CHECK1-NEXT: [[B:%.*]] = alloca double, align 8
	// CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK1-NEXT: store i32 2, i32* @_ZZ4mainE1a, align 4			// CHECK1-NEXT: store i32 2, i32* @_ZZ4mainE1a, align 4
	// CHECK1-NEXT: store double 3.000000e+00, double* [[B]], align 8			// CHECK1-NEXT: store double 3.000000e+00, double* [[B]], align 8
	// CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z3fooIiET_v() #[[ATTR6:[0-9]+]]			// CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z3fooIiET_v() #[[ATTR7:[0-9]+]]
	// CHECK1-NEXT: ret i32 [[CALL]]			// CHECK1-NEXT: ret i32 [[CALL]]
	//			//
	//			//
	// CHECK1-LABEL: define {{[^@]+}}@_Z3fooIiET_v			// CHECK1-LABEL: define {{[^@]+}}@_Z3fooIiET_v
	// CHECK1-SAME: () #[[ATTR1:[0-9]+]] comdat {			// CHECK1-SAME: () #[[ATTR1:[0-9]+]] comdat {
	// CHECK1-NEXT: entry:			// CHECK1-NEXT: entry:
	// CHECK1-NEXT: [[TMP0:%.]] = load i32, i32 @_ZN2STIiE1mE, align 4			// CHECK1-NEXT: [[TMP0:%.]] = load i32, i32 @_ZN2STIiE1mE, align 4
	// CHECK1-NEXT: store i32 [[TMP0]], i32* @v, align 4			// CHECK1-NEXT: store i32 [[TMP0]], i32* @v, align 4
	Show All 19 Lines
	// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8			// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8
	// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8			// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8
	// CHECK1-NEXT: [[BAR_A:%.*]] = alloca float, align 4			// CHECK1-NEXT: [[BAR_A:%.*]] = alloca float, align 4
	// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8			// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
	// CHECK1-NEXT: [[TMP0:%.]] = load float, float [[BAR_A]], align 4			// CHECK1-NEXT: [[TMP0:%.]] = load float, float [[BAR_A]], align 4
	// CHECK1-NEXT: [[CONV:%.*]] = fpext float [[TMP0]] to double			// CHECK1-NEXT: [[CONV:%.*]] = fpext float [[TMP0]] to double
	// CHECK1-NEXT: store double [[CONV]], double* addrspacecast (double addrspace(3)* @bar_b to double*), align 8			// CHECK1-NEXT: store double [[CONV]], double* addrspacecast (double addrspace(3)* @bar_b to double*), align 8
	// CHECK1-NEXT: call void @_Z3bazRf(float* nonnull align 4 dereferenceable(4) [[BAR_A]]) #[[ATTR6]]			// CHECK1-NEXT: call void @_Z3bazRf(float* nonnull align 4 dereferenceable(4) [[BAR_A]]) #[[ATTR7]]
	// CHECK1-NEXT: ret void			// CHECK1-NEXT: ret void
	//			//
	//			//
	// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined___wrapper			// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined___wrapper
	// CHECK1-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR4:[0-9]+]] {			// CHECK1-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR4:[0-9]+]] {
	// CHECK1-NEXT: entry:			// CHECK1-NEXT: entry:
	// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2			// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2
	// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4			// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
	Show All 9 Lines

clang/test/OpenMP/nvptx_data_sharing.cpp

	Show First 20 Lines • Show All 449 Lines • ▼ Show 20 Lines
	// CHECK-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4			// CHECK-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
	// CHECK-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2			// CHECK-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2
	// CHECK-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4			// CHECK-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
	// CHECK-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])			// CHECK-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
	// CHECK-NEXT: [[TMP2:%.]] = load i8, i8** [[GLOBAL_ARGS]], align 8			// CHECK-NEXT: [[TMP2:%.]] = load i8, i8** [[GLOBAL_ARGS]], align 8
	// CHECK-NEXT: [[TMP3:%.]] = getelementptr inbounds i8, i8** [[TMP2]], i64 0			// CHECK-NEXT: [[TMP3:%.]] = getelementptr inbounds i8, i8** [[TMP2]], i64 0
	// CHECK-NEXT: [[TMP4:%.]] = bitcast i8* [[TMP3]] to i32**			// CHECK-NEXT: [[TMP4:%.]] = bitcast i8* [[TMP3]] to i32**
	// CHECK-NEXT: [[TMP5:%.]] = load i32, i32** [[TMP4]], align 8			// CHECK-NEXT: [[TMP5:%.]] = load i32, i32** [[TMP4]], align 8
	// CHECK-NEXT: call void @__omp_outlined__(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]]) #[[ATTR1:[0-9]+]]			// CHECK-NEXT: call void @__omp_outlined__(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]]) #[[ATTR3:[0-9]+]]
	// CHECK-NEXT: ret void			// CHECK-NEXT: ret void
	//			//
	//			//
	// CHECK-LABEL: define {{[^@]+}}@__omp_outlined__1			// CHECK-LABEL: define {{[^@]+}}@__omp_outlined__1
	// CHECK-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.]], i32 nonnull align 4 dereferenceable(4) [[B:%.]], i32 nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0]] {			// CHECK-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.]], i32 nonnull align 4 dereferenceable(4) [[B:%.]], i32 nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0]] {
	// CHECK-NEXT: entry:			// CHECK-NEXT: entry:
	// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8			// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8
	// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8			// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8
	Show All 27 Lines
	// CHECK-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])			// CHECK-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
	// CHECK-NEXT: [[TMP2:%.]] = load i8, i8** [[GLOBAL_ARGS]], align 8			// CHECK-NEXT: [[TMP2:%.]] = load i8, i8** [[GLOBAL_ARGS]], align 8
	// CHECK-NEXT: [[TMP3:%.]] = getelementptr inbounds i8, i8** [[TMP2]], i64 0			// CHECK-NEXT: [[TMP3:%.]] = getelementptr inbounds i8, i8** [[TMP2]], i64 0
	// CHECK-NEXT: [[TMP4:%.]] = bitcast i8* [[TMP3]] to i32**			// CHECK-NEXT: [[TMP4:%.]] = bitcast i8* [[TMP3]] to i32**
	// CHECK-NEXT: [[TMP5:%.]] = load i32, i32** [[TMP4]], align 8			// CHECK-NEXT: [[TMP5:%.]] = load i32, i32** [[TMP4]], align 8
	// CHECK-NEXT: [[TMP6:%.]] = getelementptr inbounds i8, i8** [[TMP2]], i64 1			// CHECK-NEXT: [[TMP6:%.]] = getelementptr inbounds i8, i8** [[TMP2]], i64 1
	// CHECK-NEXT: [[TMP7:%.]] = bitcast i8* [[TMP6]] to i32**			// CHECK-NEXT: [[TMP7:%.]] = bitcast i8* [[TMP6]] to i32**
	// CHECK-NEXT: [[TMP8:%.]] = load i32, i32** [[TMP7]], align 8			// CHECK-NEXT: [[TMP8:%.]] = load i32, i32** [[TMP7]], align 8
	// CHECK-NEXT: call void @__omp_outlined__1(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]]) #[[ATTR1]]			// CHECK-NEXT: call void @__omp_outlined__1(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]]) #[[ATTR3]]
	// CHECK-NEXT: ret void			// CHECK-NEXT: ret void
	//			//

clang/test/OpenMP/nvptx_multi_target_parallel_codegen.cpp

	Show First 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
	//			//
	// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__			// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__
	// CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {			// CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
	// CHECK1-NEXT: entry:			// CHECK1-NEXT: entry:
	// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8			// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8
	// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8			// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8
	// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8			// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
	// CHECK1-NEXT: call void @_Z3usev() #[[ATTR6:[0-9]+]]			// CHECK1-NEXT: call void @_Z3usev() #[[ATTR7:[0-9]+]]
	// CHECK1-NEXT: ret void			// CHECK1-NEXT: ret void
	//			//
	//			//
	// CHECK1-LABEL: define {{[^@]+}}@_Z3usev			// CHECK1-LABEL: define {{[^@]+}}@_Z3usev
	// CHECK1-SAME: () #[[ATTR2:[0-9]+]] {			// CHECK1-SAME: () #[[ATTR2:[0-9]+]] {
	// CHECK1-NEXT: entry:			// CHECK1-NEXT: entry:
	// CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.]] = alloca [0 x i8], align 8			// CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.]] = alloca [0 x i8], align 8
	// CHECK1-NEXT: [[TMP0:%.]] = call i32 @__kmpc_global_thread_num(%struct.ident_t @[[GLOB3:[0-9]+]])			// CHECK1-NEXT: [[TMP0:%.]] = call i32 @__kmpc_global_thread_num(%struct.ident_t @[[GLOB3:[0-9]+]])
	// CHECK1-NEXT: [[TMP1:%.]] = bitcast [0 x i8]* [[CAPTURED_VARS_ADDRS]] to i8**			// CHECK1-NEXT: [[TMP1:%.]] = bitcast [0 x i8]* [[CAPTURED_VARS_ADDRS]] to i8**
	// CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32, i32)* @__omp_outlined__1 to i8), i8 bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8), i8* [[TMP1]], i64 0)			// CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32, i32)* @__omp_outlined__1 to i8), i8 bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8), i8* [[TMP1]], i64 0)
	// CHECK1-NEXT: ret void			// CHECK1-NEXT: ret void
	//			//
	//			//
	// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l23			// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l23
	// CHECK1-SAME: () #[[ATTR1]] {			// CHECK1-SAME: () #[[ATTR1]] {
	// CHECK1-NEXT: entry:			// CHECK1-NEXT: entry:
	// CHECK1-NEXT: [[TMP0:%.]] = call i32 @__kmpc_target_init(%struct.ident_t @[[GLOB1]], i8 1, i1 true, i1 true)			// CHECK1-NEXT: [[TMP0:%.]] = call i32 @__kmpc_target_init(%struct.ident_t @[[GLOB1]], i8 1, i1 true, i1 true)
	// CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1			// CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
	// CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.]], label [[WORKER_EXIT:%.]]			// CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.]], label [[WORKER_EXIT:%.]]
	// CHECK1: user_code.entry:			// CHECK1: user_code.entry:
	// CHECK1-NEXT: call void @_Z3usev() #[[ATTR6]]			// CHECK1-NEXT: call void @_Z3usev() #[[ATTR7]]
	// CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)			// CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
	// CHECK1-NEXT: ret void			// CHECK1-NEXT: ret void
	// CHECK1: worker.exit:			// CHECK1: worker.exit:
	// CHECK1-NEXT: ret void			// CHECK1-NEXT: ret void
	//			//
	//			//
	// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1			// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1
	// CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {			// CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
	// CHECK1-NEXT: entry:			// CHECK1-NEXT: entry:
	// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8			// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8
	// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8			// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8
	// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8			// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
	// CHECK1-NEXT: call void @_Z4workv() #[[ATTR6]]			// CHECK1-NEXT: call void @_Z4workv() #[[ATTR7]]
	// CHECK1-NEXT: ret void			// CHECK1-NEXT: ret void
	//			//
	//			//
	// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper			// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper
	// CHECK1-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR5:[0-9]+]] {			// CHECK1-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR6:[0-9]+]] {
	// CHECK1-NEXT: entry:			// CHECK1-NEXT: entry:
	// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2			// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2
	// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4			// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
	// CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4			// CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
	// CHECK1-NEXT: [[GLOBAL_ARGS:%.]] = alloca i8*, align 8			// CHECK1-NEXT: [[GLOBAL_ARGS:%.]] = alloca i8*, align 8
	// CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4			// CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
	// CHECK1-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2			// CHECK1-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2
	// CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4			// CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
	Show All 21 Lines
	//			//
	// CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__			// CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__
	// CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {			// CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
	// CHECK2-NEXT: entry:			// CHECK2-NEXT: entry:
	// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4			// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4			// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4			// CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
	// CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4			// CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
	// CHECK2-NEXT: call void @_Z3usev() #[[ATTR6:[0-9]+]]			// CHECK2-NEXT: call void @_Z3usev() #[[ATTR7:[0-9]+]]
	// CHECK2-NEXT: ret void			// CHECK2-NEXT: ret void
	//			//
	//			//
	// CHECK2-LABEL: define {{[^@]+}}@_Z3usev			// CHECK2-LABEL: define {{[^@]+}}@_Z3usev
	// CHECK2-SAME: () #[[ATTR2:[0-9]+]] {			// CHECK2-SAME: () #[[ATTR2:[0-9]+]] {
	// CHECK2-NEXT: entry:			// CHECK2-NEXT: entry:
	// CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.]] = alloca [0 x i8], align 4			// CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.]] = alloca [0 x i8], align 4
	// CHECK2-NEXT: [[TMP0:%.]] = call i32 @__kmpc_global_thread_num(%struct.ident_t @[[GLOB3:[0-9]+]])			// CHECK2-NEXT: [[TMP0:%.]] = call i32 @__kmpc_global_thread_num(%struct.ident_t @[[GLOB3:[0-9]+]])
	// CHECK2-NEXT: [[TMP1:%.]] = bitcast [0 x i8]* [[CAPTURED_VARS_ADDRS]] to i8**			// CHECK2-NEXT: [[TMP1:%.]] = bitcast [0 x i8]* [[CAPTURED_VARS_ADDRS]] to i8**
	// CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32, i32)* @__omp_outlined__1 to i8), i8 bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8), i8* [[TMP1]], i32 0)			// CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32, i32)* @__omp_outlined__1 to i8), i8 bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8), i8* [[TMP1]], i32 0)
	// CHECK2-NEXT: ret void			// CHECK2-NEXT: ret void
	//			//
	//			//
	// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l23			// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l23
	// CHECK2-SAME: () #[[ATTR1]] {			// CHECK2-SAME: () #[[ATTR1]] {
	// CHECK2-NEXT: entry:			// CHECK2-NEXT: entry:
	// CHECK2-NEXT: [[TMP0:%.]] = call i32 @__kmpc_target_init(%struct.ident_t @[[GLOB1]], i8 1, i1 true, i1 true)			// CHECK2-NEXT: [[TMP0:%.]] = call i32 @__kmpc_target_init(%struct.ident_t @[[GLOB1]], i8 1, i1 true, i1 true)
	// CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1			// CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
	// CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.]], label [[WORKER_EXIT:%.]]			// CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.]], label [[WORKER_EXIT:%.]]
	// CHECK2: user_code.entry:			// CHECK2: user_code.entry:
	// CHECK2-NEXT: call void @_Z3usev() #[[ATTR6]]			// CHECK2-NEXT: call void @_Z3usev() #[[ATTR7]]
	// CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)			// CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
	// CHECK2-NEXT: ret void			// CHECK2-NEXT: ret void
	// CHECK2: worker.exit:			// CHECK2: worker.exit:
	// CHECK2-NEXT: ret void			// CHECK2-NEXT: ret void
	//			//
	//			//
	// CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1			// CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1
	// CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {			// CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
	// CHECK2-NEXT: entry:			// CHECK2-NEXT: entry:
	// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4			// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4			// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4			// CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
	// CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4			// CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
	// CHECK2-NEXT: call void @_Z4workv() #[[ATTR6]]			// CHECK2-NEXT: call void @_Z4workv() #[[ATTR7]]
	// CHECK2-NEXT: ret void			// CHECK2-NEXT: ret void
	//			//
	//			//
	// CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper			// CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper
	// CHECK2-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR5:[0-9]+]] {			// CHECK2-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR6:[0-9]+]] {
	// CHECK2-NEXT: entry:			// CHECK2-NEXT: entry:
	// CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2			// CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2
	// CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4			// CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
	// CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4			// CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
	// CHECK2-NEXT: [[GLOBAL_ARGS:%.]] = alloca i8*, align 4			// CHECK2-NEXT: [[GLOBAL_ARGS:%.]] = alloca i8*, align 4
	// CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4			// CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
	// CHECK2-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2			// CHECK2-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2
	// CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4			// CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
	Show All 21 Lines
	//			//
	// CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__			// CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__
	// CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {			// CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
	// CHECK3-NEXT: entry:			// CHECK3-NEXT: entry:
	// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4			// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4			// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4			// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
	// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4			// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
	// CHECK3-NEXT: call void @_Z3usev() #[[ATTR6:[0-9]+]]			// CHECK3-NEXT: call void @_Z3usev() #[[ATTR7:[0-9]+]]
	// CHECK3-NEXT: ret void			// CHECK3-NEXT: ret void
	//			//
	//			//
	// CHECK3-LABEL: define {{[^@]+}}@_Z3usev			// CHECK3-LABEL: define {{[^@]+}}@_Z3usev
	// CHECK3-SAME: () #[[ATTR2:[0-9]+]] {			// CHECK3-SAME: () #[[ATTR2:[0-9]+]] {
	// CHECK3-NEXT: entry:			// CHECK3-NEXT: entry:
	// CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.]] = alloca [0 x i8], align 4			// CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.]] = alloca [0 x i8], align 4
	// CHECK3-NEXT: [[TMP0:%.]] = call i32 @__kmpc_global_thread_num(%struct.ident_t @[[GLOB3:[0-9]+]])			// CHECK3-NEXT: [[TMP0:%.]] = call i32 @__kmpc_global_thread_num(%struct.ident_t @[[GLOB3:[0-9]+]])
	// CHECK3-NEXT: [[TMP1:%.]] = bitcast [0 x i8]* [[CAPTURED_VARS_ADDRS]] to i8**			// CHECK3-NEXT: [[TMP1:%.]] = bitcast [0 x i8]* [[CAPTURED_VARS_ADDRS]] to i8**
	// CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32, i32)* @__omp_outlined__1 to i8), i8 bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8), i8* [[TMP1]], i32 0)			// CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32, i32)* @__omp_outlined__1 to i8), i8 bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8), i8* [[TMP1]], i32 0)
	// CHECK3-NEXT: ret void			// CHECK3-NEXT: ret void
	//			//
	//			//
	// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l23			// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l23
	// CHECK3-SAME: () #[[ATTR1]] {			// CHECK3-SAME: () #[[ATTR1]] {
	// CHECK3-NEXT: entry:			// CHECK3-NEXT: entry:
	// CHECK3-NEXT: [[TMP0:%.]] = call i32 @__kmpc_target_init(%struct.ident_t @[[GLOB1]], i8 1, i1 true, i1 true)			// CHECK3-NEXT: [[TMP0:%.]] = call i32 @__kmpc_target_init(%struct.ident_t @[[GLOB1]], i8 1, i1 true, i1 true)
	// CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1			// CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
	// CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.]], label [[WORKER_EXIT:%.]]			// CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.]], label [[WORKER_EXIT:%.]]
	// CHECK3: user_code.entry:			// CHECK3: user_code.entry:
	// CHECK3-NEXT: call void @_Z3usev() #[[ATTR6]]			// CHECK3-NEXT: call void @_Z3usev() #[[ATTR7]]
	// CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)			// CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
	// CHECK3-NEXT: ret void			// CHECK3-NEXT: ret void
	// CHECK3: worker.exit:			// CHECK3: worker.exit:
	// CHECK3-NEXT: ret void			// CHECK3-NEXT: ret void
	//			//
	//			//
	// CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1			// CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1
	// CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {			// CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.]], i32 noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
	// CHECK3-NEXT: entry:			// CHECK3-NEXT: entry:
	// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4			// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4			// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4			// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
	// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4			// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
	// CHECK3-NEXT: call void @_Z4workv() #[[ATTR6]]			// CHECK3-NEXT: call void @_Z4workv() #[[ATTR7]]
	// CHECK3-NEXT: ret void			// CHECK3-NEXT: ret void
	//			//
	//			//
	// CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper			// CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper
	// CHECK3-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR5:[0-9]+]] {			// CHECK3-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR6:[0-9]+]] {
	// CHECK3-NEXT: entry:			// CHECK3-NEXT: entry:
	// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2			// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2
	// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4			// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
	// CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4			// CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
	// CHECK3-NEXT: [[GLOBAL_ARGS:%.]] = alloca i8*, align 4			// CHECK3-NEXT: [[GLOBAL_ARGS:%.]] = alloca i8*, align 4
	// CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4			// CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
	// CHECK3-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2			// CHECK3-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2
	// CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4			// CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
	// CHECK3-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])			// CHECK3-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
	// CHECK3-NEXT: call void @__omp_outlined__1(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]]) #[[ATTR3:[0-9]+]]			// CHECK3-NEXT: call void @__omp_outlined__1(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]]) #[[ATTR3:[0-9]+]]
	// CHECK3-NEXT: ret void			// CHECK3-NEXT: ret void
	//			//

clang/test/OpenMP/nvptx_nested_parallel_codegen.cpp

	Show All 39 Lines
	// CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.]] = alloca [1 x i8], align 8			// CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.]] = alloca [1 x i8], align 8
	// CHECK1-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8			// CHECK1-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8
	// CHECK1-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 8			// CHECK1-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 8
	// CHECK1-NEXT: [[TMP1:%.]] = call i32 @__kmpc_target_init(%struct.ident_t @[[GLOB1:[0-9]+]], i8 1, i1 true, i1 true)			// CHECK1-NEXT: [[TMP1:%.]] = call i32 @__kmpc_target_init(%struct.ident_t @[[GLOB1:[0-9]+]], i8 1, i1 true, i1 true)
	// CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1			// CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
	// CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.]], label [[WORKER_EXIT:%.]]			// CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.]], label [[WORKER_EXIT:%.]]
	// CHECK1: user_code.entry:			// CHECK1: user_code.entry:
	// CHECK1-NEXT: [[TMP2:%.]] = call i32 @__kmpc_global_thread_num(%struct.ident_t @[[GLOB1]])			// CHECK1-NEXT: [[TMP2:%.]] = call i32 @__kmpc_global_thread_num(%struct.ident_t @[[GLOB1]])
	// CHECK1-NEXT: call void @_Z3usePi(i32* [[TMP0]]) #[[ATTR5:[0-9]+]]			// CHECK1-NEXT: call void @_Z3usePi(i32* [[TMP0]]) #[[ATTR6:[0-9]+]]
	// CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 2)			// CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 2)
	// CHECK1-NEXT: [[TMP3:%.]] = getelementptr inbounds [1 x i8], [1 x i8] [[CAPTURED_VARS_ADDRS]], i64 0, i64 0			// CHECK1-NEXT: [[TMP3:%.]] = getelementptr inbounds [1 x i8], [1 x i8] [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
	// CHECK1-NEXT: [[TMP4:%.]] = bitcast i32 [[TMP0]] to i8*			// CHECK1-NEXT: [[TMP4:%.]] = bitcast i32 [[TMP0]] to i8*
	// CHECK1-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 8			// CHECK1-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 8
	// CHECK1-NEXT: [[TMP5:%.]] = bitcast [1 x i8]* [[CAPTURED_VARS_ADDRS]] to i8**			// CHECK1-NEXT: [[TMP5:%.]] = bitcast [1 x i8]* [[CAPTURED_VARS_ADDRS]] to i8**
	// CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32, i32, i32) @__omp_outlined__ to i8), i8 bitcast (void (i16, i32)* @__omp_outlined___wrapper to i8), i8* [[TMP5]], i64 1)			// CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32, i32, i32) @__omp_outlined__ to i8), i8 bitcast (void (i16, i32)* @__omp_outlined___wrapper to i8), i8* [[TMP5]], i64 1)
	// CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)			// CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
	// CHECK1-NEXT: ret void			// CHECK1-NEXT: ret void
	Show All 22 Lines
	// CHECK1-NEXT: entry:			// CHECK1-NEXT: entry:
	// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8			// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8
	// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8			// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8
	// CHECK1-NEXT: [[C_ADDR:%.]] = alloca i32, align 8			// CHECK1-NEXT: [[C_ADDR:%.]] = alloca i32, align 8
	// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8			// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
	// CHECK1-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8			// CHECK1-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8
	// CHECK1-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 8			// CHECK1-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 8
	// CHECK1-NEXT: call void @_Z3usePi(i32* [[TMP0]]) #[[ATTR5]]			// CHECK1-NEXT: call void @_Z3usePi(i32* [[TMP0]]) #[[ATTR6]]
	// CHECK1-NEXT: ret void			// CHECK1-NEXT: ret void
	//			//
	//			//
	// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined___wrapper			// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined___wrapper
	// CHECK1-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR2:[0-9]+]] {			// CHECK1-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR2:[0-9]+]] {
	// CHECK1-NEXT: entry:			// CHECK1-NEXT: entry:
	// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2			// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2
	// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4			// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
	Show All 17 Lines
	// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8			// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8
	// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8			// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8
	// CHECK1-NEXT: [[C_ADDR:%.]] = alloca i32*, align 8			// CHECK1-NEXT: [[C_ADDR:%.]] = alloca i32*, align 8
	// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8			// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
	// CHECK1-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 8			// CHECK1-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 8
	// CHECK1-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 8			// CHECK1-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 8
	// CHECK1-NEXT: [[TMP1:%.]] = load i32, i32** [[TMP0]], align 8			// CHECK1-NEXT: [[TMP1:%.]] = load i32, i32** [[TMP0]], align 8
	// CHECK1-NEXT: call void @_Z4workPi(i32* [[TMP1]]) #[[ATTR5]]			// CHECK1-NEXT: call void @_Z4workPi(i32* [[TMP1]]) #[[ATTR6]]
	// CHECK1-NEXT: ret void			// CHECK1-NEXT: ret void
	//			//
	//			//
	// CHECK1-LABEL: define {{[^@]+}}@_Z4workPi			// CHECK1-LABEL: define {{[^@]+}}@_Z4workPi
	// CHECK1-SAME: (i32* [[C:%.*]]) #[[ATTR1]] {			// CHECK1-SAME: (i32* [[C:%.*]]) #[[ATTR1]] {
	// CHECK1-NEXT: entry:			// CHECK1-NEXT: entry:
	// CHECK1-NEXT: [[C_ADDR:%.]] = alloca i32, align 8			// CHECK1-NEXT: [[C_ADDR:%.]] = alloca i32, align 8
	// CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4			// CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4
	// CHECK1-NEXT: [[ATOMIC_TEMP1:%.*]] = alloca i32, align 4			// CHECK1-NEXT: [[ATOMIC_TEMP1:%.*]] = alloca i32, align 4
	// CHECK1-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8			// CHECK1-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8
	// CHECK1-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 8			// CHECK1-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 8
	// CHECK1-NEXT: [[TMP1:%.]] = bitcast i32 [[TMP0]] to i8*			// CHECK1-NEXT: [[TMP1:%.]] = bitcast i32 [[TMP0]] to i8*
	// CHECK1-NEXT: [[TMP2:%.]] = bitcast i32 [[ATOMIC_TEMP]] to i8*			// CHECK1-NEXT: [[TMP2:%.]] = bitcast i32 [[ATOMIC_TEMP]] to i8*
	// CHECK1-NEXT: call void @__atomic_load(i64 4, i8* [[TMP1]], i8* [[TMP2]], i32 0) #[[ATTR5]]			// CHECK1-NEXT: call void @__atomic_load(i64 4, i8* [[TMP1]], i8* [[TMP2]], i32 0) #[[ATTR6]]
	// CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]			// CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]
	// CHECK1: atomic_cont:			// CHECK1: atomic_cont:
	// CHECK1-NEXT: [[TMP3:%.]] = load i32, i32 [[ATOMIC_TEMP]], align 4			// CHECK1-NEXT: [[TMP3:%.]] = load i32, i32 [[ATOMIC_TEMP]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[ATOMIC_TEMP1]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[ATOMIC_TEMP1]], align 4
	// CHECK1-NEXT: [[TMP4:%.]] = bitcast i32 [[TMP0]] to i8*			// CHECK1-NEXT: [[TMP4:%.]] = bitcast i32 [[TMP0]] to i8*
	// CHECK1-NEXT: [[TMP5:%.]] = bitcast i32 [[ATOMIC_TEMP]] to i8*			// CHECK1-NEXT: [[TMP5:%.]] = bitcast i32 [[ATOMIC_TEMP]] to i8*
	// CHECK1-NEXT: [[TMP6:%.]] = bitcast i32 [[ATOMIC_TEMP1]] to i8*			// CHECK1-NEXT: [[TMP6:%.]] = bitcast i32 [[ATOMIC_TEMP1]] to i8*
	// CHECK1-NEXT: [[CALL:%.]] = call zeroext i1 @__atomic_compare_exchange(i64 4, i8 [[TMP4]], i8* [[TMP5]], i8* [[TMP6]], i32 0, i32 0) #[[ATTR5]]			// CHECK1-NEXT: [[CALL:%.]] = call zeroext i1 @__atomic_compare_exchange(i64 4, i8 [[TMP4]], i8* [[TMP5]], i8* [[TMP6]], i32 0, i32 0) #[[ATTR6]]
	// CHECK1-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]			// CHECK1-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]
	// CHECK1: atomic_exit:			// CHECK1: atomic_exit:
	// CHECK1-NEXT: ret void			// CHECK1-NEXT: ret void
	//			//
	//			//
	// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper			// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper
	// CHECK1-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR2]] {			// CHECK1-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR2]] {
	// CHECK1-NEXT: entry:			// CHECK1-NEXT: entry:
	Show All 20 Lines
	// CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.]] = alloca [1 x i8], align 4			// CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.]] = alloca [1 x i8], align 4
	// CHECK2-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4			// CHECK2-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4
	// CHECK2-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4			// CHECK2-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4
	// CHECK2-NEXT: [[TMP1:%.]] = call i32 @__kmpc_target_init(%struct.ident_t @[[GLOB1:[0-9]+]], i8 1, i1 true, i1 true)			// CHECK2-NEXT: [[TMP1:%.]] = call i32 @__kmpc_target_init(%struct.ident_t @[[GLOB1:[0-9]+]], i8 1, i1 true, i1 true)
	// CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1			// CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
	// CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.]], label [[WORKER_EXIT:%.]]			// CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.]], label [[WORKER_EXIT:%.]]
	// CHECK2: user_code.entry:			// CHECK2: user_code.entry:
	// CHECK2-NEXT: [[TMP2:%.]] = call i32 @__kmpc_global_thread_num(%struct.ident_t @[[GLOB1]])			// CHECK2-NEXT: [[TMP2:%.]] = call i32 @__kmpc_global_thread_num(%struct.ident_t @[[GLOB1]])
	// CHECK2-NEXT: call void @_Z3usePi(i32* [[TMP0]]) #[[ATTR5:[0-9]+]]			// CHECK2-NEXT: call void @_Z3usePi(i32* [[TMP0]]) #[[ATTR6:[0-9]+]]
	// CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 2)			// CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 2)
	// CHECK2-NEXT: [[TMP3:%.]] = getelementptr inbounds [1 x i8], [1 x i8] [[CAPTURED_VARS_ADDRS]], i32 0, i32 0			// CHECK2-NEXT: [[TMP3:%.]] = getelementptr inbounds [1 x i8], [1 x i8] [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
	// CHECK2-NEXT: [[TMP4:%.]] = bitcast i32 [[TMP0]] to i8*			// CHECK2-NEXT: [[TMP4:%.]] = bitcast i32 [[TMP0]] to i8*
	// CHECK2-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 4			// CHECK2-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 4
	// CHECK2-NEXT: [[TMP5:%.]] = bitcast [1 x i8]* [[CAPTURED_VARS_ADDRS]] to i8**			// CHECK2-NEXT: [[TMP5:%.]] = bitcast [1 x i8]* [[CAPTURED_VARS_ADDRS]] to i8**
	// CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32, i32, i32) @__omp_outlined__ to i8), i8 bitcast (void (i16, i32)* @__omp_outlined___wrapper to i8), i8* [[TMP5]], i32 1)			// CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32, i32, i32) @__omp_outlined__ to i8), i8 bitcast (void (i16, i32)* @__omp_outlined___wrapper to i8), i8* [[TMP5]], i32 1)
	// CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)			// CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
	// CHECK2-NEXT: ret void			// CHECK2-NEXT: ret void
	Show All 22 Lines
	// CHECK2-NEXT: entry:			// CHECK2-NEXT: entry:
	// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4			// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4			// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK2-NEXT: [[C_ADDR:%.]] = alloca i32, align 4			// CHECK2-NEXT: [[C_ADDR:%.]] = alloca i32, align 4
	// CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4			// CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
	// CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4			// CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
	// CHECK2-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4			// CHECK2-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4
	// CHECK2-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4			// CHECK2-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4
	// CHECK2-NEXT: call void @_Z3usePi(i32* [[TMP0]]) #[[ATTR5]]			// CHECK2-NEXT: call void @_Z3usePi(i32* [[TMP0]]) #[[ATTR6]]
	// CHECK2-NEXT: ret void			// CHECK2-NEXT: ret void
	//			//
	//			//
	// CHECK2-LABEL: define {{[^@]+}}@__omp_outlined___wrapper			// CHECK2-LABEL: define {{[^@]+}}@__omp_outlined___wrapper
	// CHECK2-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR2:[0-9]+]] {			// CHECK2-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR2:[0-9]+]] {
	// CHECK2-NEXT: entry:			// CHECK2-NEXT: entry:
	// CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2			// CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2
	// CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4			// CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
	Show All 17 Lines
	// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4			// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4			// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK2-NEXT: [[C_ADDR:%.]] = alloca i32*, align 4			// CHECK2-NEXT: [[C_ADDR:%.]] = alloca i32*, align 4
	// CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4			// CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
	// CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4			// CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
	// CHECK2-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4			// CHECK2-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4
	// CHECK2-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4			// CHECK2-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4
	// CHECK2-NEXT: [[TMP1:%.]] = load i32, i32** [[TMP0]], align 4			// CHECK2-NEXT: [[TMP1:%.]] = load i32, i32** [[TMP0]], align 4
	// CHECK2-NEXT: call void @_Z4workPi(i32* [[TMP1]]) #[[ATTR5]]			// CHECK2-NEXT: call void @_Z4workPi(i32* [[TMP1]]) #[[ATTR6]]
	// CHECK2-NEXT: ret void			// CHECK2-NEXT: ret void
	//			//
	//			//
	// CHECK2-LABEL: define {{[^@]+}}@_Z4workPi			// CHECK2-LABEL: define {{[^@]+}}@_Z4workPi
	// CHECK2-SAME: (i32* [[C:%.*]]) #[[ATTR1]] {			// CHECK2-SAME: (i32* [[C:%.*]]) #[[ATTR1]] {
	// CHECK2-NEXT: entry:			// CHECK2-NEXT: entry:
	// CHECK2-NEXT: [[C_ADDR:%.]] = alloca i32, align 4			// CHECK2-NEXT: [[C_ADDR:%.]] = alloca i32, align 4
	// CHECK2-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4			// CHECK2-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4
	// CHECK2-NEXT: [[ATOMIC_TEMP1:%.*]] = alloca i32, align 4			// CHECK2-NEXT: [[ATOMIC_TEMP1:%.*]] = alloca i32, align 4
	// CHECK2-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4			// CHECK2-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4
	// CHECK2-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4			// CHECK2-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4
	// CHECK2-NEXT: [[TMP1:%.]] = bitcast i32 [[TMP0]] to i8*			// CHECK2-NEXT: [[TMP1:%.]] = bitcast i32 [[TMP0]] to i8*
	// CHECK2-NEXT: [[TMP2:%.]] = bitcast i32 [[ATOMIC_TEMP]] to i8*			// CHECK2-NEXT: [[TMP2:%.]] = bitcast i32 [[ATOMIC_TEMP]] to i8*
	// CHECK2-NEXT: call void @__atomic_load(i32 4, i8* [[TMP1]], i8* [[TMP2]], i32 0) #[[ATTR5]]			// CHECK2-NEXT: call void @__atomic_load(i32 4, i8* [[TMP1]], i8* [[TMP2]], i32 0) #[[ATTR6]]
	// CHECK2-NEXT: br label [[ATOMIC_CONT:%.*]]			// CHECK2-NEXT: br label [[ATOMIC_CONT:%.*]]
	// CHECK2: atomic_cont:			// CHECK2: atomic_cont:
	// CHECK2-NEXT: [[TMP3:%.]] = load i32, i32 [[ATOMIC_TEMP]], align 4			// CHECK2-NEXT: [[TMP3:%.]] = load i32, i32 [[ATOMIC_TEMP]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[ATOMIC_TEMP1]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[ATOMIC_TEMP1]], align 4
	// CHECK2-NEXT: [[TMP4:%.]] = bitcast i32 [[TMP0]] to i8*			// CHECK2-NEXT: [[TMP4:%.]] = bitcast i32 [[TMP0]] to i8*
	// CHECK2-NEXT: [[TMP5:%.]] = bitcast i32 [[ATOMIC_TEMP]] to i8*			// CHECK2-NEXT: [[TMP5:%.]] = bitcast i32 [[ATOMIC_TEMP]] to i8*
	// CHECK2-NEXT: [[TMP6:%.]] = bitcast i32 [[ATOMIC_TEMP1]] to i8*			// CHECK2-NEXT: [[TMP6:%.]] = bitcast i32 [[ATOMIC_TEMP1]] to i8*
	// CHECK2-NEXT: [[CALL:%.]] = call zeroext i1 @__atomic_compare_exchange(i32 4, i8 [[TMP4]], i8* [[TMP5]], i8* [[TMP6]], i32 0, i32 0) #[[ATTR5]]			// CHECK2-NEXT: [[CALL:%.]] = call zeroext i1 @__atomic_compare_exchange(i32 4, i8 [[TMP4]], i8* [[TMP5]], i8* [[TMP6]], i32 0, i32 0) #[[ATTR6]]
	// CHECK2-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]			// CHECK2-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]
	// CHECK2: atomic_exit:			// CHECK2: atomic_exit:
	// CHECK2-NEXT: ret void			// CHECK2-NEXT: ret void
	//			//
	//			//
	// CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper			// CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper
	// CHECK2-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR2]] {			// CHECK2-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR2]] {
	// CHECK2-NEXT: entry:			// CHECK2-NEXT: entry:
	Show All 20 Lines
	// CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.]] = alloca [1 x i8], align 4			// CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.]] = alloca [1 x i8], align 4
	// CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4			// CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4
	// CHECK3-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4			// CHECK3-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4
	// CHECK3-NEXT: [[TMP1:%.]] = call i32 @__kmpc_target_init(%struct.ident_t @[[GLOB1:[0-9]+]], i8 1, i1 true, i1 true)			// CHECK3-NEXT: [[TMP1:%.]] = call i32 @__kmpc_target_init(%struct.ident_t @[[GLOB1:[0-9]+]], i8 1, i1 true, i1 true)
	// CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1			// CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
	// CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.]], label [[WORKER_EXIT:%.]]			// CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.]], label [[WORKER_EXIT:%.]]
	// CHECK3: user_code.entry:			// CHECK3: user_code.entry:
	// CHECK3-NEXT: [[TMP2:%.]] = call i32 @__kmpc_global_thread_num(%struct.ident_t @[[GLOB1]])			// CHECK3-NEXT: [[TMP2:%.]] = call i32 @__kmpc_global_thread_num(%struct.ident_t @[[GLOB1]])
	// CHECK3-NEXT: call void @_Z3usePi(i32* [[TMP0]]) #[[ATTR5:[0-9]+]]			// CHECK3-NEXT: call void @_Z3usePi(i32* [[TMP0]]) #[[ATTR6:[0-9]+]]
	// CHECK3-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 2)			// CHECK3-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 2)
	// CHECK3-NEXT: [[TMP3:%.]] = getelementptr inbounds [1 x i8], [1 x i8] [[CAPTURED_VARS_ADDRS]], i32 0, i32 0			// CHECK3-NEXT: [[TMP3:%.]] = getelementptr inbounds [1 x i8], [1 x i8] [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
	// CHECK3-NEXT: [[TMP4:%.]] = bitcast i32 [[TMP0]] to i8*			// CHECK3-NEXT: [[TMP4:%.]] = bitcast i32 [[TMP0]] to i8*
	// CHECK3-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 4			// CHECK3-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 4
	// CHECK3-NEXT: [[TMP5:%.]] = bitcast [1 x i8]* [[CAPTURED_VARS_ADDRS]] to i8**			// CHECK3-NEXT: [[TMP5:%.]] = bitcast [1 x i8]* [[CAPTURED_VARS_ADDRS]] to i8**
	// CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32, i32, i32) @__omp_outlined__ to i8), i8 bitcast (void (i16, i32)* @__omp_outlined___wrapper to i8), i8* [[TMP5]], i32 1)			// CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32, i32, i32) @__omp_outlined__ to i8), i8 bitcast (void (i16, i32)* @__omp_outlined___wrapper to i8), i8* [[TMP5]], i32 1)
	// CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)			// CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
	// CHECK3-NEXT: ret void			// CHECK3-NEXT: ret void
	Show All 22 Lines
	// CHECK3-NEXT: entry:			// CHECK3-NEXT: entry:
	// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4			// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4			// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK3-NEXT: [[C_ADDR:%.]] = alloca i32, align 4			// CHECK3-NEXT: [[C_ADDR:%.]] = alloca i32, align 4
	// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4			// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
	// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4			// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
	// CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4			// CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4
	// CHECK3-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4			// CHECK3-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4
	// CHECK3-NEXT: call void @_Z3usePi(i32* [[TMP0]]) #[[ATTR5]]			// CHECK3-NEXT: call void @_Z3usePi(i32* [[TMP0]]) #[[ATTR6]]
	// CHECK3-NEXT: ret void			// CHECK3-NEXT: ret void
	//			//
	//			//
	// CHECK3-LABEL: define {{[^@]+}}@__omp_outlined___wrapper			// CHECK3-LABEL: define {{[^@]+}}@__omp_outlined___wrapper
	// CHECK3-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR2:[0-9]+]] {			// CHECK3-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR2:[0-9]+]] {
	// CHECK3-NEXT: entry:			// CHECK3-NEXT: entry:
	// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2			// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2
	// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4			// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
	Show All 17 Lines
	// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4			// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4			// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 4
	// CHECK3-NEXT: [[C_ADDR:%.]] = alloca i32*, align 4			// CHECK3-NEXT: [[C_ADDR:%.]] = alloca i32*, align 4
	// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4			// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
	// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4			// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
	// CHECK3-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4			// CHECK3-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4
	// CHECK3-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4			// CHECK3-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4
	// CHECK3-NEXT: [[TMP1:%.]] = load i32, i32** [[TMP0]], align 4			// CHECK3-NEXT: [[TMP1:%.]] = load i32, i32** [[TMP0]], align 4
	// CHECK3-NEXT: call void @_Z4workPi(i32* [[TMP1]]) #[[ATTR5]]			// CHECK3-NEXT: call void @_Z4workPi(i32* [[TMP1]]) #[[ATTR6]]
	// CHECK3-NEXT: ret void			// CHECK3-NEXT: ret void
	//			//
	//			//
	// CHECK3-LABEL: define {{[^@]+}}@_Z4workPi			// CHECK3-LABEL: define {{[^@]+}}@_Z4workPi
	// CHECK3-SAME: (i32* [[C:%.*]]) #[[ATTR1]] {			// CHECK3-SAME: (i32* [[C:%.*]]) #[[ATTR1]] {
	// CHECK3-NEXT: entry:			// CHECK3-NEXT: entry:
	// CHECK3-NEXT: [[C_ADDR:%.]] = alloca i32, align 4			// CHECK3-NEXT: [[C_ADDR:%.]] = alloca i32, align 4
	// CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4			// CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4
	// CHECK3-NEXT: [[ATOMIC_TEMP1:%.*]] = alloca i32, align 4			// CHECK3-NEXT: [[ATOMIC_TEMP1:%.*]] = alloca i32, align 4
	// CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4			// CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4
	// CHECK3-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4			// CHECK3-NEXT: [[TMP0:%.]] = load i32, i32** [[C_ADDR]], align 4
	// CHECK3-NEXT: [[TMP1:%.]] = bitcast i32 [[TMP0]] to i8*			// CHECK3-NEXT: [[TMP1:%.]] = bitcast i32 [[TMP0]] to i8*
	// CHECK3-NEXT: [[TMP2:%.]] = bitcast i32 [[ATOMIC_TEMP]] to i8*			// CHECK3-NEXT: [[TMP2:%.]] = bitcast i32 [[ATOMIC_TEMP]] to i8*
	// CHECK3-NEXT: call void @__atomic_load(i32 4, i8* [[TMP1]], i8* [[TMP2]], i32 0) #[[ATTR5]]			// CHECK3-NEXT: call void @__atomic_load(i32 4, i8* [[TMP1]], i8* [[TMP2]], i32 0) #[[ATTR6]]
	// CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]]			// CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]]
	// CHECK3: atomic_cont:			// CHECK3: atomic_cont:
	// CHECK3-NEXT: [[TMP3:%.]] = load i32, i32 [[ATOMIC_TEMP]], align 4			// CHECK3-NEXT: [[TMP3:%.]] = load i32, i32 [[ATOMIC_TEMP]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[ATOMIC_TEMP1]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[ATOMIC_TEMP1]], align 4
	// CHECK3-NEXT: [[TMP4:%.]] = bitcast i32 [[TMP0]] to i8*			// CHECK3-NEXT: [[TMP4:%.]] = bitcast i32 [[TMP0]] to i8*
	// CHECK3-NEXT: [[TMP5:%.]] = bitcast i32 [[ATOMIC_TEMP]] to i8*			// CHECK3-NEXT: [[TMP5:%.]] = bitcast i32 [[ATOMIC_TEMP]] to i8*
	// CHECK3-NEXT: [[TMP6:%.]] = bitcast i32 [[ATOMIC_TEMP1]] to i8*			// CHECK3-NEXT: [[TMP6:%.]] = bitcast i32 [[ATOMIC_TEMP1]] to i8*
	// CHECK3-NEXT: [[CALL:%.]] = call zeroext i1 @__atomic_compare_exchange(i32 4, i8 [[TMP4]], i8* [[TMP5]], i8* [[TMP6]], i32 0, i32 0) #[[ATTR5]]			// CHECK3-NEXT: [[CALL:%.]] = call zeroext i1 @__atomic_compare_exchange(i32 4, i8 [[TMP4]], i8* [[TMP5]], i8* [[TMP6]], i32 0, i32 0) #[[ATTR6]]
	// CHECK3-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]			// CHECK3-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]
	// CHECK3: atomic_exit:			// CHECK3: atomic_exit:
	// CHECK3-NEXT: ret void			// CHECK3-NEXT: ret void
	//			//
	//			//
	// CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper			// CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper
	// CHECK3-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR2]] {			// CHECK3-SAME: (i16 zeroext [[TMP0:%.]], i32 [[TMP1:%.]]) #[[ATTR2]] {
	// CHECK3-NEXT: entry:			// CHECK3-NEXT: entry:
	Show All 15 Lines

clang/test/OpenMP/parallel_if_codegen.cpp

	Show First 20 Lines • Show All 910 Lines • ▼ Show 20 Lines
	// CHECK7-NEXT: entry:			// CHECK7-NEXT: entry:
	// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8			// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.]] = alloca i32, align 8
	// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8			// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.]] = alloca i32, align 8
	// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8			// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
	// CHECK7-NEXT: call void @_Z3fn3v()			// CHECK7-NEXT: call void @_Z3fn3v()
	// CHECK7-NEXT: ret void			// CHECK7-NEXT: ret void
	//			//
	//
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clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp

This file is larger than 256 KB, so syntax highlighting is disabled by default.

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	//			//
	//			//
	// CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg			// CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
	// CHECK14-SAME: () #[[ATTR5:[0-9]+]] {			// CHECK14-SAME: () #[[ATTR5:[0-9]+]] {
	// CHECK14-NEXT: entry:			// CHECK14-NEXT: entry:
	// CHECK14-NEXT: call void @__tgt_register_requires(i64 1)			// CHECK14-NEXT: call void @__tgt_register_requires(i64 1)
	// CHECK14-NEXT: ret void			// CHECK14-NEXT: ret void
	//			//
	//
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clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp

This file is larger than 256 KB, so syntax highlighting is disabled by default.

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	//			//
	//			//
	// CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg			// CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
	// CHECK14-SAME: () #[[ATTR5:[0-9]+]] {			// CHECK14-SAME: () #[[ATTR5:[0-9]+]] {
	// CHECK14-NEXT: entry:			// CHECK14-NEXT: entry:
	// CHECK14-NEXT: call void @__tgt_register_requires(i64 1)			// CHECK14-NEXT: call void @__tgt_register_requires(i64 1)
	// CHECK14-NEXT: ret void			// CHECK14-NEXT: ret void
	//			//
	//
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clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp

This file is larger than 256 KB, so syntax highlighting is disabled by default.

	Show First 20 Lines • Show All 187 Lines • ▼ Show 20 Lines
	// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK1-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK1-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z9gtid_testv()			// CHECK1-NEXT: call void @_Z9gtid_testv()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK1-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK1-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z3fn4v()			// CHECK1-NEXT: call void @_Z3fn4v()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z3fn5v()			// CHECK1-NEXT: call void @_Z3fn5v()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: br label [[OMP_IF_END]]			// CHECK1-NEXT: br label [[OMP_IF_END]]
	// CHECK1: omp_if.end:			// CHECK1: omp_if.end:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0			// CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
	// CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z3fn6v()			// CHECK1-NEXT: call void @_Z3fn6v()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK1-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK1-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z3fn1v()			// CHECK1-NEXT: call void @_Z3fn1v()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK1-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z3fn2v()			// CHECK1-NEXT: call void @_Z3fn2v()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: br label [[OMP_IF_END]]			// CHECK1-NEXT: br label [[OMP_IF_END]]
	// CHECK1: omp_if.end:			// CHECK1: omp_if.end:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK1-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]			// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
	// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK1-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0			// CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
	// CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK1-NEXT: call void @_Z3fn3v()			// CHECK1-NEXT: call void @_Z3fn3v()
	// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK1: omp.body.continue:			// CHECK1: omp.body.continue:
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK1: omp.inner.for.inc:			// CHECK1: omp.inner.for.inc:
	// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK1-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
	// CHECK1: omp.inner.for.end:			// CHECK1: omp.inner.for.end:
	// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK1: omp.loop.exit:			// CHECK1: omp.loop.exit:
	// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK1-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK1: .omp.final.then:			// CHECK1: .omp.final.then:
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	// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK2-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK2-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK2-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @_Z9gtid_testv()			// CHECK2-NEXT: call void @_Z9gtid_testv()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK2-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK2-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @_Z3fn4v()			// CHECK2-NEXT: call void @_Z3fn4v()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK2-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @_Z3fn5v()			// CHECK2-NEXT: call void @_Z3fn5v()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: br label [[OMP_IF_END]]			// CHECK2-NEXT: br label [[OMP_IF_END]]
	// CHECK2: omp_if.end:			// CHECK2: omp_if.end:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0			// CHECK2-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
	// CHECK2-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK2-NEXT: call void @_Z3fn6v()			// CHECK2-NEXT: call void @_Z3fn6v()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK2-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK2-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK2-NEXT: call void @_Z3fn1v()			// CHECK2-NEXT: call void @_Z3fn1v()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK2-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @_Z3fn2v()			// CHECK2-NEXT: call void @_Z3fn2v()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: br label [[OMP_IF_END]]			// CHECK2-NEXT: br label [[OMP_IF_END]]
	// CHECK2: omp_if.end:			// CHECK2: omp_if.end:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK2-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]			// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
	// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK2-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0			// CHECK2-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
	// CHECK2-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK2-NEXT: call void @_Z3fn3v()			// CHECK2-NEXT: call void @_Z3fn3v()
	// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK2: omp.body.continue:			// CHECK2: omp.body.continue:
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK2: omp.inner.for.inc:			// CHECK2: omp.inner.for.inc:
	// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK2-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
	// CHECK2: omp.inner.for.end:			// CHECK2: omp.inner.for.end:
	// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK2: omp.loop.exit:			// CHECK2: omp.loop.exit:
	// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK2-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK2: .omp.final.then:			// CHECK2: .omp.final.then:
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	// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK3-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK3-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK3-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: call void @_Z9gtid_testv()			// CHECK3-NEXT: call void @_Z9gtid_testv()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
	▲ Show 20 Lines • Show All 120 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK3-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK3-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: call void @_Z3fn4v()			// CHECK3-NEXT: call void @_Z3fn4v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK3-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: call void @_Z3fn5v()			// CHECK3-NEXT: call void @_Z3fn5v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
	▲ Show 20 Lines • Show All 103 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: br label [[OMP_IF_END]]			// CHECK3-NEXT: br label [[OMP_IF_END]]
	// CHECK3: omp_if.end:			// CHECK3: omp_if.end:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_IF_END22:%.*]]			// CHECK3-NEXT: br label [[OMP_IF_END22:%.*]]
	// CHECK3: omp_if.else6:			// CHECK3: omp_if.else6:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK3: omp.inner.for.cond7:			// CHECK3: omp.inner.for.cond7:
	// CHECK3-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4			// CHECK3-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4
	// CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]			// CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
	Show All 23 Lines
	// CHECK3-NEXT: br label [[OMP_IF_END18]]			// CHECK3-NEXT: br label [[OMP_IF_END18]]
	// CHECK3: omp_if.end18:			// CHECK3: omp_if.end18:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
	// CHECK3: omp.inner.for.inc19:			// CHECK3: omp.inner.for.inc19:
	// CHECK3-NEXT: [[TMP28:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP28:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP29:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP29:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]			// CHECK3-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
	// CHECK3-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP38:![0-9]+]]
	// CHECK3: omp.inner.for.end21:			// CHECK3: omp.inner.for.end21:
	// CHECK3-NEXT: br label [[OMP_IF_END22]]			// CHECK3-NEXT: br label [[OMP_IF_END22]]
	// CHECK3: omp_if.end22:			// CHECK3: omp_if.end22:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0			// CHECK3-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
	▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: call void @_Z3fn6v()			// CHECK3-NEXT: call void @_Z3fn6v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK3: omp_if.else:			// CHECK3: omp_if.else:
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK3-NEXT: call void @_Z3fn6v()			// CHECK3-NEXT: call void @_Z3fn6v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK3: omp.body.continue15:			// CHECK3: omp.body.continue15:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK3: omp.inner.for.inc16:			// CHECK3: omp.inner.for.inc16:
	// CHECK3-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP42:![0-9]+]]
	// CHECK3: omp.inner.for.end18:			// CHECK3: omp.inner.for.end18:
	// CHECK3-NEXT: br label [[OMP_IF_END]]			// CHECK3-NEXT: br label [[OMP_IF_END]]
	// CHECK3: omp_if.end:			// CHECK3: omp_if.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK3-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK3-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK3-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: call void @_Z3fn6v()			// CHECK3-NEXT: call void @_Z3fn6v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK3: omp_if.else:			// CHECK3: omp_if.else:
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK3-NEXT: call void @_Z3fn6v()			// CHECK3-NEXT: call void @_Z3fn6v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK3: omp.body.continue15:			// CHECK3: omp.body.continue15:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK3: omp.inner.for.inc16:			// CHECK3: omp.inner.for.inc16:
	// CHECK3-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP46:![0-9]+]]
	// CHECK3: omp.inner.for.end18:			// CHECK3: omp.inner.for.end18:
	// CHECK3-NEXT: br label [[OMP_IF_END]]			// CHECK3-NEXT: br label [[OMP_IF_END]]
	// CHECK3: omp_if.end:			// CHECK3: omp_if.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK3-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK3-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK3-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
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	// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK3-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK3-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: call void @_Z3fn1v()			// CHECK3-NEXT: call void @_Z3fn1v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
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	// CHECK3-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK3-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: call void @_Z3fn2v()			// CHECK3-NEXT: call void @_Z3fn2v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
	▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: br label [[OMP_IF_END]]			// CHECK3-NEXT: br label [[OMP_IF_END]]
	// CHECK3: omp_if.end:			// CHECK3: omp_if.end:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK3-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]			// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
	// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK3-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0			// CHECK3-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
	// CHECK3-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK3-NEXT: call void @_Z3fn3v()			// CHECK3-NEXT: call void @_Z3fn3v()
	// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK3: omp.body.continue:			// CHECK3: omp.body.continue:
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK3: omp.inner.for.inc:			// CHECK3: omp.inner.for.inc:
	// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK3-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]			// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
	// CHECK3: omp.inner.for.end:			// CHECK3: omp.inner.for.end:
	// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK3: omp.loop.exit:			// CHECK3: omp.loop.exit:
	// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK3-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK3: .omp.final.then:			// CHECK3: .omp.final.then:
	▲ Show 20 Lines • Show All 88 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK4-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK4-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
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	// CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
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	// CHECK4-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK4-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
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	// CHECK4-NEXT: call void @_Z9gtid_testv()			// CHECK4-NEXT: call void @_Z9gtid_testv()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
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	// CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK4-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK4-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
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	// CHECK4-NEXT: call void @_Z3fn4v()			// CHECK4-NEXT: call void @_Z3fn4v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
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	// CHECK4-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK4-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
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	// CHECK4-NEXT: call void @_Z3fn5v()			// CHECK4-NEXT: call void @_Z3fn5v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
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	// CHECK4-NEXT: br label [[OMP_IF_END]]			// CHECK4-NEXT: br label [[OMP_IF_END]]
	// CHECK4: omp_if.end:			// CHECK4: omp_if.end:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_IF_END22:%.*]]			// CHECK4-NEXT: br label [[OMP_IF_END22:%.*]]
	// CHECK4: omp_if.else6:			// CHECK4: omp_if.else6:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK4: omp.inner.for.cond7:			// CHECK4: omp.inner.for.cond7:
	// CHECK4-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4			// CHECK4-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4
	// CHECK4-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]			// CHECK4-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
	Show All 23 Lines
	// CHECK4-NEXT: br label [[OMP_IF_END18]]			// CHECK4-NEXT: br label [[OMP_IF_END18]]
	// CHECK4: omp_if.end18:			// CHECK4: omp_if.end18:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
	// CHECK4: omp.inner.for.inc19:			// CHECK4: omp.inner.for.inc19:
	// CHECK4-NEXT: [[TMP28:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP28:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP29:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP29:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]			// CHECK4-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
	// CHECK4-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP38:![0-9]+]]
	// CHECK4: omp.inner.for.end21:			// CHECK4: omp.inner.for.end21:
	// CHECK4-NEXT: br label [[OMP_IF_END22]]			// CHECK4-NEXT: br label [[OMP_IF_END22]]
	// CHECK4: omp_if.end22:			// CHECK4: omp_if.end22:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0			// CHECK4-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
	▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @_Z3fn6v()			// CHECK4-NEXT: call void @_Z3fn6v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK4-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK4: omp_if.else:			// CHECK4: omp_if.else:
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK4-NEXT: call void @_Z3fn6v()			// CHECK4-NEXT: call void @_Z3fn6v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK4: omp.body.continue15:			// CHECK4: omp.body.continue15:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK4: omp.inner.for.inc16:			// CHECK4: omp.inner.for.inc16:
	// CHECK4-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK4-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP42:![0-9]+]]
	// CHECK4: omp.inner.for.end18:			// CHECK4: omp.inner.for.end18:
	// CHECK4-NEXT: br label [[OMP_IF_END]]			// CHECK4-NEXT: br label [[OMP_IF_END]]
	// CHECK4: omp_if.end:			// CHECK4: omp_if.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK4-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK4-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK4-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @_Z3fn6v()			// CHECK4-NEXT: call void @_Z3fn6v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK4-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK4: omp_if.else:			// CHECK4: omp_if.else:
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK4-NEXT: call void @_Z3fn6v()			// CHECK4-NEXT: call void @_Z3fn6v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK4: omp.body.continue15:			// CHECK4: omp.body.continue15:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK4: omp.inner.for.inc16:			// CHECK4: omp.inner.for.inc16:
	// CHECK4-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK4-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP46:![0-9]+]]
	// CHECK4: omp.inner.for.end18:			// CHECK4: omp.inner.for.end18:
	// CHECK4-NEXT: br label [[OMP_IF_END]]			// CHECK4-NEXT: br label [[OMP_IF_END]]
	// CHECK4: omp_if.end:			// CHECK4: omp_if.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK4-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK4-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK4-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 122 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK4-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK4-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @_Z3fn1v()			// CHECK4-NEXT: call void @_Z3fn1v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK4-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @_Z3fn2v()			// CHECK4-NEXT: call void @_Z3fn2v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: br label [[OMP_IF_END]]			// CHECK4-NEXT: br label [[OMP_IF_END]]
	// CHECK4: omp_if.end:			// CHECK4: omp_if.end:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK4-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]			// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
	// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK4-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0			// CHECK4-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
	// CHECK4-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK4-NEXT: call void @_Z3fn3v()			// CHECK4-NEXT: call void @_Z3fn3v()
	// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK4: omp.body.continue:			// CHECK4: omp.body.continue:
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK4: omp.inner.for.inc:			// CHECK4: omp.inner.for.inc:
	// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK4-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]			// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
	// CHECK4: omp.inner.for.end:			// CHECK4: omp.inner.for.end:
	// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK4: omp.loop.exit:			// CHECK4: omp.loop.exit:
	// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK4-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK4: .omp.final.then:			// CHECK4: .omp.final.then:
	Show All 24 Lines
	// CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK5-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK5-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK5: omp.inner.for.cond:			// CHECK5: omp.inner.for.cond:
	// CHECK5-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK5-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !2			// CHECK5-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK5: omp.inner.for.body:			// CHECK5: omp.inner.for.body:
	// CHECK5-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK5-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2			// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK5: omp.body.continue:			// CHECK5: omp.body.continue:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK5: omp.inner.for.inc:			// CHECK5: omp.inner.for.inc:
	// CHECK5-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK5-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
	// CHECK5: omp.inner.for.end:			// CHECK5: omp.inner.for.end:
	// CHECK5-NEXT: store i32 100, i32* [[I]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK5-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK5-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK5: omp.inner.for.cond7:			// CHECK5: omp.inner.for.cond7:
	// CHECK5-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK5-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !6			// CHECK5-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK5: omp.inner.for.body9:			// CHECK5: omp.inner.for.body9:
	// CHECK5-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK5-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !6			// CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK5-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !6			// CHECK5-NEXT: call void @_Z9gtid_testv()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK5: omp.body.continue12:			// CHECK5: omp.body.continue12:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK5: omp.inner.for.inc13:			// CHECK5: omp.inner.for.inc13:
	// CHECK5-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK5-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK5: omp.inner.for.end15:			// CHECK5: omp.inner.for.end15:
	// CHECK5-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK5-NEXT: ret void			// CHECK5-NEXT: ret void
	//			//
	//			//
	// CHECK5-LABEL: define {{[^@]+}}@main			// CHECK5-LABEL: define {{[^@]+}}@main
	// CHECK5-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK5-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 17 Lines
	// CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK5-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK5-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK5: omp.inner.for.cond:			// CHECK5: omp.inner.for.cond:
	// CHECK5-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK5-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !9			// CHECK5-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK5: omp.inner.for.body:			// CHECK5: omp.inner.for.body:
	// CHECK5-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK5-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9			// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK5-NEXT: call void @_Z3fn4v(), !llvm.access.group !9			// CHECK5-NEXT: call void @_Z3fn4v()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK5: omp.body.continue:			// CHECK5: omp.body.continue:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK5: omp.inner.for.inc:			// CHECK5: omp.inner.for.inc:
	// CHECK5-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK5-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
	// CHECK5: omp.inner.for.end:			// CHECK5: omp.inner.for.end:
	// CHECK5-NEXT: store i32 100, i32* [[I]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK5-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK5-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK5: omp.inner.for.cond7:			// CHECK5: omp.inner.for.cond7:
	// CHECK5-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK5-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !12			// CHECK5-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK5: omp.inner.for.body9:			// CHECK5: omp.inner.for.body9:
	// CHECK5-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK5-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !12			// CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK5-NEXT: call void @_Z3fn5v(), !llvm.access.group !12			// CHECK5-NEXT: call void @_Z3fn5v()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK5: omp.body.continue12:			// CHECK5: omp.body.continue12:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK5: omp.inner.for.inc13:			// CHECK5: omp.inner.for.inc13:
	// CHECK5-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK5-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
	// CHECK5: omp.inner.for.end15:			// CHECK5: omp.inner.for.end15:
	// CHECK5-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK5-NEXT: [[TMP10:%.]] = load i32, i32 @Arg, align 4			// CHECK5-NEXT: [[TMP10:%.]] = load i32, i32 @Arg, align 4
	// CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0			// CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
	// CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8			// CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
	// CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1			// CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK5-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK5-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK5: omp.inner.for.cond21:			// CHECK5: omp.inner.for.cond21:
	// CHECK5-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK5-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !15			// CHECK5-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]			// CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
	// CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK5: omp.inner.for.body23:			// CHECK5: omp.inner.for.body23:
	// CHECK5-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK5-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1			// CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
	// CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !15			// CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK5-NEXT: call void @_Z3fn6v(), !llvm.access.group !15			// CHECK5-NEXT: call void @_Z3fn6v()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK5: omp.body.continue26:			// CHECK5: omp.body.continue26:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK5: omp.inner.for.inc27:			// CHECK5: omp.inner.for.inc27:
	// CHECK5-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK5-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1			// CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
	// CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK5: omp.inner.for.end29:			// CHECK5: omp.inner.for.end29:
	// CHECK5-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK5-NEXT: [[TMP16:%.]] = load i32, i32 @Arg, align 4			// CHECK5-NEXT: [[TMP16:%.]] = load i32, i32 @Arg, align 4
	// CHECK5-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP16]])			// CHECK5-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP16]])
	// CHECK5-NEXT: ret i32 [[CALL]]			// CHECK5-NEXT: ret i32 [[CALL]]
	//			//
	//			//
	Show All 19 Lines
	// CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK5-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK5-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK5-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK5-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK5: omp.inner.for.cond:			// CHECK5: omp.inner.for.cond:
	// CHECK5-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK5-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !18			// CHECK5-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK5: omp.inner.for.body:			// CHECK5: omp.inner.for.body:
	// CHECK5-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK5-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18			// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK5-NEXT: call void @_Z3fn1v(), !llvm.access.group !18			// CHECK5-NEXT: call void @_Z3fn1v()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK5: omp.body.continue:			// CHECK5: omp.body.continue:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK5: omp.inner.for.inc:			// CHECK5: omp.inner.for.inc:
	// CHECK5-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK5-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
	// CHECK5: omp.inner.for.end:			// CHECK5: omp.inner.for.end:
	// CHECK5-NEXT: store i32 100, i32* [[I]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK5-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK5-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK5: omp.inner.for.cond7:			// CHECK5: omp.inner.for.cond7:
	// CHECK5-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK5-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !21			// CHECK5-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK5: omp.inner.for.body9:			// CHECK5: omp.inner.for.body9:
	// CHECK5-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK5-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !21			// CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK5-NEXT: call void @_Z3fn2v(), !llvm.access.group !21			// CHECK5-NEXT: call void @_Z3fn2v()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK5: omp.body.continue12:			// CHECK5: omp.body.continue12:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK5: omp.inner.for.inc13:			// CHECK5: omp.inner.for.inc13:
	// CHECK5-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK5-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
	// CHECK5: omp.inner.for.end15:			// CHECK5: omp.inner.for.end15:
	// CHECK5-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK5-NEXT: [[TMP10:%.]] = load i32, i32 [[ARG_ADDR]], align 4			// CHECK5-NEXT: [[TMP10:%.]] = load i32, i32 [[ARG_ADDR]], align 4
	// CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0			// CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
	// CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8			// CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
	// CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1			// CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
	// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK5-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK5-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK5: omp.inner.for.cond21:			// CHECK5: omp.inner.for.cond21:
	// CHECK5-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK5-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !24			// CHECK5-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]			// CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
	// CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK5: omp.inner.for.body23:			// CHECK5: omp.inner.for.body23:
	// CHECK5-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK5-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1			// CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
	// CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !24			// CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK5-NEXT: call void @_Z3fn3v(), !llvm.access.group !24			// CHECK5-NEXT: call void @_Z3fn3v()
	// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK5: omp.body.continue26:			// CHECK5: omp.body.continue26:
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK5: omp.inner.for.inc27:			// CHECK5: omp.inner.for.inc27:
	// CHECK5-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK5-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1			// CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
	// CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
	// CHECK5: omp.inner.for.end29:			// CHECK5: omp.inner.for.end29:
	// CHECK5-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK5-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK5-NEXT: ret i32 0			// CHECK5-NEXT: ret i32 0
	//			//
	//			//
	// CHECK6-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK6-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK6-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
	Show All 9 Lines
	// CHECK6-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK6-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK6-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK6-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK6-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK6-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK6: omp.inner.for.cond:			// CHECK6: omp.inner.for.cond:
	// CHECK6-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK6-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !2			// CHECK6-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK6: omp.inner.for.body:			// CHECK6: omp.inner.for.body:
	// CHECK6-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK6-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2			// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK6: omp.body.continue:			// CHECK6: omp.body.continue:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK6: omp.inner.for.inc:			// CHECK6: omp.inner.for.inc:
	// CHECK6-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK6-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
	// CHECK6: omp.inner.for.end:			// CHECK6: omp.inner.for.end:
	// CHECK6-NEXT: store i32 100, i32* [[I]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK6-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK6-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK6: omp.inner.for.cond7:			// CHECK6: omp.inner.for.cond7:
	// CHECK6-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK6-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !6			// CHECK6-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK6: omp.inner.for.body9:			// CHECK6: omp.inner.for.body9:
	// CHECK6-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK6-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !6			// CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK6-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !6			// CHECK6-NEXT: call void @_Z9gtid_testv()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK6: omp.body.continue12:			// CHECK6: omp.body.continue12:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK6: omp.inner.for.inc13:			// CHECK6: omp.inner.for.inc13:
	// CHECK6-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK6-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK6: omp.inner.for.end15:			// CHECK6: omp.inner.for.end15:
	// CHECK6-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK6-NEXT: ret void			// CHECK6-NEXT: ret void
	//			//
	//			//
	// CHECK6-LABEL: define {{[^@]+}}@main			// CHECK6-LABEL: define {{[^@]+}}@main
	// CHECK6-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK6-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 17 Lines
	// CHECK6-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK6-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK6-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK6-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK6: omp.inner.for.cond:			// CHECK6: omp.inner.for.cond:
	// CHECK6-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK6-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !9			// CHECK6-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK6: omp.inner.for.body:			// CHECK6: omp.inner.for.body:
	// CHECK6-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK6-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9			// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK6-NEXT: call void @_Z3fn4v(), !llvm.access.group !9			// CHECK6-NEXT: call void @_Z3fn4v()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK6: omp.body.continue:			// CHECK6: omp.body.continue:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK6: omp.inner.for.inc:			// CHECK6: omp.inner.for.inc:
	// CHECK6-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK6-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
	// CHECK6: omp.inner.for.end:			// CHECK6: omp.inner.for.end:
	// CHECK6-NEXT: store i32 100, i32* [[I]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK6-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK6-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK6: omp.inner.for.cond7:			// CHECK6: omp.inner.for.cond7:
	// CHECK6-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK6-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !12			// CHECK6-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK6: omp.inner.for.body9:			// CHECK6: omp.inner.for.body9:
	// CHECK6-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK6-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !12			// CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK6-NEXT: call void @_Z3fn5v(), !llvm.access.group !12			// CHECK6-NEXT: call void @_Z3fn5v()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK6: omp.body.continue12:			// CHECK6: omp.body.continue12:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK6: omp.inner.for.inc13:			// CHECK6: omp.inner.for.inc13:
	// CHECK6-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK6-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12			// CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
	// CHECK6: omp.inner.for.end15:			// CHECK6: omp.inner.for.end15:
	// CHECK6-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK6-NEXT: [[TMP10:%.]] = load i32, i32 @Arg, align 4			// CHECK6-NEXT: [[TMP10:%.]] = load i32, i32 @Arg, align 4
	// CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0			// CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
	// CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8			// CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
	// CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1			// CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK6-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK6-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK6-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK6-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK6: omp.inner.for.cond21:			// CHECK6: omp.inner.for.cond21:
	// CHECK6-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK6-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !15			// CHECK6-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK6-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]			// CHECK6-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
	// CHECK6-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK6-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK6: omp.inner.for.body23:			// CHECK6: omp.inner.for.body23:
	// CHECK6-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK6-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1			// CHECK6-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
	// CHECK6-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK6-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK6-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !15			// CHECK6-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK6-NEXT: call void @_Z3fn6v(), !llvm.access.group !15			// CHECK6-NEXT: call void @_Z3fn6v()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK6: omp.body.continue26:			// CHECK6: omp.body.continue26:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK6: omp.inner.for.inc27:			// CHECK6: omp.inner.for.inc27:
	// CHECK6-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK6-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1			// CHECK6-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
	// CHECK6-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15			// CHECK6-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK6: omp.inner.for.end29:			// CHECK6: omp.inner.for.end29:
	// CHECK6-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK6-NEXT: [[TMP16:%.]] = load i32, i32 @Arg, align 4			// CHECK6-NEXT: [[TMP16:%.]] = load i32, i32 @Arg, align 4
	// CHECK6-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP16]])			// CHECK6-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP16]])
	// CHECK6-NEXT: ret i32 [[CALL]]			// CHECK6-NEXT: ret i32 [[CALL]]
	//			//
	//			//
	Show All 19 Lines
	// CHECK6-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK6-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK6-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK6-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK6-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK6-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK6: omp.inner.for.cond:			// CHECK6: omp.inner.for.cond:
	// CHECK6-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK6-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !18			// CHECK6-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK6: omp.inner.for.body:			// CHECK6: omp.inner.for.body:
	// CHECK6-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK6-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18			// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK6-NEXT: call void @_Z3fn1v(), !llvm.access.group !18			// CHECK6-NEXT: call void @_Z3fn1v()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK6: omp.body.continue:			// CHECK6: omp.body.continue:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK6: omp.inner.for.inc:			// CHECK6: omp.inner.for.inc:
	// CHECK6-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK6-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
	// CHECK6: omp.inner.for.end:			// CHECK6: omp.inner.for.end:
	// CHECK6-NEXT: store i32 100, i32* [[I]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK6-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK6-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK6: omp.inner.for.cond7:			// CHECK6: omp.inner.for.cond7:
	// CHECK6-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK6-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !21			// CHECK6-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK6: omp.inner.for.body9:			// CHECK6: omp.inner.for.body9:
	// CHECK6-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK6-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !21			// CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK6-NEXT: call void @_Z3fn2v(), !llvm.access.group !21			// CHECK6-NEXT: call void @_Z3fn2v()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK6: omp.body.continue12:			// CHECK6: omp.body.continue12:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK6: omp.inner.for.inc13:			// CHECK6: omp.inner.for.inc13:
	// CHECK6-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK6-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21			// CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
	// CHECK6: omp.inner.for.end15:			// CHECK6: omp.inner.for.end15:
	// CHECK6-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK6-NEXT: [[TMP10:%.]] = load i32, i32 [[ARG_ADDR]], align 4			// CHECK6-NEXT: [[TMP10:%.]] = load i32, i32 [[ARG_ADDR]], align 4
	// CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0			// CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
	// CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8			// CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
	// CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1			// CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
	// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK6-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK6-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK6-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK6-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK6: omp.inner.for.cond21:			// CHECK6: omp.inner.for.cond21:
	// CHECK6-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK6-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !24			// CHECK6-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK6-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]			// CHECK6-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
	// CHECK6-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK6-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK6: omp.inner.for.body23:			// CHECK6: omp.inner.for.body23:
	// CHECK6-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK6-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1			// CHECK6-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
	// CHECK6-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK6-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK6-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !24			// CHECK6-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK6-NEXT: call void @_Z3fn3v(), !llvm.access.group !24			// CHECK6-NEXT: call void @_Z3fn3v()
	// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK6: omp.body.continue26:			// CHECK6: omp.body.continue26:
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK6: omp.inner.for.inc27:			// CHECK6: omp.inner.for.inc27:
	// CHECK6-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK6-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1			// CHECK6-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
	// CHECK6-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !24			// CHECK6-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
	// CHECK6: omp.inner.for.end29:			// CHECK6: omp.inner.for.end29:
	// CHECK6-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK6-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK6-NEXT: ret i32 0			// CHECK6-NEXT: ret i32 0
	//			//
	//			//
	// CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
	Show All 9 Lines
	// CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK7-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK7-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK7: omp.inner.for.cond:			// CHECK7: omp.inner.for.cond:
	// CHECK7-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK7-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !2			// CHECK7-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK7: omp.inner.for.body:			// CHECK7: omp.inner.for.body:
	// CHECK7-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK7-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2			// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK7: omp.body.continue:			// CHECK7: omp.body.continue:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK7: omp.inner.for.inc:			// CHECK7: omp.inner.for.inc:
	// CHECK7-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK7-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
	// CHECK7: omp.inner.for.end:			// CHECK7: omp.inner.for.end:
	// CHECK7-NEXT: store i32 100, i32* [[I]], align 4			// CHECK7-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK7-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK7-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK7: omp.inner.for.cond7:			// CHECK7: omp.inner.for.cond7:
	// CHECK7-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK7-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !6			// CHECK7-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK7: omp.inner.for.body9:			// CHECK7: omp.inner.for.body9:
	// CHECK7-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK7-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !6			// CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK7-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !6			// CHECK7-NEXT: call void @_Z9gtid_testv()
	// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK7: omp.body.continue12:			// CHECK7: omp.body.continue12:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK7: omp.inner.for.inc13:			// CHECK7: omp.inner.for.inc13:
	// CHECK7-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK7-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK7: omp.inner.for.end15:			// CHECK7: omp.inner.for.end15:
	// CHECK7-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK7-NEXT: ret void			// CHECK7-NEXT: ret void
	//			//
	//			//
	// CHECK7-LABEL: define {{[^@]+}}@main			// CHECK7-LABEL: define {{[^@]+}}@main
	// CHECK7-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK7-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 17 Lines
	// CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK7-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK7-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK7: omp.inner.for.cond:			// CHECK7: omp.inner.for.cond:
	// CHECK7-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK7-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !9			// CHECK7-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK7: omp.inner.for.body:			// CHECK7: omp.inner.for.body:
	// CHECK7-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK7-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9			// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK7-NEXT: call void @_Z3fn4v(), !llvm.access.group !9			// CHECK7-NEXT: call void @_Z3fn4v()
	// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK7: omp.body.continue:			// CHECK7: omp.body.continue:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK7: omp.inner.for.inc:			// CHECK7: omp.inner.for.inc:
	// CHECK7-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK7-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
	// CHECK7: omp.inner.for.end:			// CHECK7: omp.inner.for.end:
	// CHECK7-NEXT: store i32 100, i32* [[I]], align 4			// CHECK7-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK7-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK7-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 27 Lines
	// CHECK7-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK7-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1			// CHECK7-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1
	// CHECK7-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1			// CHECK7-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
	// CHECK7-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]			// CHECK7-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]
	// CHECK7: omp_if.then:			// CHECK7: omp_if.then:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
	// CHECK7: omp.inner.for.cond22:			// CHECK7: omp.inner.for.cond22:
	// CHECK7-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK7-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !14			// CHECK7-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK7-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]			// CHECK7-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
	// CHECK7-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]			// CHECK7-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]
	// CHECK7: omp.inner.for.body24:			// CHECK7: omp.inner.for.body24:
	// CHECK7-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK7-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1			// CHECK7-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
	// CHECK7-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]			// CHECK7-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
	// CHECK7-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group !14			// CHECK7-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4
	// CHECK7-NEXT: call void @_Z3fn6v(), !llvm.access.group !14			// CHECK7-NEXT: call void @_Z3fn6v()
	// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]			// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
	// CHECK7: omp.body.continue27:			// CHECK7: omp.body.continue27:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
	// CHECK7: omp.inner.for.inc28:			// CHECK7: omp.inner.for.inc28:
	// CHECK7-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK7-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1			// CHECK7-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
	// CHECK7-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK7-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP15:![0-9]+]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP15:![0-9]+]]
	// CHECK7: omp.inner.for.end30:			// CHECK7: omp.inner.for.end30:
	// CHECK7-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK7-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK7: omp_if.else:			// CHECK7: omp_if.else:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
	// CHECK7: omp.inner.for.cond31:			// CHECK7: omp.inner.for.cond31:
	// CHECK7-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4			// CHECK7-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4			// CHECK7-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
	// CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK7-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK7-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK7-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK7-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK7: omp.inner.for.cond:			// CHECK7: omp.inner.for.cond:
	// CHECK7-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK7-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !18			// CHECK7-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK7: omp.inner.for.body:			// CHECK7: omp.inner.for.body:
	// CHECK7-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK7-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18			// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK7-NEXT: call void @_Z3fn1v(), !llvm.access.group !18			// CHECK7-NEXT: call void @_Z3fn1v()
	// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK7: omp.body.continue:			// CHECK7: omp.body.continue:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK7: omp.inner.for.inc:			// CHECK7: omp.inner.for.inc:
	// CHECK7-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK7-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
	// CHECK7: omp.inner.for.end:			// CHECK7: omp.inner.for.end:
	// CHECK7-NEXT: store i32 100, i32* [[I]], align 4			// CHECK7-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK7-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK7-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 23 Lines
	// CHECK7-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8			// CHECK7-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
	// CHECK7-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1			// CHECK7-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
	// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK7-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK7-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK7: omp.inner.for.cond21:			// CHECK7: omp.inner.for.cond21:
	// CHECK7-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK7-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !22			// CHECK7-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK7-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]			// CHECK7-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
	// CHECK7-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK7-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK7: omp.inner.for.body23:			// CHECK7: omp.inner.for.body23:
	// CHECK7-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK7-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1			// CHECK7-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
	// CHECK7-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK7-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK7-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !22			// CHECK7-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK7-NEXT: call void @_Z3fn3v(), !llvm.access.group !22			// CHECK7-NEXT: call void @_Z3fn3v()
	// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK7: omp.body.continue26:			// CHECK7: omp.body.continue26:
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK7: omp.inner.for.inc27:			// CHECK7: omp.inner.for.inc27:
	// CHECK7-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK7-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1			// CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
	// CHECK7-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK7-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]
	// CHECK7: omp.inner.for.end29:			// CHECK7: omp.inner.for.end29:
	// CHECK7-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK7-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK7-NEXT: ret i32 0			// CHECK7-NEXT: ret i32 0
	//			//
	//			//
	// CHECK8-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK8-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK8-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
	Show All 9 Lines
	// CHECK8-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK8-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK8-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK8-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK8-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK8-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK8: omp.inner.for.cond:			// CHECK8: omp.inner.for.cond:
	// CHECK8-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK8-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !2			// CHECK8-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK8: omp.inner.for.body:			// CHECK8: omp.inner.for.body:
	// CHECK8-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK8-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2			// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK8: omp.body.continue:			// CHECK8: omp.body.continue:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK8: omp.inner.for.inc:			// CHECK8: omp.inner.for.inc:
	// CHECK8-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK8-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2			// CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
	// CHECK8: omp.inner.for.end:			// CHECK8: omp.inner.for.end:
	// CHECK8-NEXT: store i32 100, i32* [[I]], align 4			// CHECK8-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK8-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK8-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK8: omp.inner.for.cond7:			// CHECK8: omp.inner.for.cond7:
	// CHECK8-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK8-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !6			// CHECK8-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK8-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK8-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK8-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK8-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK8: omp.inner.for.body9:			// CHECK8: omp.inner.for.body9:
	// CHECK8-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK8-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK8-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK8-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK8-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK8-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !6			// CHECK8-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK8-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !6			// CHECK8-NEXT: call void @_Z9gtid_testv()
	// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK8: omp.body.continue12:			// CHECK8: omp.body.continue12:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK8: omp.inner.for.inc13:			// CHECK8: omp.inner.for.inc13:
	// CHECK8-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK8-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK8-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK8-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6			// CHECK8-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK8: omp.inner.for.end15:			// CHECK8: omp.inner.for.end15:
	// CHECK8-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK8-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK8-NEXT: ret void			// CHECK8-NEXT: ret void
	//			//
	//			//
	// CHECK8-LABEL: define {{[^@]+}}@main			// CHECK8-LABEL: define {{[^@]+}}@main
	// CHECK8-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK8-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 17 Lines
	// CHECK8-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK8-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK8-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK8-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK8: omp.inner.for.cond:			// CHECK8: omp.inner.for.cond:
	// CHECK8-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK8-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !9			// CHECK8-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK8: omp.inner.for.body:			// CHECK8: omp.inner.for.body:
	// CHECK8-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK8-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9			// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK8-NEXT: call void @_Z3fn4v(), !llvm.access.group !9			// CHECK8-NEXT: call void @_Z3fn4v()
	// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK8: omp.body.continue:			// CHECK8: omp.body.continue:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK8: omp.inner.for.inc:			// CHECK8: omp.inner.for.inc:
	// CHECK8-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK8-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9			// CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
	// CHECK8: omp.inner.for.end:			// CHECK8: omp.inner.for.end:
	// CHECK8-NEXT: store i32 100, i32* [[I]], align 4			// CHECK8-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK8-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK8-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 27 Lines
	// CHECK8-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK8-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK8-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK8-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1			// CHECK8-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1
	// CHECK8-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1			// CHECK8-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
	// CHECK8-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]			// CHECK8-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]
	// CHECK8: omp_if.then:			// CHECK8: omp_if.then:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
	// CHECK8: omp.inner.for.cond22:			// CHECK8: omp.inner.for.cond22:
	// CHECK8-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK8-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !14			// CHECK8-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK8-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]			// CHECK8-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
	// CHECK8-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]			// CHECK8-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]
	// CHECK8: omp.inner.for.body24:			// CHECK8: omp.inner.for.body24:
	// CHECK8-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK8-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1			// CHECK8-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
	// CHECK8-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]			// CHECK8-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
	// CHECK8-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group !14			// CHECK8-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4
	// CHECK8-NEXT: call void @_Z3fn6v(), !llvm.access.group !14			// CHECK8-NEXT: call void @_Z3fn6v()
	// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]			// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
	// CHECK8: omp.body.continue27:			// CHECK8: omp.body.continue27:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
	// CHECK8: omp.inner.for.inc28:			// CHECK8: omp.inner.for.inc28:
	// CHECK8-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK8-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1			// CHECK8-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
	// CHECK8-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !14			// CHECK8-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP15:![0-9]+]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP15:![0-9]+]]
	// CHECK8: omp.inner.for.end30:			// CHECK8: omp.inner.for.end30:
	// CHECK8-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK8-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK8: omp_if.else:			// CHECK8: omp_if.else:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
	// CHECK8: omp.inner.for.cond31:			// CHECK8: omp.inner.for.cond31:
	// CHECK8-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4			// CHECK8-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4			// CHECK8-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
	// CHECK8-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK8-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK8-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK8-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK8-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK8-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK8: omp.inner.for.cond:			// CHECK8: omp.inner.for.cond:
	// CHECK8-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK8-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !18			// CHECK8-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK8: omp.inner.for.body:			// CHECK8: omp.inner.for.body:
	// CHECK8-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK8-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18			// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK8-NEXT: call void @_Z3fn1v(), !llvm.access.group !18			// CHECK8-NEXT: call void @_Z3fn1v()
	// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK8: omp.body.continue:			// CHECK8: omp.body.continue:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK8: omp.inner.for.inc:			// CHECK8: omp.inner.for.inc:
	// CHECK8-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK8-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18			// CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
	// CHECK8: omp.inner.for.end:			// CHECK8: omp.inner.for.end:
	// CHECK8-NEXT: store i32 100, i32* [[I]], align 4			// CHECK8-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK8-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK8-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 23 Lines
	// CHECK8-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8			// CHECK8-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
	// CHECK8-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1			// CHECK8-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
	// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK8-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK8-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK8-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK8-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK8: omp.inner.for.cond21:			// CHECK8: omp.inner.for.cond21:
	// CHECK8-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK8-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !22			// CHECK8-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK8-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]			// CHECK8-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
	// CHECK8-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK8-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK8: omp.inner.for.body23:			// CHECK8: omp.inner.for.body23:
	// CHECK8-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK8-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1			// CHECK8-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
	// CHECK8-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK8-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK8-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !22			// CHECK8-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK8-NEXT: call void @_Z3fn3v(), !llvm.access.group !22			// CHECK8-NEXT: call void @_Z3fn3v()
	// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK8: omp.body.continue26:			// CHECK8: omp.body.continue26:
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK8: omp.inner.for.inc27:			// CHECK8: omp.inner.for.inc27:
	// CHECK8-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK8-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1			// CHECK8-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
	// CHECK8-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !22			// CHECK8-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]
	// CHECK8: omp.inner.for.end29:			// CHECK8: omp.inner.for.end29:
	// CHECK8-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK8-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK8-NEXT: ret i32 0			// CHECK8-NEXT: ret i32 0
	//			//
	//			//
	// CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
	▲ Show 20 Lines • Show All 73 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK9-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK9-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
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	// CHECK9-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK9-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @_Z9gtid_testv()			// CHECK9-NEXT: call void @_Z9gtid_testv()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
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	// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK9-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK9-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @_Z3fn4v()			// CHECK9-NEXT: call void @_Z3fn4v()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK9-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @_Z3fn5v()			// CHECK9-NEXT: call void @_Z3fn5v()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: br label [[OMP_IF_END]]			// CHECK9-NEXT: br label [[OMP_IF_END]]
	// CHECK9: omp_if.end:			// CHECK9: omp_if.end:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0			// CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
	// CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @_Z3fn6v()			// CHECK9-NEXT: call void @_Z3fn6v()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 118 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK9-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK9-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP49:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @_Z3fn1v()			// CHECK9-NEXT: call void @_Z3fn1v()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK9-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @_Z3fn2v()			// CHECK9-NEXT: call void @_Z3fn2v()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: br label [[OMP_IF_END]]			// CHECK9-NEXT: br label [[OMP_IF_END]]
	// CHECK9: omp_if.end:			// CHECK9: omp_if.end:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK9-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]			// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
	// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP61:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK9-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0			// CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
	// CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK9-NEXT: call void @_Z3fn3v()			// CHECK9-NEXT: call void @_Z3fn3v()
	// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK9: omp.body.continue:			// CHECK9: omp.body.continue:
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK9: omp.inner.for.inc:			// CHECK9: omp.inner.for.inc:
	// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK9-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]			// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP64:![0-9]+]]
	// CHECK9: omp.inner.for.end:			// CHECK9: omp.inner.for.end:
	// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK9: omp.loop.exit:			// CHECK9: omp.loop.exit:
	// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK9-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK9: .omp.final.then:			// CHECK9: .omp.final.then:
	▲ Show 20 Lines • Show All 88 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK10-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK10-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK10-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: call void @_Z9gtid_testv()			// CHECK10-NEXT: call void @_Z9gtid_testv()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK10-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK10-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: call void @_Z3fn4v()			// CHECK10-NEXT: call void @_Z3fn4v()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK10-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: call void @_Z3fn5v()			// CHECK10-NEXT: call void @_Z3fn5v()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: br label [[OMP_IF_END]]			// CHECK10-NEXT: br label [[OMP_IF_END]]
	// CHECK10: omp_if.end:			// CHECK10: omp_if.end:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0			// CHECK10-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
	// CHECK10-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: call void @_Z3fn6v()			// CHECK10-NEXT: call void @_Z3fn6v()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK10-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK10-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..11 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP49:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: call void @_Z3fn1v()			// CHECK10-NEXT: call void @_Z3fn1v()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
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	// CHECK10-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK10-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: call void @_Z3fn2v()			// CHECK10-NEXT: call void @_Z3fn2v()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: br label [[OMP_IF_END]]			// CHECK10-NEXT: br label [[OMP_IF_END]]
	// CHECK10: omp_if.end:			// CHECK10: omp_if.end:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK10-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]			// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
	// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP61:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK10-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0			// CHECK10-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
	// CHECK10-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK10-NEXT: call void @_Z3fn3v()			// CHECK10-NEXT: call void @_Z3fn3v()
	// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK10: omp.body.continue:			// CHECK10: omp.body.continue:
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK10: omp.inner.for.inc:			// CHECK10: omp.inner.for.inc:
	// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK10-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]			// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP64:![0-9]+]]
	// CHECK10: omp.inner.for.end:			// CHECK10: omp.inner.for.end:
	// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK10: omp.loop.exit:			// CHECK10: omp.loop.exit:
	// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK10-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK10: .omp.final.then:			// CHECK10: .omp.final.then:
	▲ Show 20 Lines • Show All 88 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK11-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK11-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
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	// CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
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	// CHECK11-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK11-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
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	// CHECK11-NEXT: call void @_Z9gtid_testv()			// CHECK11-NEXT: call void @_Z9gtid_testv()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 120 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK11-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK11-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @_Z3fn4v()			// CHECK11-NEXT: call void @_Z3fn4v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK11-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @_Z3fn5v()			// CHECK11-NEXT: call void @_Z3fn5v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 103 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: br label [[OMP_IF_END]]			// CHECK11-NEXT: br label [[OMP_IF_END]]
	// CHECK11: omp_if.end:			// CHECK11: omp_if.end:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_IF_END22:%.*]]			// CHECK11-NEXT: br label [[OMP_IF_END22:%.*]]
	// CHECK11: omp_if.else6:			// CHECK11: omp_if.else6:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK11: omp.inner.for.cond7:			// CHECK11: omp.inner.for.cond7:
	// CHECK11-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4			// CHECK11-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4
	// CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]			// CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
	Show All 23 Lines
	// CHECK11-NEXT: br label [[OMP_IF_END18]]			// CHECK11-NEXT: br label [[OMP_IF_END18]]
	// CHECK11: omp_if.end18:			// CHECK11: omp_if.end18:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
	// CHECK11: omp.inner.for.inc19:			// CHECK11: omp.inner.for.inc19:
	// CHECK11-NEXT: [[TMP28:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP28:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP29:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP29:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]			// CHECK11-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
	// CHECK11-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP42:![0-9]+]]
	// CHECK11: omp.inner.for.end21:			// CHECK11: omp.inner.for.end21:
	// CHECK11-NEXT: br label [[OMP_IF_END22]]			// CHECK11-NEXT: br label [[OMP_IF_END22]]
	// CHECK11: omp_if.end22:			// CHECK11: omp_if.end22:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0			// CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
	▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @_Z3fn6v()			// CHECK11-NEXT: call void @_Z3fn6v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK11: omp_if.else:			// CHECK11: omp_if.else:
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK11-NEXT: call void @_Z3fn6v()			// CHECK11-NEXT: call void @_Z3fn6v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK11: omp.body.continue15:			// CHECK11: omp.body.continue15:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK11: omp.inner.for.inc16:			// CHECK11: omp.inner.for.inc16:
	// CHECK11-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP46:![0-9]+]]
	// CHECK11: omp.inner.for.end18:			// CHECK11: omp.inner.for.end18:
	// CHECK11-NEXT: br label [[OMP_IF_END]]			// CHECK11-NEXT: br label [[OMP_IF_END]]
	// CHECK11: omp_if.end:			// CHECK11: omp_if.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK11-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK11-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK11-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @_Z3fn6v()			// CHECK11-NEXT: call void @_Z3fn6v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK11: omp_if.else:			// CHECK11: omp_if.else:
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK11-NEXT: call void @_Z3fn6v()			// CHECK11-NEXT: call void @_Z3fn6v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK11: omp.body.continue15:			// CHECK11: omp.body.continue15:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK11: omp.inner.for.inc16:			// CHECK11: omp.inner.for.inc16:
	// CHECK11-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP31:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP50:![0-9]+]]
	// CHECK11: omp.inner.for.end18:			// CHECK11: omp.inner.for.end18:
	// CHECK11-NEXT: br label [[OMP_IF_END]]			// CHECK11-NEXT: br label [[OMP_IF_END]]
	// CHECK11: omp_if.end:			// CHECK11: omp_if.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK11-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK11-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK11-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 122 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK11-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK11-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @_Z3fn1v()			// CHECK11-NEXT: call void @_Z3fn1v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK11-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK11-NEXT: call void @_Z3fn2v()			// CHECK11-NEXT: call void @_Z3fn2v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
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	// CHECK11-NEXT: br label [[OMP_IF_END]]			// CHECK11-NEXT: br label [[OMP_IF_END]]
	// CHECK11: omp_if.end:			// CHECK11: omp_if.end:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK11-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]			// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
	// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK11-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0			// CHECK11-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
	// CHECK11-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
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	// CHECK11-NEXT: call void @_Z3fn3v()			// CHECK11-NEXT: call void @_Z3fn3v()
	// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK11: omp.body.continue:			// CHECK11: omp.body.continue:
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK11: omp.inner.for.inc:			// CHECK11: omp.inner.for.inc:
	// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK11-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]			// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP63:![0-9]+]]
	// CHECK11: omp.inner.for.end:			// CHECK11: omp.inner.for.end:
	// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK11: omp.loop.exit:			// CHECK11: omp.loop.exit:
	// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK11-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK11: .omp.final.then:			// CHECK11: .omp.final.then:
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	// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK12-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK12-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..1 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
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	// CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
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	// CHECK12-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK12-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @_Z9gtid_testv()			// CHECK12-NEXT: call void @_Z9gtid_testv()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 120 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK12-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK12-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..5 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @_Z3fn4v()			// CHECK12-NEXT: call void @_Z3fn4v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK12-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @_Z3fn5v()			// CHECK12-NEXT: call void @_Z3fn5v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 103 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: br label [[OMP_IF_END]]			// CHECK12-NEXT: br label [[OMP_IF_END]]
	// CHECK12: omp_if.end:			// CHECK12: omp_if.end:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_IF_END22:%.*]]			// CHECK12-NEXT: br label [[OMP_IF_END22:%.*]]
	// CHECK12: omp_if.else6:			// CHECK12: omp_if.else6:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK12: omp.inner.for.cond7:			// CHECK12: omp.inner.for.cond7:
	// CHECK12-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4			// CHECK12-NEXT: [[TMP19:%.]] = load i32, i32 [[DOTOMP_COMB_UB]], align 4
	// CHECK12-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]			// CHECK12-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
	Show All 23 Lines
	// CHECK12-NEXT: br label [[OMP_IF_END18]]			// CHECK12-NEXT: br label [[OMP_IF_END18]]
	// CHECK12: omp_if.end18:			// CHECK12: omp_if.end18:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
	// CHECK12: omp.inner.for.inc19:			// CHECK12: omp.inner.for.inc19:
	// CHECK12-NEXT: [[TMP28:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP28:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP29:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP29:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]			// CHECK12-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
	// CHECK12-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP42:![0-9]+]]
	// CHECK12: omp.inner.for.end21:			// CHECK12: omp.inner.for.end21:
	// CHECK12-NEXT: br label [[OMP_IF_END22]]			// CHECK12-NEXT: br label [[OMP_IF_END22]]
	// CHECK12: omp_if.end22:			// CHECK12: omp_if.end22:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP30:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0			// CHECK12-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
	▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @_Z3fn6v()			// CHECK12-NEXT: call void @_Z3fn6v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK12-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK12: omp_if.else:			// CHECK12: omp_if.else:
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK12-NEXT: call void @_Z3fn6v()			// CHECK12-NEXT: call void @_Z3fn6v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK12: omp.body.continue15:			// CHECK12: omp.body.continue15:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK12: omp.inner.for.inc16:			// CHECK12: omp.inner.for.inc16:
	// CHECK12-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP46:![0-9]+]]
	// CHECK12: omp.inner.for.end18:			// CHECK12: omp.inner.for.end18:
	// CHECK12-NEXT: br label [[OMP_IF_END]]			// CHECK12-NEXT: br label [[OMP_IF_END]]
	// CHECK12: omp_if.end:			// CHECK12: omp_if.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK12-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK12-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK12-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @_Z3fn6v()			// CHECK12-NEXT: call void @_Z3fn6v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1			// CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
	// CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK12-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK12: omp_if.else:			// CHECK12: omp_if.else:
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[TMP12]], align 4
	// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)			// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
	// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4			// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99			// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
	Show All 22 Lines
	// CHECK12-NEXT: call void @_Z3fn6v()			// CHECK12-NEXT: call void @_Z3fn6v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
	// CHECK12: omp.body.continue15:			// CHECK12: omp.body.continue15:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
	// CHECK12: omp.inner.for.inc16:			// CHECK12: omp.inner.for.inc16:
	// CHECK12-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP20:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1			// CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
	// CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP31:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP50:![0-9]+]]
	// CHECK12: omp.inner.for.end18:			// CHECK12: omp.inner.for.end18:
	// CHECK12-NEXT: br label [[OMP_IF_END]]			// CHECK12-NEXT: br label [[OMP_IF_END]]
	// CHECK12: omp_if.end:			// CHECK12: omp_if.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8			// CHECK12-NEXT: [[TMP21:%.]] = load i32, i32** [[DOTGLOBAL_TID__ADDR]], align 8
	// CHECK12-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4			// CHECK12-NEXT: [[TMP22:%.]] = load i32, i32 [[TMP21]], align 4
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
	▲ Show 20 Lines • Show All 122 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64			// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
	// CHECK12-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])			// CHECK12-NEXT: call void (%struct.ident_t, i32, void (i32, i32, ...), ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32, i32, ...)* bitcast (void (i32, i32, i64, i64)* @.omp_outlined..12 to void (i32, i32, ...)*), i64 [[TMP8]], i64 [[TMP10]])
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0			// CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
	// CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
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	// CHECK12-NEXT: call void @_Z3fn1v()			// CHECK12-NEXT: call void @_Z3fn1v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
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	// CHECK12-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]			// CHECK12-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
	// CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0			// CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
	// CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
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	// CHECK12-NEXT: call void @_Z3fn2v()			// CHECK12-NEXT: call void @_Z3fn2v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
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	// CHECK12-NEXT: br label [[OMP_IF_END]]			// CHECK12-NEXT: br label [[OMP_IF_END]]
	// CHECK12: omp_if.end:			// CHECK12: omp_if.end:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4			// CHECK12-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_STRIDE]], align 4
	// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]			// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
	// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
	// CHECK12-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0			// CHECK12-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
	// CHECK12-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
	// CHECK12-NEXT: call void @_Z3fn3v()			// CHECK12-NEXT: call void @_Z3fn3v()
	// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK12: omp.body.continue:			// CHECK12: omp.body.continue:
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK12: omp.inner.for.inc:			// CHECK12: omp.inner.for.inc:
	// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4			// CHECK12-NEXT: [[TMP10:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1			// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
	// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4			// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
	// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]			// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP63:![0-9]+]]
	// CHECK12: omp.inner.for.end:			// CHECK12: omp.inner.for.end:
	// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]			// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
	// CHECK12: omp.loop.exit:			// CHECK12: omp.loop.exit:
	// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])			// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
	// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4			// CHECK12-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_IS_LAST]], align 4
	// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0			// CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
	// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]			// CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.]], label [[DOTOMP_FINAL_DONE:%.]]
	// CHECK12: .omp.final.then:			// CHECK12: .omp.final.then:
	Show All 24 Lines
	// CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK13-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK13-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK13: omp.inner.for.cond:			// CHECK13: omp.inner.for.cond:
	// CHECK13-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK13-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !6			// CHECK13-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK13: omp.inner.for.body:			// CHECK13: omp.inner.for.body:
	// CHECK13-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK13-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6			// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK13: omp.body.continue:			// CHECK13: omp.body.continue:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK13: omp.inner.for.inc:			// CHECK13: omp.inner.for.inc:
	// CHECK13-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK13-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK13: omp.inner.for.end:			// CHECK13: omp.inner.for.end:
	// CHECK13-NEXT: store i32 100, i32* [[I]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK13-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK13-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK13: omp.inner.for.cond7:			// CHECK13: omp.inner.for.cond7:
	// CHECK13-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK13-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !10			// CHECK13-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK13: omp.inner.for.body9:			// CHECK13: omp.inner.for.body9:
	// CHECK13-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK13-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !10			// CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK13-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !10			// CHECK13-NEXT: call void @_Z9gtid_testv()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK13: omp.body.continue12:			// CHECK13: omp.body.continue12:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK13: omp.inner.for.inc13:			// CHECK13: omp.inner.for.inc13:
	// CHECK13-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK13-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]
	// CHECK13: omp.inner.for.end15:			// CHECK13: omp.inner.for.end15:
	// CHECK13-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK13-NEXT: ret void			// CHECK13-NEXT: ret void
	//			//
	//			//
	// CHECK13-LABEL: define {{[^@]+}}@main			// CHECK13-LABEL: define {{[^@]+}}@main
	// CHECK13-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK13-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 17 Lines
	// CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK13-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK13-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK13: omp.inner.for.cond:			// CHECK13: omp.inner.for.cond:
	// CHECK13-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK13-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !13			// CHECK13-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK13: omp.inner.for.body:			// CHECK13: omp.inner.for.body:
	// CHECK13-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK13-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13			// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK13-NEXT: call void @_Z3fn4v(), !llvm.access.group !13			// CHECK13-NEXT: call void @_Z3fn4v()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK13: omp.body.continue:			// CHECK13: omp.body.continue:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK13: omp.inner.for.inc:			// CHECK13: omp.inner.for.inc:
	// CHECK13-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK13-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
	// CHECK13: omp.inner.for.end:			// CHECK13: omp.inner.for.end:
	// CHECK13-NEXT: store i32 100, i32* [[I]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK13-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK13-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK13: omp.inner.for.cond7:			// CHECK13: omp.inner.for.cond7:
	// CHECK13-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK13-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !16			// CHECK13-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK13: omp.inner.for.body9:			// CHECK13: omp.inner.for.body9:
	// CHECK13-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK13-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16			// CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK13-NEXT: call void @_Z3fn5v(), !llvm.access.group !16			// CHECK13-NEXT: call void @_Z3fn5v()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK13: omp.body.continue12:			// CHECK13: omp.body.continue12:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK13: omp.inner.for.inc13:			// CHECK13: omp.inner.for.inc13:
	// CHECK13-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK13-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
	// CHECK13: omp.inner.for.end15:			// CHECK13: omp.inner.for.end15:
	// CHECK13-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK13-NEXT: [[TMP10:%.]] = load i32, i32 @Arg, align 4			// CHECK13-NEXT: [[TMP10:%.]] = load i32, i32 @Arg, align 4
	// CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0			// CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
	// CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8			// CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
	// CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1			// CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK13-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK13-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK13-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK13-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK13: omp.inner.for.cond21:			// CHECK13: omp.inner.for.cond21:
	// CHECK13-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK13-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !19			// CHECK13-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]			// CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
	// CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK13: omp.inner.for.body23:			// CHECK13: omp.inner.for.body23:
	// CHECK13-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK13-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1			// CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
	// CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !19			// CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK13-NEXT: call void @_Z3fn6v(), !llvm.access.group !19			// CHECK13-NEXT: call void @_Z3fn6v()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK13: omp.body.continue26:			// CHECK13: omp.body.continue26:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK13: omp.inner.for.inc27:			// CHECK13: omp.inner.for.inc27:
	// CHECK13-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK13-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1			// CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
	// CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP20:![0-9]+]]
	// CHECK13: omp.inner.for.end29:			// CHECK13: omp.inner.for.end29:
	// CHECK13-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK13-NEXT: [[TMP16:%.]] = load i32, i32 @Arg, align 4			// CHECK13-NEXT: [[TMP16:%.]] = load i32, i32 @Arg, align 4
	// CHECK13-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP16]])			// CHECK13-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP16]])
	// CHECK13-NEXT: ret i32 [[CALL]]			// CHECK13-NEXT: ret i32 [[CALL]]
	//			//
	//			//
	Show All 19 Lines
	// CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK13-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK13-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK13-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK13-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK13: omp.inner.for.cond:			// CHECK13: omp.inner.for.cond:
	// CHECK13-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK13-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !22			// CHECK13-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK13: omp.inner.for.body:			// CHECK13: omp.inner.for.body:
	// CHECK13-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK13-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22			// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK13-NEXT: call void @_Z3fn1v(), !llvm.access.group !22			// CHECK13-NEXT: call void @_Z3fn1v()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK13: omp.body.continue:			// CHECK13: omp.body.continue:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK13: omp.inner.for.inc:			// CHECK13: omp.inner.for.inc:
	// CHECK13-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK13-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
	// CHECK13: omp.inner.for.end:			// CHECK13: omp.inner.for.end:
	// CHECK13-NEXT: store i32 100, i32* [[I]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK13-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK13-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK13: omp.inner.for.cond7:			// CHECK13: omp.inner.for.cond7:
	// CHECK13-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK13-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !25			// CHECK13-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK13: omp.inner.for.body9:			// CHECK13: omp.inner.for.body9:
	// CHECK13-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK13-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !25			// CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK13-NEXT: call void @_Z3fn2v(), !llvm.access.group !25			// CHECK13-NEXT: call void @_Z3fn2v()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK13: omp.body.continue12:			// CHECK13: omp.body.continue12:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK13: omp.inner.for.inc13:			// CHECK13: omp.inner.for.inc13:
	// CHECK13-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK13-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP26:![0-9]+]]
	// CHECK13: omp.inner.for.end15:			// CHECK13: omp.inner.for.end15:
	// CHECK13-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK13-NEXT: [[TMP10:%.]] = load i32, i32 [[ARG_ADDR]], align 4			// CHECK13-NEXT: [[TMP10:%.]] = load i32, i32 [[ARG_ADDR]], align 4
	// CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0			// CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
	// CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8			// CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
	// CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1			// CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
	// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK13-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK13-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK13-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK13-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK13: omp.inner.for.cond21:			// CHECK13: omp.inner.for.cond21:
	// CHECK13-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK13-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !28			// CHECK13-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]			// CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
	// CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK13: omp.inner.for.body23:			// CHECK13: omp.inner.for.body23:
	// CHECK13-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK13-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1			// CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
	// CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !28			// CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK13-NEXT: call void @_Z3fn3v(), !llvm.access.group !28			// CHECK13-NEXT: call void @_Z3fn3v()
	// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK13: omp.body.continue26:			// CHECK13: omp.body.continue26:
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK13: omp.inner.for.inc27:			// CHECK13: omp.inner.for.inc27:
	// CHECK13-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK13-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1			// CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
	// CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP29:![0-9]+]]
	// CHECK13: omp.inner.for.end29:			// CHECK13: omp.inner.for.end29:
	// CHECK13-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK13-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK13-NEXT: ret i32 0			// CHECK13-NEXT: ret i32 0
	//			//
	//			//
	// CHECK14-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK14-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK14-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK14-SAME: () #[[ATTR0:[0-9]+]] {
	Show All 9 Lines
	// CHECK14-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK14-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK14-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK14-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK14: omp.inner.for.cond:			// CHECK14: omp.inner.for.cond:
	// CHECK14-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK14-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !6			// CHECK14-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK14: omp.inner.for.body:			// CHECK14: omp.inner.for.body:
	// CHECK14-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK14-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6			// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK14: omp.body.continue:			// CHECK14: omp.body.continue:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK14: omp.inner.for.inc:			// CHECK14: omp.inner.for.inc:
	// CHECK14-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK14-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK14: omp.inner.for.end:			// CHECK14: omp.inner.for.end:
	// CHECK14-NEXT: store i32 100, i32* [[I]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK14-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK14-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK14: omp.inner.for.cond7:			// CHECK14: omp.inner.for.cond7:
	// CHECK14-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK14-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !10			// CHECK14-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK14: omp.inner.for.body9:			// CHECK14: omp.inner.for.body9:
	// CHECK14-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK14-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !10			// CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK14-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !10			// CHECK14-NEXT: call void @_Z9gtid_testv()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK14: omp.body.continue12:			// CHECK14: omp.body.continue12:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK14: omp.inner.for.inc13:			// CHECK14: omp.inner.for.inc13:
	// CHECK14-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK14-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]
	// CHECK14: omp.inner.for.end15:			// CHECK14: omp.inner.for.end15:
	// CHECK14-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK14-NEXT: ret void			// CHECK14-NEXT: ret void
	//			//
	//			//
	// CHECK14-LABEL: define {{[^@]+}}@main			// CHECK14-LABEL: define {{[^@]+}}@main
	// CHECK14-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK14-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 17 Lines
	// CHECK14-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK14-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK14-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK14-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK14: omp.inner.for.cond:			// CHECK14: omp.inner.for.cond:
	// CHECK14-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK14-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !13			// CHECK14-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK14: omp.inner.for.body:			// CHECK14: omp.inner.for.body:
	// CHECK14-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK14-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13			// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK14-NEXT: call void @_Z3fn4v(), !llvm.access.group !13			// CHECK14-NEXT: call void @_Z3fn4v()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK14: omp.body.continue:			// CHECK14: omp.body.continue:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK14: omp.inner.for.inc:			// CHECK14: omp.inner.for.inc:
	// CHECK14-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK14-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
	// CHECK14: omp.inner.for.end:			// CHECK14: omp.inner.for.end:
	// CHECK14-NEXT: store i32 100, i32* [[I]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK14-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK14-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK14: omp.inner.for.cond7:			// CHECK14: omp.inner.for.cond7:
	// CHECK14-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK14-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !16			// CHECK14-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK14: omp.inner.for.body9:			// CHECK14: omp.inner.for.body9:
	// CHECK14-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK14-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16			// CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK14-NEXT: call void @_Z3fn5v(), !llvm.access.group !16			// CHECK14-NEXT: call void @_Z3fn5v()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK14: omp.body.continue12:			// CHECK14: omp.body.continue12:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK14: omp.inner.for.inc13:			// CHECK14: omp.inner.for.inc13:
	// CHECK14-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK14-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16			// CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
	// CHECK14: omp.inner.for.end15:			// CHECK14: omp.inner.for.end15:
	// CHECK14-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK14-NEXT: [[TMP10:%.]] = load i32, i32 @Arg, align 4			// CHECK14-NEXT: [[TMP10:%.]] = load i32, i32 @Arg, align 4
	// CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0			// CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
	// CHECK14-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8			// CHECK14-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
	// CHECK14-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1			// CHECK14-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK14-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK14-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK14-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK14-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK14: omp.inner.for.cond21:			// CHECK14: omp.inner.for.cond21:
	// CHECK14-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK14-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !19			// CHECK14-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK14-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]			// CHECK14-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
	// CHECK14-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK14-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK14: omp.inner.for.body23:			// CHECK14: omp.inner.for.body23:
	// CHECK14-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK14-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1			// CHECK14-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
	// CHECK14-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK14-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK14-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !19			// CHECK14-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK14-NEXT: call void @_Z3fn6v(), !llvm.access.group !19			// CHECK14-NEXT: call void @_Z3fn6v()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK14: omp.body.continue26:			// CHECK14: omp.body.continue26:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK14: omp.inner.for.inc27:			// CHECK14: omp.inner.for.inc27:
	// CHECK14-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK14-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1			// CHECK14-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
	// CHECK14-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19			// CHECK14-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP20:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP20:![0-9]+]]
	// CHECK14: omp.inner.for.end29:			// CHECK14: omp.inner.for.end29:
	// CHECK14-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK14-NEXT: [[TMP16:%.]] = load i32, i32 @Arg, align 4			// CHECK14-NEXT: [[TMP16:%.]] = load i32, i32 @Arg, align 4
	// CHECK14-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP16]])			// CHECK14-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP16]])
	// CHECK14-NEXT: ret i32 [[CALL]]			// CHECK14-NEXT: ret i32 [[CALL]]
	//			//
	//			//
	Show All 19 Lines
	// CHECK14-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK14-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK14-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK14-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK14-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK14-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK14: omp.inner.for.cond:			// CHECK14: omp.inner.for.cond:
	// CHECK14-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK14-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !22			// CHECK14-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK14: omp.inner.for.body:			// CHECK14: omp.inner.for.body:
	// CHECK14-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK14-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22			// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK14-NEXT: call void @_Z3fn1v(), !llvm.access.group !22			// CHECK14-NEXT: call void @_Z3fn1v()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK14: omp.body.continue:			// CHECK14: omp.body.continue:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK14: omp.inner.for.inc:			// CHECK14: omp.inner.for.inc:
	// CHECK14-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK14-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
	// CHECK14: omp.inner.for.end:			// CHECK14: omp.inner.for.end:
	// CHECK14-NEXT: store i32 100, i32* [[I]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK14-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK14-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK14: omp.inner.for.cond7:			// CHECK14: omp.inner.for.cond7:
	// CHECK14-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK14-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !25			// CHECK14-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK14: omp.inner.for.body9:			// CHECK14: omp.inner.for.body9:
	// CHECK14-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK14-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !25			// CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK14-NEXT: call void @_Z3fn2v(), !llvm.access.group !25			// CHECK14-NEXT: call void @_Z3fn2v()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK14: omp.body.continue12:			// CHECK14: omp.body.continue12:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK14: omp.inner.for.inc13:			// CHECK14: omp.inner.for.inc13:
	// CHECK14-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK14-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !25			// CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP26:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP26:![0-9]+]]
	// CHECK14: omp.inner.for.end15:			// CHECK14: omp.inner.for.end15:
	// CHECK14-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK14-NEXT: [[TMP10:%.]] = load i32, i32 [[ARG_ADDR]], align 4			// CHECK14-NEXT: [[TMP10:%.]] = load i32, i32 [[ARG_ADDR]], align 4
	// CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0			// CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
	// CHECK14-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8			// CHECK14-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
	// CHECK14-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1			// CHECK14-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
	// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK14-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK14-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK14-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK14-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK14: omp.inner.for.cond21:			// CHECK14: omp.inner.for.cond21:
	// CHECK14-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK14-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !28			// CHECK14-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK14-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]			// CHECK14-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
	// CHECK14-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK14-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK14: omp.inner.for.body23:			// CHECK14: omp.inner.for.body23:
	// CHECK14-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK14-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1			// CHECK14-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
	// CHECK14-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK14-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK14-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !28			// CHECK14-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK14-NEXT: call void @_Z3fn3v(), !llvm.access.group !28			// CHECK14-NEXT: call void @_Z3fn3v()
	// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK14: omp.body.continue26:			// CHECK14: omp.body.continue26:
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK14: omp.inner.for.inc27:			// CHECK14: omp.inner.for.inc27:
	// CHECK14-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK14-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1			// CHECK14-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
	// CHECK14-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !28			// CHECK14-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP29:![0-9]+]]			// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP29:![0-9]+]]
	// CHECK14: omp.inner.for.end29:			// CHECK14: omp.inner.for.end29:
	// CHECK14-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK14-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK14-NEXT: ret i32 0			// CHECK14-NEXT: ret i32 0
	//			//
	//			//
	// CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK15-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
	Show All 9 Lines
	// CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK15-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK15-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK15: omp.inner.for.cond:			// CHECK15: omp.inner.for.cond:
	// CHECK15-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK15-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !6			// CHECK15-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK15: omp.inner.for.body:			// CHECK15: omp.inner.for.body:
	// CHECK15-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK15-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6			// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK15: omp.body.continue:			// CHECK15: omp.body.continue:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK15: omp.inner.for.inc:			// CHECK15: omp.inner.for.inc:
	// CHECK15-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK15-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK15: omp.inner.for.end:			// CHECK15: omp.inner.for.end:
	// CHECK15-NEXT: store i32 100, i32* [[I]], align 4			// CHECK15-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK15-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK15-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK15: omp.inner.for.cond7:			// CHECK15: omp.inner.for.cond7:
	// CHECK15-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK15-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !10			// CHECK15-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK15: omp.inner.for.body9:			// CHECK15: omp.inner.for.body9:
	// CHECK15-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK15-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !10			// CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK15-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !10			// CHECK15-NEXT: call void @_Z9gtid_testv()
	// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK15: omp.body.continue12:			// CHECK15: omp.body.continue12:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK15: omp.inner.for.inc13:			// CHECK15: omp.inner.for.inc13:
	// CHECK15-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK15-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]
	// CHECK15: omp.inner.for.end15:			// CHECK15: omp.inner.for.end15:
	// CHECK15-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK15-NEXT: ret void			// CHECK15-NEXT: ret void
	//			//
	//			//
	// CHECK15-LABEL: define {{[^@]+}}@main			// CHECK15-LABEL: define {{[^@]+}}@main
	// CHECK15-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK15-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 17 Lines
	// CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK15-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK15-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK15: omp.inner.for.cond:			// CHECK15: omp.inner.for.cond:
	// CHECK15-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK15-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !13			// CHECK15-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK15: omp.inner.for.body:			// CHECK15: omp.inner.for.body:
	// CHECK15-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK15-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13			// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK15-NEXT: call void @_Z3fn4v(), !llvm.access.group !13			// CHECK15-NEXT: call void @_Z3fn4v()
	// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK15: omp.body.continue:			// CHECK15: omp.body.continue:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK15: omp.inner.for.inc:			// CHECK15: omp.inner.for.inc:
	// CHECK15-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK15-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
	// CHECK15: omp.inner.for.end:			// CHECK15: omp.inner.for.end:
	// CHECK15-NEXT: store i32 100, i32* [[I]], align 4			// CHECK15-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK15-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK15-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 27 Lines
	// CHECK15-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK15-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1			// CHECK15-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1
	// CHECK15-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1			// CHECK15-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
	// CHECK15-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]			// CHECK15-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]
	// CHECK15: omp_if.then:			// CHECK15: omp_if.then:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
	// CHECK15: omp.inner.for.cond22:			// CHECK15: omp.inner.for.cond22:
	// CHECK15-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK15-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !18			// CHECK15-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]			// CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
	// CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]			// CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]
	// CHECK15: omp.inner.for.body24:			// CHECK15: omp.inner.for.body24:
	// CHECK15-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK15-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1			// CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
	// CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]			// CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
	// CHECK15-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group !18			// CHECK15-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4
	// CHECK15-NEXT: call void @_Z3fn6v(), !llvm.access.group !18			// CHECK15-NEXT: call void @_Z3fn6v()
	// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]			// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
	// CHECK15: omp.body.continue27:			// CHECK15: omp.body.continue27:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
	// CHECK15: omp.inner.for.inc28:			// CHECK15: omp.inner.for.inc28:
	// CHECK15-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK15-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1			// CHECK15-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
	// CHECK15-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK15-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP19:![0-9]+]]
	// CHECK15: omp.inner.for.end30:			// CHECK15: omp.inner.for.end30:
	// CHECK15-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK15-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK15: omp_if.else:			// CHECK15: omp_if.else:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
	// CHECK15: omp.inner.for.cond31:			// CHECK15: omp.inner.for.cond31:
	// CHECK15-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4			// CHECK15-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4			// CHECK15-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
	// CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK15-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK15-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK15-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK15-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK15: omp.inner.for.cond:			// CHECK15: omp.inner.for.cond:
	// CHECK15-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK15-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !22			// CHECK15-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK15: omp.inner.for.body:			// CHECK15: omp.inner.for.body:
	// CHECK15-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK15-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22			// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK15-NEXT: call void @_Z3fn1v(), !llvm.access.group !22			// CHECK15-NEXT: call void @_Z3fn1v()
	// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK15: omp.body.continue:			// CHECK15: omp.body.continue:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK15: omp.inner.for.inc:			// CHECK15: omp.inner.for.inc:
	// CHECK15-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK15-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
	// CHECK15: omp.inner.for.end:			// CHECK15: omp.inner.for.end:
	// CHECK15-NEXT: store i32 100, i32* [[I]], align 4			// CHECK15-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK15-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK15-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 23 Lines
	// CHECK15-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8			// CHECK15-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
	// CHECK15-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1			// CHECK15-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
	// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK15-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK15-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK15: omp.inner.for.cond21:			// CHECK15: omp.inner.for.cond21:
	// CHECK15-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK15-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !26			// CHECK15-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK15-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]			// CHECK15-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
	// CHECK15-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK15-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK15: omp.inner.for.body23:			// CHECK15: omp.inner.for.body23:
	// CHECK15-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK15-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1			// CHECK15-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
	// CHECK15-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK15-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK15-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !26			// CHECK15-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK15-NEXT: call void @_Z3fn3v(), !llvm.access.group !26			// CHECK15-NEXT: call void @_Z3fn3v()
	// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK15: omp.body.continue26:			// CHECK15: omp.body.continue26:
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK15: omp.inner.for.inc27:			// CHECK15: omp.inner.for.inc27:
	// CHECK15-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK15-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1			// CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
	// CHECK15-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK15-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP27:![0-9]+]]
	// CHECK15: omp.inner.for.end29:			// CHECK15: omp.inner.for.end29:
	// CHECK15-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK15-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK15-NEXT: ret i32 0			// CHECK15-NEXT: ret i32 0
	//			//
	//			//
	// CHECK16-LABEL: define {{[^@]+}}@_Z9gtid_testv			// CHECK16-LABEL: define {{[^@]+}}@_Z9gtid_testv
	// CHECK16-SAME: () #[[ATTR0:[0-9]+]] {			// CHECK16-SAME: () #[[ATTR0:[0-9]+]] {
	Show All 9 Lines
	// CHECK16-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4			// CHECK16-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
	// CHECK16-NEXT: [[I6:%.*]] = alloca i32, align 4			// CHECK16-NEXT: [[I6:%.*]] = alloca i32, align 4
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK16-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK16-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK16: omp.inner.for.cond:			// CHECK16: omp.inner.for.cond:
	// CHECK16-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK16-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !6			// CHECK16-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK16: omp.inner.for.body:			// CHECK16: omp.inner.for.body:
	// CHECK16-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK16-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6			// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK16: omp.body.continue:			// CHECK16: omp.body.continue:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK16: omp.inner.for.inc:			// CHECK16: omp.inner.for.inc:
	// CHECK16-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK16-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6			// CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
	// CHECK16: omp.inner.for.end:			// CHECK16: omp.inner.for.end:
	// CHECK16-NEXT: store i32 100, i32* [[I]], align 4			// CHECK16-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK16-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK16-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	// CHECK16: omp.inner.for.cond7:			// CHECK16: omp.inner.for.cond7:
	// CHECK16-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK16-NEXT: [[TMP6:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4, !llvm.access.group !10			// CHECK16-NEXT: [[TMP7:%.]] = load i32, i32 [[DOTOMP_UB4]], align 4
	// CHECK16-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]			// CHECK16-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
	// CHECK16-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]			// CHECK16-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.]], label [[OMP_INNER_FOR_END15:%.]]
	// CHECK16: omp.inner.for.body9:			// CHECK16: omp.inner.for.body9:
	// CHECK16-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK16-NEXT: [[TMP8:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1			// CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
	// CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]			// CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
	// CHECK16-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !10			// CHECK16-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
	// CHECK16-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !10			// CHECK16-NEXT: call void @_Z9gtid_testv()
	// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]			// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
	// CHECK16: omp.body.continue12:			// CHECK16: omp.body.continue12:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
	// CHECK16: omp.inner.for.inc13:			// CHECK16: omp.inner.for.inc13:
	// CHECK16-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK16-NEXT: [[TMP9:%.]] = load i32, i32 [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1			// CHECK16-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
	// CHECK16-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10			// CHECK16-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]
	// CHECK16: omp.inner.for.end15:			// CHECK16: omp.inner.for.end15:
	// CHECK16-NEXT: store i32 100, i32* [[I6]], align 4			// CHECK16-NEXT: store i32 100, i32* [[I6]], align 4
	// CHECK16-NEXT: ret void			// CHECK16-NEXT: ret void
	//			//
	//			//
	// CHECK16-LABEL: define {{[^@]+}}@main			// CHECK16-LABEL: define {{[^@]+}}@main
	// CHECK16-SAME: () #[[ATTR1:[0-9]+]] {			// CHECK16-SAME: () #[[ATTR1:[0-9]+]] {
	Show All 17 Lines
	// CHECK16-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK16-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4			// CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK16-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK16-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK16: omp.inner.for.cond:			// CHECK16: omp.inner.for.cond:
	// CHECK16-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK16-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !13			// CHECK16-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK16: omp.inner.for.body:			// CHECK16: omp.inner.for.body:
	// CHECK16-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK16-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13			// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK16-NEXT: call void @_Z3fn4v(), !llvm.access.group !13			// CHECK16-NEXT: call void @_Z3fn4v()
	// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK16: omp.body.continue:			// CHECK16: omp.body.continue:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK16: omp.inner.for.inc:			// CHECK16: omp.inner.for.inc:
	// CHECK16-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK16-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13			// CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
	// CHECK16: omp.inner.for.end:			// CHECK16: omp.inner.for.end:
	// CHECK16-NEXT: store i32 100, i32* [[I]], align 4			// CHECK16-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK16-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK16-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 27 Lines
	// CHECK16-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK16-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK16-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK16-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1			// CHECK16-NEXT: [[TMP12:%.]] = load i8, i8 [[DOTCAPTURE_EXPR_]], align 1
	// CHECK16-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1			// CHECK16-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
	// CHECK16-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]			// CHECK16-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.]], label [[OMP_IF_ELSE:%.]]
	// CHECK16: omp_if.then:			// CHECK16: omp_if.then:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
	// CHECK16: omp.inner.for.cond22:			// CHECK16: omp.inner.for.cond22:
	// CHECK16-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK16-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !18			// CHECK16-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK16-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]			// CHECK16-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
	// CHECK16-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]			// CHECK16-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.]], label [[OMP_INNER_FOR_END30:%.]]
	// CHECK16: omp.inner.for.body24:			// CHECK16: omp.inner.for.body24:
	// CHECK16-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK16-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1			// CHECK16-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
	// CHECK16-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]			// CHECK16-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
	// CHECK16-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group !18			// CHECK16-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4
	// CHECK16-NEXT: call void @_Z3fn6v(), !llvm.access.group !18			// CHECK16-NEXT: call void @_Z3fn6v()
	// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]			// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
	// CHECK16: omp.body.continue27:			// CHECK16: omp.body.continue27:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
	// CHECK16: omp.inner.for.inc28:			// CHECK16: omp.inner.for.inc28:
	// CHECK16-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK16-NEXT: [[TMP16:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1			// CHECK16-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
	// CHECK16-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !18			// CHECK16-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP19:![0-9]+]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP19:![0-9]+]]
	// CHECK16: omp.inner.for.end30:			// CHECK16: omp.inner.for.end30:
	// CHECK16-NEXT: br label [[OMP_IF_END:%.*]]			// CHECK16-NEXT: br label [[OMP_IF_END:%.*]]
	// CHECK16: omp_if.else:			// CHECK16: omp_if.else:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
	// CHECK16: omp.inner.for.cond31:			// CHECK16: omp.inner.for.cond31:
	// CHECK16-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4			// CHECK16-NEXT: [[TMP17:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4			// CHECK16-NEXT: [[TMP18:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
	// CHECK16-NEXT: [[I20:%.*]] = alloca i32, align 4			// CHECK16-NEXT: [[I20:%.*]] = alloca i32, align 4
	// CHECK16-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4			// CHECK16-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
	// CHECK16-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4			// CHECK16-NEXT: [[TMP0:%.]] = load i32, i32 [[DOTOMP_LB]], align 4
	// CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4			// CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
	// CHECK16: omp.inner.for.cond:			// CHECK16: omp.inner.for.cond:
	// CHECK16-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK16-NEXT: [[TMP1:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4, !llvm.access.group !22			// CHECK16-NEXT: [[TMP2:%.]] = load i32, i32 [[DOTOMP_UB]], align 4
	// CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]			// CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
	// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]			// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.]], label [[OMP_INNER_FOR_END:%.]]
	// CHECK16: omp.inner.for.body:			// CHECK16: omp.inner.for.body:
	// CHECK16-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK16-NEXT: [[TMP3:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1			// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
	// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]			// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
	// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22			// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4
	// CHECK16-NEXT: call void @_Z3fn1v(), !llvm.access.group !22			// CHECK16-NEXT: call void @_Z3fn1v()
	// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]			// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
	// CHECK16: omp.body.continue:			// CHECK16: omp.body.continue:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
	// CHECK16: omp.inner.for.inc:			// CHECK16: omp.inner.for.inc:
	// CHECK16-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK16-NEXT: [[TMP4:%.]] = load i32, i32 [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1			// CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
	// CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22			// CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
	// CHECK16: omp.inner.for.end:			// CHECK16: omp.inner.for.end:
	// CHECK16-NEXT: store i32 100, i32* [[I]], align 4			// CHECK16-NEXT: store i32 100, i32* [[I]], align 4
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
	// CHECK16-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4			// CHECK16-NEXT: [[TMP5:%.]] = load i32, i32 [[DOTOMP_LB3]], align 4
	// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4			// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
	Show All 23 Lines
	// CHECK16-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8			// CHECK16-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
	// CHECK16-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1			// CHECK16-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
	// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4			// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
	// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4			// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
	// CHECK16-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4			// CHECK16-NEXT: [[TMP11:%.]] = load i32, i32 [[DOTOMP_LB17]], align 4
	// CHECK16-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4			// CHECK16-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
	// CHECK16: omp.inner.for.cond21:			// CHECK16: omp.inner.for.cond21:
	// CHECK16-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK16-NEXT: [[TMP12:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4, !llvm.access.group !26			// CHECK16-NEXT: [[TMP13:%.]] = load i32, i32 [[DOTOMP_UB18]], align 4
	// CHECK16-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]			// CHECK16-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
	// CHECK16-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]			// CHECK16-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.]], label [[OMP_INNER_FOR_END29:%.]]
	// CHECK16: omp.inner.for.body23:			// CHECK16: omp.inner.for.body23:
	// CHECK16-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK16-NEXT: [[TMP14:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1			// CHECK16-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
	// CHECK16-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]			// CHECK16-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
	// CHECK16-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !26			// CHECK16-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4
	// CHECK16-NEXT: call void @_Z3fn3v(), !llvm.access.group !26			// CHECK16-NEXT: call void @_Z3fn3v()
	// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]			// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
	// CHECK16: omp.body.continue26:			// CHECK16: omp.body.continue26:
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
	// CHECK16: omp.inner.for.inc27:			// CHECK16: omp.inner.for.inc27:
	// CHECK16-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK16-NEXT: [[TMP15:%.]] = load i32, i32 [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1			// CHECK16-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
	// CHECK16-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !26			// CHECK16-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4
	// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP27:![0-9]+]]			// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP27:![0-9]+]]
	// CHECK16: omp.inner.for.end29:			// CHECK16: omp.inner.for.end29:
	// CHECK16-NEXT: store i32 100, i32* [[I20]], align 4			// CHECK16-NEXT: store i32 100, i32* [[I20]], align 4
	// CHECK16-NEXT: ret i32 0			// CHECK16-NEXT: ret i32 0
	//			//

clang/test/OpenMP/vla_crash.c

	Show First 20 Lines • Show All 124 Lines • ▼ Show 20 Lines
	// CHECK1-NEXT: [[TMP4:%.]] = bitcast i32* [[TMP2]] to i32*			// CHECK1-NEXT: [[TMP4:%.]] = bitcast i32* [[TMP2]] to i32*
	// CHECK1-NEXT: [[CMP:%.]] = icmp eq i32 [[TMP3]], [[TMP4]]			// CHECK1-NEXT: [[CMP:%.]] = icmp eq i32 [[TMP3]], [[TMP4]]
	// CHECK1-NEXT: br i1 [[CMP]], label [[IF_THEN:%.]], label [[IF_END:%.]]			// CHECK1-NEXT: br i1 [[CMP]], label [[IF_THEN:%.]], label [[IF_END:%.]]
	// CHECK1: if.then:			// CHECK1: if.then:
	// CHECK1-NEXT: br label [[IF_END]]			// CHECK1-NEXT: br label [[IF_END]]
	// CHECK1: if.end:			// CHECK1: if.end:
	// CHECK1-NEXT: ret void			// CHECK1-NEXT: ret void
	//			//
	//
	No newline at end of file

This is an archive of the discontinued LLVM Phabricator instance.

[CFE][Codegen] Update auto-generated check lines for few GPU lit testsClosedPublic

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Diff 375777

clang/test/CodeGenCUDA/builtins-amdgcn.cu

clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp

clang/test/CodeGenCXX/amdgcn-func-arg.cpp

clang/test/CodeGenCXX/builtin-amdgcn-atomic-inc-dec.cpp

clang/test/CodeGenSYCL/address-space-deduction.cpp

clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp

clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp

clang/test/OpenMP/nvptx_allocate_codegen.cpp

clang/test/OpenMP/nvptx_data_sharing.cpp

clang/test/OpenMP/nvptx_multi_target_parallel_codegen.cpp

clang/test/OpenMP/nvptx_nested_parallel_codegen.cpp

clang/test/OpenMP/parallel_if_codegen.cpp

clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp

clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp

clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp

clang/test/OpenMP/vla_crash.c

[CFE][Codegen] Update auto-generated check lines for few GPU lit tests
ClosedPublic