[X86] Always check the size of SourceTy before getting the next type

[pengfei]

Summary

D109607 results in a regression in llvm-test-suite.
The reason is we didn't check the size of SourceTy, so that we will
return wrong SSE type when SourceTy is overlapped.

[pengfei]

I'm wondering whether the test case is required or not for this patch. Reasons:

1. We have a test in llvm-test-suite can cover this and the test is just a snippet of it;
2. The test case can not reflect the direct effect of this change;
3. There're many variables in IR which may be easily affected by unrelated changes, which is annoying to others.

What do you think?

[lebedev.ri]

clang/test/CodeGen/X86/va-arg-sse.c

2

Please don't use -O* in clang irgen tests.
This should *only* test what IR is produced by clang itself.

[Meinersbur]

In D110037#3008292, @pengfei wrote:

What do you think?

The test-suite is an end-to-end/integration test while tests monorepository are unit/regression tests. They have different purposes.
(Personally, I would prefer to reduce the amount of unit/regression testing that can already be covered by the test-suite, but that would be a bigger story)

clang/test/CodeGen/X86/va-arg-sse.c

2

I agree here, testing -O* output will break easily with any unrelated change in LLVM.

[pengfei]

Address review comments.

Thanks Roman and Michael.

[pengfei]

clang/test/CodeGen/X86/va-arg-sse.c

2

You are right. The test case looks more clear now.

[Meinersbur]

LGTM

[Meinersbur]

This fixed the builder: http://meinersbur.de:8011/#/builders/76/builds/803

clang/lib/CodeGen/TargetInfo.cpp

 }
 
 /// GetSSETypeAtOffset - Return a type that will be passed by the backend in the
 /// low 8 bytes of an XMM register, corresponding to the SSE class.
 llvm::Type *X86_64ABIInfo::
 GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset,
                    QualType SourceTy, unsigned SourceOffset) const {
   const llvm::DataLayout &TD = getDataLayout();
+  unsigned SourceSize =
+      (unsigned)getContext().getTypeSize(SourceTy) / 8 - SourceOffset;
   llvm::Type *T0 = getFPTypeAtOffset(IRType, IROffset, TD);
   if (!T0 || T0->isDoubleTy())
     return llvm::Type::getDoubleTy(getVMContext());
 
   // Get the adjacent FP type.
-  llvm::Type *T1 =
-      getFPTypeAtOffset(IRType, IROffset + TD.getTypeAllocSize(T0), TD);
+  llvm::Type *T1 = nullptr;
+  unsigned T0Size = TD.getTypeAllocSize(T0);
+  if (SourceSize > T0Size)
+      T1 = getFPTypeAtOffset(IRType, IROffset + T0Size, TD);
   if (T1 == nullptr) {
     // Check if IRType is a half + float. float type will be in IROffset+4 due
     // to its alignment.
-    if (T0->isHalfTy())
+    if (T0->isHalfTy() && SourceSize > 4)
       T1 = getFPTypeAtOffset(IRType, IROffset + 4, TD);
     // If we can't get a second FP type, return a simple half or float.
     // avx512fp16-abi.c:pr51813_2 shows it works to return float for
     // {float, i8} too.
     if (T1 == nullptr)
       return T0;
   }
 
   if (T0->isFloatTy() && T1->isFloatTy())
     return llvm::FixedVectorType::get(T0, 2);
 
   if (T0->isHalfTy() && T1->isHalfTy()) {
-    llvm::Type *T2 = getFPTypeAtOffset(IRType, IROffset + 4, TD);
+    llvm::Type *T2 = nullptr;
+    if (SourceSize > 4)
+      T2 = getFPTypeAtOffset(IRType, IROffset + 4, TD);
     if (T2 == nullptr)
       return llvm::FixedVectorType::get(T0, 2);
     return llvm::FixedVectorType::get(T0, 4);
   }
 
   if (T0->isHalfTy() || T1->isHalfTy())
     return llvm::FixedVectorType::get(llvm::Type::getHalfTy(getVMContext()), 4);
 

clang/test/CodeGen/X86/va-arg-sse.c

 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // RUN: %clang_cc1 %s -emit-llvm -o - -triple x86_64-unknown-unknown | FileCheck %s
 
 #include <stdarg.h>
 
 struct S { float a[3]; };
 struct S a[5];
 
 // CHECK-LABEL: @check(
 // CHECK-NEXT:  entry:

 // CHECK-NEXT:    [[FP_OFFSET:%.*]] = load i32, i32* [[FP_OFFSET_P]], align 4
 // CHECK-NEXT:    [[FITS_IN_FP:%.*]] = icmp ule i32 [[FP_OFFSET]], 144
 // CHECK-NEXT:    br i1 [[FITS_IN_FP]], label [[VAARG_IN_REG:%.*]], label [[VAARG_IN_MEM:%.*]]
 // CHECK:       vaarg.in_reg:
 // CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___VA_LIST_TAG]], %struct.__va_list_tag* [[ARRAYDECAY2]], i32 0, i32 3
 // CHECK-NEXT:    [[REG_SAVE_AREA:%.*]] = load i8*, i8** [[TMP0]], align 16
 // CHECK-NEXT:    [[TMP1:%.*]] = getelementptr i8, i8* [[REG_SAVE_AREA]], i32 [[FP_OFFSET]]
 // CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 16
-// CHECK-NEXT:    [[TMP3:%.*]] = bitcast %struct.S* [[TMP]] to { <2 x float>, <2 x float> }*
+// CHECK-NEXT:    [[TMP3:%.*]] = bitcast %struct.S* [[TMP]] to { <2 x float>, float }*
 // CHECK-NEXT:    [[TMP4:%.*]] = bitcast i8* [[TMP1]] to <2 x float>*
 // CHECK-NEXT:    [[TMP5:%.*]] = load <2 x float>, <2 x float>* [[TMP4]], align 16
-// CHECK-NEXT:    [[TMP6:%.*]] = getelementptr inbounds { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* [[TMP3]], i32 0, i32 0
+// CHECK-NEXT:    [[TMP6:%.*]] = getelementptr inbounds { <2 x float>, float }, { <2 x float>, float }* [[TMP3]], i32 0, i32 0
 // CHECK-NEXT:    store <2 x float> [[TMP5]], <2 x float>* [[TMP6]], align 4
-// CHECK-NEXT:    [[TMP7:%.*]] = bitcast i8* [[TMP2]] to <2 x float>*
-// CHECK-NEXT:    [[TMP8:%.*]] = load <2 x float>, <2 x float>* [[TMP7]], align 16
-// CHECK-NEXT:    [[TMP9:%.*]] = getelementptr inbounds { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* [[TMP3]], i32 0, i32 1
-// CHECK-NEXT:    store <2 x float> [[TMP8]], <2 x float>* [[TMP9]], align 4
-// CHECK-NEXT:    [[TMP10:%.*]] = bitcast { <2 x float>, <2 x float> }* [[TMP3]] to %struct.S*
+// CHECK-NEXT:    [[TMP7:%.*]] = bitcast i8* [[TMP2]] to float*
+// CHECK-NEXT:    [[TMP8:%.*]] = load float, float* [[TMP7]], align 16
+// CHECK-NEXT:    [[TMP9:%.*]] = getelementptr inbounds { <2 x float>, float }, { <2 x float>, float }* [[TMP3]], i32 0, i32 1
+// CHECK-NEXT:    store float [[TMP8]], float* [[TMP9]], align 4
+// CHECK-NEXT:    [[TMP10:%.*]] = bitcast { <2 x float>, float }* [[TMP3]] to %struct.S*
 // CHECK-NEXT:    [[TMP11:%.*]] = add i32 [[FP_OFFSET]], 32
 // CHECK-NEXT:    store i32 [[TMP11]], i32* [[FP_OFFSET_P]], align 4
 // CHECK-NEXT:    br label [[VAARG_END:%.*]]
 // CHECK:       vaarg.in_mem:
 // CHECK-NEXT:    [[OVERFLOW_ARG_AREA_P:%.*]] = getelementptr inbounds [[STRUCT___VA_LIST_TAG]], %struct.__va_list_tag* [[ARRAYDECAY2]], i32 0, i32 2
 // CHECK-NEXT:    [[OVERFLOW_ARG_AREA:%.*]] = load i8*, i8** [[OVERFLOW_ARG_AREA_P]], align 8
 // CHECK-NEXT:    [[TMP12:%.*]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.S*
 // CHECK-NEXT:    [[OVERFLOW_ARG_AREA_NEXT:%.*]] = getelementptr i8, i8* [[OVERFLOW_ARG_AREA]], i32 16