This patch fixes the pattern for the P10 instructions Vector Shift Left
Double by Bit Immediate VN-form and Vector Shift Right Double by Bit
Immediate VN-form. The third argument should be a target constant (timm)
instead of an i32 because an immediate is expected.
Details
Details
- Reviewers
lei nemanjai stefanp - Group Reviewers
Restricted Project - Commits
- rG682e15f371db: [PowerPC] Fix td pattern for P10 VSLDBI and VSRDBI
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Unit Tests
Unit Tests