[AMDGPU] Update Call Convention docs for GFX90A

[scott.linder]

Summary

Document the CSR AGPRs for GFX90A.

Remove the TODO for gfx908, as the answer is that we don't mark any
AGPRs as callee-saved except for GFX90A, i.e. the docs as-is are correct
for gfx908.

llvm/docs/AMDGPUUsage.rst

2.  The following registers are preserved and have the same value as on entry:
     * VGPR248-255
 
         .. note::
 
           Except the argument registers, the VGPRs clobbered and the preserved
           registers are intermixed at regular intervals in order to keep a
           similar ratio independent of the number of allocated VGPRs.
 
+    * GFX90A: All AGPR registers except the clobbered registers AGPR0-31.
     * Lanes of all VGPRs that are inactive at the call site.
 
       For the AMDGPU backend, an inter-procedural register allocation (IPRA)
       optimization may mark some of clobbered SGPR and VGPR registers as
       preserved if it can be determined that the called function does not change
       their value.
 
 2.  The PC is set to the RA provided on entry.
 3.  MODE register: *TBD*.
 4.  All other registers are clobbered.
 5.  Any necessary ``s_waitcnt`` has been performed to ensure memory accessed by
     function is available to the caller.
 
 .. TODO::
 
-  - On gfx908 are all ACC registers clobbered?
-
   - How are function results returned? The address of structured types is passed
     by reference, but what about other types?
 
 The function input arguments are made up of the formal arguments explicitly
 declared by the source language function plus the implicit input arguments used
 by the implementation.
 
 The source language input arguments are: