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Differential D108354

Use v16i8 rather than v2i64 as the VT for memset expansion on AArch64.
ClosedPublic

Authored by resistor on Aug 19 2021, 1:06 AM.

Details

Reviewers
danlark
Commits
rG06a4c858901d: Use v16i8 rather than v2i64 as the VT for memset expansion on AArch64.
Summary

This allows the instruction selector to realize that it can directly
broadcast the low byte of the memset value, rather than replicating
it to a 64-bit GPR before broadcasting.

This fixes PR50985.

Diff Detail

Event Timeline

resistor created this revision.Aug 19 2021, 1:06 AM
Herald added subscribers: hiraditya, kristof.beyls. · View Herald TranscriptAug 19 2021, 1:06 AM
resistor requested review of this revision.Aug 19 2021, 1:06 AM
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resistor added a reviewer: danlark.Aug 19 2021, 1:08 AM
danlark accepted this revision.Aug 19 2021, 1:32 AM

Thanks, LGTM!

This revision is now accepted and ready to land.Aug 19 2021, 1:32 AM
Harbormaster completed remote builds in B120277: Diff 367417.Aug 19 2021, 1:33 AM
Closed by commit rG06a4c858901d: Use v16i8 rather than v2i64 as the VT for memset expansion on AArch64. (authored by resistor). · Explain WhyAug 19 2021, 9:54 AM
This revision was automatically updated to reflect the committed changes.
resistor added a commit: rG06a4c858901d: Use v16i8 rather than v2i64 as the VT for memset expansion on AArch64..

Revision Contents

PathSize
llvm/
lib/
Target/
AArch64/
4 lines
test/
CodeGen/
AArch64/
18 lines

Diff 367417

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 12,085 Lines • ▼ Show 20 Lines if (Op.isAligned(AlignCheck))
return true; return true;
bool Fast; bool Fast;
return allowsMisalignedMemoryAccesses(VT, 0, Align(1), return allowsMisalignedMemoryAccesses(VT, 0, Align(1),
MachineMemOperand::MONone, &Fast) && MachineMemOperand::MONone, &Fast) &&
Fast; Fast;
}; };
if (CanUseNEON && Op.isMemset() && !IsSmallMemset && if (CanUseNEON && Op.isMemset() && !IsSmallMemset &&
AlignmentIsAcceptable(MVT::v2i64, Align(16))) AlignmentIsAcceptable(MVT::v16i8, Align(16)))
return MVT::v2i64; return MVT::v16i8;
if (CanUseFP && !IsSmallMemset && AlignmentIsAcceptable(MVT::f128, Align(16))) if (CanUseFP && !IsSmallMemset && AlignmentIsAcceptable(MVT::f128, Align(16)))
return MVT::f128; return MVT::f128;
if (Op.size() >= 8 && AlignmentIsAcceptable(MVT::i64, Align(8))) if (Op.size() >= 8 && AlignmentIsAcceptable(MVT::i64, Align(8)))
return MVT::i64; return MVT::i64;
if (Op.size() >= 4 && AlignmentIsAcceptable(MVT::i32, Align(4))) if (Op.size() >= 4 && AlignmentIsAcceptable(MVT::i32, Align(4)))
return MVT::i32; return MVT::i32;
return MVT::Other; return MVT::Other;
} }
▲ Show 20 Lines • Show All 6,792 Lines • Show Last 20 Lines

llvm/test/CodeGen/AArch64/memset.ll

  • This file was added.
; RUN: llc < %s | FileCheck %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-gnu"
; CHECK: memset_call:
; CHECK-NOT: and
; CHECK: dup
; CHECK-NEXT: stp
; CHECK-NEXT: stp
; CHECK-NEXT: ret
define void @memset_call(i8* %0, i32 %1) {
%3 = trunc i32 %1 to i8
call void @llvm.memset.p0i8.i64(i8* %0, i8 %3, i64 64, i1 false)
ret void
}
declare void @llvm.memset.p0i8.i64(i8*, i8, i64, i1 immarg)