Disassemble AArch64 pc-relative address calculations & symbolicate

[jasonmolenda]

Summary

lldb's disassembler for arm64 / aarch64 doesn't recognize the ADRP+ADD instruction pair often used to calculate pc-relative addresses, and symbolicate what is being pointed to, making it hard to understand the assembly; doing the computation manually is annoying. This patch adds a bit of arm64-specific knowledge to the disassembly symbolicator to remember the state and compute the address being specified when the target is aarch64.

I'm fixing the other thing that I dislike the most about lldb's arm64 disassembly in the llvm aarch64 instruction printer, via https://reviews.llvm.org/D107196 .

[DavidSpickett]

The test is with MachO but I assume this would apply to ELF, COFF etc, since it's a general disassembly feature?

lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp

1315

Add aarch64_be here.

Triple does have a isAArch64 which does this but I think you just get the ArchType enum here so you can't use it which is a shame.

1325

There is a 32 bit variant of ADD with W registers, I assume LLVMDisassembler_ReferenceType_In_ARM64_ADDXri is specific to the X version though, correct?

Which saves you checking the "sf" field later. (plus I don't know that any compiler would bother using the W version for this sort of thing anyway)

1328

Add comments to these two lines saying what they're checking for.

(looks correct from what the ARMARM says)

1332–1335

Comments here too. The second one is sign extension, correct?

1339

"sh" is a single bit field so you could just:

if ((addrxi_inst >> 22) & 1)

1342

ditto on the comments, but the math seems fine.

1347

This method is pretty long as it is, does it make sense to make the aarch64 specific part of it another private method?

lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h

78

Just to check I understand, these are member vars because SymbolLookup will first be called on the adrp. So you write these values, then it's called again for the add, which is where you use them?

If so I would add a comment along those lines.

lldb/test/API/functionalities/disassemble/aarch64-adrp-add/TestAArch64AdrpAdd.py

36

You could break after finding it.

37

if not found_hi_string and...

42

A message would help here, like "Did not find \"HI\" string in disassembly.".

Of course if you want to debug it the logging is actually going to help but just for anyone seeing it as a random failure in a general test suite run.

[jasonmolenda]

Thanks so much for taking the time to read the patch over and make suggestions David. I cribbed the bit masking / manip from MachODump.cpp's SymbolizerSymbolLookUp but you're right about it being better with at least a little bit of comments about what is going on there.

Yeah, this is a very aarch64 specific thing in the generic symbolizer, but it's not an especially large function so I didn't feel too bad about it. If we started needing to handle multi-instruction sequences like this in the symbolizer (where we save state from previous instructions to determine a result), then this definitely would not scale well.

I've written it so that I only recognize the pattern with ADRP is immediately followed by an ADD, that was maybe a choice I could have gone either way on. I clear the saved ADRP instruction when it's not followed by that ADD in the same instruction. I didn't want to mis-calculate an address if the instruction pair using the same register were in two different basic blocks or something.

lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp

1325

Ah, good point. I did a quick check and clang currently generates the same adrp+add with an x register, and then ANDs the result with 0xffffffff for our "arm64_32" target (ILP32 codegen that executes in the lower 4GB of virtual address space but uses the aarch64 ISA), so it works out.

[DavidSpickett]

Yeah, this is a very aarch64 specific thing in the generic symbolizer, but it's not an especially large function so I didn't feel too bad about it. If we started needing to handle multi-instruction sequences like this in the symbolizer (where we save state from previous instructions to determine a result), then this definitely would not scale well.

Yeah I mainly mentioned it because of vague memories of some other function that grew a whole bunch of these. Fine for now.

(And in general I like the change, we get this sort of request for the disassembly tools a lot but haven't really thought about it for lldb)

I've written it so that I only recognize the pattern with ADRP is immediately followed by an ADD, that was maybe a choice I could have gone either way on.

That bit makes sense to me. I suppose instruction scheduling might separate them but this probably hits 99% of them.

[jasonmolenda]

Update patch to address David's suggestion that the bit masking & testing needed some comments to make it possible to follow. In the process of doing that, I noticed that MachODump.cpp's SymbolizerSymbolLookUp, where I cribbed the bit stuff from, doesn't handle an ADRP referring to a 4k block before $pc; it doesn't sign extend the page imm value correctly from the ADRP. I updated the test case to have a symbol 4k earlier than $pc so lldb has to compute this correctly to symbolicate the address, and added both an arm64 and arm64_32 yaml encoded copy of the binary.

[jasonmolenda]

Ah, add one more comment that David suggested.

[jasonmolenda]

lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp

1328

There's a comment right before the conditional expr which says what it's checking. The check that m_adrp_insn is actually an adrp instruction is unnecessary; I cribbed that from the MachODump file, but the only way I set the ivar to the instruction is if we had type_ptr==LLVMDisassembler_ReferenceType_In_ARM64_ADRP in the previous instruction.

1332–1335

Yeah, it was being done incorrectly.

1339

Yeah, I rewrote it the way you suggest. I don't know why it was written that way in MachODump.cpp (incorrectly), but also why would the sh bit be set on the ADD when that just shifts the value up 12 bits like the ADRP instruction did already. It's like a less rangey version of ADRP as soon as the sh bit is set.

[DavidSpickett]

lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp

1328

The check that m_adrp_insn is actually an adrp instruction is unnecessary

In that we could have an Optional<uint32_t> and assume if set, it's an adrp. But this is functionally the same.

Comment bikeshedding, put the conditions in the same order as the text? So readers know that 0x1f is the register?
(though if you were questioning this code the first port of call would be the arm manuals but regardless)

// If previous instruction was ADRP and this is ADD, and it's to
// the same register, this is pc-relative address calculation.
if (m_adrp_address == pc - 4 &&
    (m_adrp_insn & 0x9f000000) == 0x90000000 && 
    *type_ptr == LLVMDisassembler_ReferenceType_In_ARM64_ADDXri &&
    (m_adrp_insn & 0x1f) == ((value >> 5) & 0x1f)) {

lldb/test/API/functionalities/disassemble/aarch64-adrp-add/TestAArch64AdrpAdd.py

16–28

Could move most of this into a utility fn too.

30

no_debug_info_test here?

61

Shouldn't this be within the if Trace?

lldb/test/API/functionalities/disassemble/aarch64-adrp-add/main.c

261

I admit a bit of a "wat" moment here, but I assume this is setting things up so that foo is some distance behind (at a lower address) than main?
So we have foo, which is before main and HI which is after for a negative, positive offset.

Could do with a comment for how many instructions this is. Maybe you could #define something for maybe 64 nops at a time just to make it a little less verbose.

[jasonmolenda]

Address David's second review comments -- explained the unusual formatting of the main.c in the test case, change the m_adrp_insn to be an Optional instead of using 0 as a "not-set" value. I'll prob land this tomorrow unless someone has additional feedback, I think it's in reasonable shape.

[DavidSpickett]

LGTM

lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h

 
 #include <memory>
 #include <mutex>
 #include <string>
 
 #include "lldb/Core/Address.h"
 #include "lldb/Core/Disassembler.h"
 #include "lldb/Core/PluginManager.h"
+#include "llvm/ADT/Optional.h"
 
 class InstructionLLVMC;
 
 class DisassemblerLLVMC : public lldb_private::Disassembler {
 public:
   DisassemblerLLVMC(const lldb_private::ArchSpec &arch,
                     const char *flavor /* = NULL */);
 
static const char *SymbolLookupCallback(void *DisInfo,
                                           uint64_t *ReferenceType,
                                           uint64_t ReferencePC,
                                           const char **ReferenceName);
 
   const lldb_private::ExecutionContext *m_exe_ctx;
   InstructionLLVMC *m_inst;
   std::mutex m_mutex;
   bool m_data_from_file;
+  // Save the AArch64 ADRP instruction word and address it was at,
+  // in case the next instruction is an ADD to the same register;
+  // this is a pc-relative address calculation and we need both
+  // parts to calculate the symbolication.
+  lldb::addr_t m_adrp_address;
+  llvm::Optional<uint32_t> m_adrp_insn;
 
   // Since we need to make two actual MC Disassemblers for ARM (ARM & THUMB),
   // and there's a bit of goo to set up and own in the MC disassembler world,
   // this class was added to manage the actual disassemblers.
   class MCDisasmInstance;
   std::unique_ptr<MCDisasmInstance> m_disasm_up;
   std::unique_ptr<MCDisasmInstance> m_alternate_disasm_up;
 };
 
 #endif // LLDB_SOURCE_PLUGINS_DISASSEMBLER_LLVMC_DISASSEMBLERLLVMC_H

lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp

 
 bool DisassemblerLLVMC::MCDisasmInstance::IsCall(llvm::MCInst &mc_inst) const {
   return m_instr_info_up->get(mc_inst.getOpcode()).isCall();
 }
 
 DisassemblerLLVMC::DisassemblerLLVMC(const ArchSpec &arch,
                                      const char *flavor_string)
     : Disassembler(arch, flavor_string), m_exe_ctx(nullptr), m_inst(nullptr),
-      m_data_from_file(false) {
+      m_data_from_file(false), m_adrp_address(LLDB_INVALID_ADDRESS),
+      m_adrp_insn() {
   if (!FlavorValidForArchSpec(arch, m_flavor.c_str())) {
     m_flavor.assign("default");
   }
 
   unsigned flavor = ~0U;
   llvm::Triple triple = arch.GetTriple();
 
   // So far the only supported flavor is "intel" on x86.  The base class will

 const char *DisassemblerLLVMC::SymbolLookup(uint64_t value, uint64_t *type_ptr,
                                             uint64_t pc, const char **name) {
   if (*type_ptr) {
     if (m_exe_ctx && m_inst) {
       // std::string remove_this_prior_to_checkin;
       Target *target = m_exe_ctx ? m_exe_ctx->GetTargetPtr() : nullptr;
       Address value_so_addr;
       Address pc_so_addr;
+      if (target->GetArchitecture().GetMachine() == llvm::Triple::aarch64 ||
+          target->GetArchitecture().GetMachine() == llvm::Triple::aarch64_be ||
+          target->GetArchitecture().GetMachine() == llvm::Triple::aarch64_32) {
+        if (*type_ptr == LLVMDisassembler_ReferenceType_In_ARM64_ADRP) {
+          m_adrp_address = pc;
+          m_adrp_insn = value;
+          *name = nullptr;
+          *type_ptr = LLVMDisassembler_ReferenceType_InOut_None;
+          return nullptr;
+        }
+        // If this instruction is an ADD and
+        // the previous instruction was an ADRP and
+        // the ADRP's register and this ADD's register are the same,
+        // then this is a pc-relative address calculation.
+        if (*type_ptr == LLVMDisassembler_ReferenceType_In_ARM64_ADDXri &&
+            m_adrp_insn.hasValue() && m_adrp_address == pc - 4 &&
+            (m_adrp_insn.getValue() & 0x1f) == ((value >> 5) & 0x1f)) {
+          uint32_t addxri_inst;
+          uint64_t adrp_imm, addxri_imm;
+          // Get immlo and immhi bits, OR them together to get the ADRP imm
+          // value.
+          adrp_imm = ((m_adrp_insn.getValue() & 0x00ffffe0) >> 3) |
+                     ((m_adrp_insn.getValue() >> 29) & 0x3);
+          // if high bit of immhi after right-shifting set, sign extend
+          if (adrp_imm & (1ULL << 20))
+            adrp_imm |= ~((1ULL << 21) - 1);
+
+          addxri_inst = value;
+          addxri_imm = (addxri_inst >> 10) & 0xfff;
+          // check if 'sh' bit is set, shift imm value up if so
+          // (this would make no sense, ADRP already gave us this part)
+          if ((addxri_inst >> (12 + 5 + 5)) & 1)
+            addxri_imm <<= 12;
+          value = (m_adrp_address & 0xfffffffffffff000LL) + (adrp_imm << 12) +
+                  addxri_imm;
+        }
+        m_adrp_address = LLDB_INVALID_ADDRESS;
+        m_adrp_insn.reset();
+      }
+
       if (m_inst->UsingFileAddress()) {
         ModuleSP module_sp(m_inst->GetAddress().GetModule());
         if (module_sp) {
           module_sp->ResolveFileAddress(value, value_so_addr);
           module_sp->ResolveFileAddress(pc, pc_so_addr);
         }
       } else if (target && !target->GetSectionLoadList().IsEmpty()) {
         target->GetSectionLoadList().ResolveLoadAddress(value, value_so_addr);
if (m_exe_ctx && m_inst) {
             str.erase(first_eol_char);
           }
           m_inst->AppendComment(str);
         }
       }
     }
   }
 
+  // TODO: llvm-objdump sets the type_ptr to the
+  // LLVMDisassembler_ReferenceType_Out_* values
+  // based on where value_so_addr is pointing, with
+  // Mach-O specific augmentations in MachODump.cpp. e.g.
+  // see what AArch64ExternalSymbolizer::tryAddingSymbolicOperand
+  // handles.
   *type_ptr = LLVMDisassembler_ReferenceType_InOut_None;
   *name = nullptr;
   return nullptr;
 }
 
 // PluginInterface protocol
 ConstString DisassemblerLLVMC::GetPluginName() { return GetPluginNameStatic(); }
 
 uint32_t DisassemblerLLVMC::GetPluginVersion() { return 1; }

lldb/test/API/functionalities/disassemble/aarch64-adrp-add/TestAArch64AdrpAdd.py

+"""
+Test that the arm64 ADRP + ADD pc-relative addressing pair is symbolicated.
+"""
+
+from lldbsuite.test.decorators import *
+from lldbsuite.test.lldbtest import *
+from lldbsuite.test import lldbutil
+
+class TestAArch64AdrpAdd(TestBase):
+
+    mydir = TestBase.compute_mydir(__file__)
+
+    @no_debug_info_test
+    def test_arm64(self):
+        src_dir = self.getSourceDir()
+        yaml_path = os.path.join(src_dir, "a.out-arm64.yaml")
+        obj_path = self.getBuildArtifact("a.out-arm64")
+        self.yaml2obj(yaml_path, obj_path)
+
+        target = self.dbg.CreateTarget(obj_path)
+        self.assertTrue(target, VALID_TARGET)
+
+        mains = target.FindFunctions("main")
+        for f in mains.symbols:
+            binaryname = f.GetStartAddress().GetModule().GetFileSpec().GetFilename()
+            if binaryname == "a.out-arm64":
+                self.disassemble_check_for_hi_and_foo(target, f, binaryname)
+
+    @no_debug_info_test
+    def test_arm64_32(self):
+        src_dir = self.getSourceDir()
+        yaml_path = os.path.join(src_dir, "a.out-arm64_32.yaml")
+        obj_path = self.getBuildArtifact("a.out-arm64_32")
+        self.yaml2obj(yaml_path, obj_path)
+
+        target = self.dbg.CreateTarget(obj_path)
+        self.assertTrue(target, VALID_TARGET)
+
+        mains = target.FindFunctions("main")
+        for f in mains.symbols:
+            binaryname = f.GetStartAddress().GetModule().GetFileSpec().GetFilename()
+            if binaryname == "a.out-arm64_32":
+                self.disassemble_check_for_hi_and_foo(target, f, binaryname)
+
+    def disassemble_check_for_hi_and_foo(self, target, func, binaryname):
+        insns = func.GetInstructions(target)
+        found_hi_string = False
+        found_foo = False
+
+        # The binary has an ADRP + ADD instruction pair which load 
+        # the pc-relative address of a c-string, and loads the address
+        # of a function into a function pointer.  lldb should show 
+        # that c-string and the name of that function in the disassembly 
+        # comment field.
+        for i in insns:
+            if "HI" in i.GetComment(target):
+                found_hi_string = True
+            if "foo" in i.GetComment(target):
+                found_foo = True
+        if found_hi_string == False or found_foo == False:
+            print('Did not find "HI" string or "foo" in disassembly symbolication in %s' % binaryname)
+            if self.TraceOn():
+              strm = lldb.SBStream()
+              insns.GetDescription(strm)
+              print('Disassembly of main(), looking for "HI" and "foo" in comments:')
+              print(strm.GetData())
+        self.assertTrue(found_hi_string)
+        self.assertTrue(found_foo)

lldb/test/API/functionalities/disassemble/aarch64-adrp-add/a.out-arm64.yaml

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lldb/test/API/functionalities/disassemble/aarch64-adrp-add/a.out-arm64_32.yaml

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+      n_value:         0
+    - n_strx:          34
+      n_type:          0x1
+      n_sect:          0
+      n_desc:          256
+      n_value:         0
+  StringTable:
+    - ' '
+    - __mh_execute_header
+    - _main
+    - _puts
+    - dyld_stub_binder
+    - _foo
+    - _bar
+    - __dyld_private
+...

lldb/test/API/functionalities/disassemble/aarch64-adrp-add/main.c

+#include <stdio.h>
+
+// For the test case, we really want the the layout of this binary
+// to be:
+//
+//   foo()
+//   bar() - 4096 bytes of nop's
+//   main()
+//   "HI" string
+//
+// in reality getting this layout from the compiler and linker
+// is a crapshoot, so I have yaml's checked in of the correct
+// layout.  Recompiling from source may not get the needed
+// binary layout.
+
+static int bar();
+static int foo() { return 5 + bar(); }
+// A function of 4096 bytes, so when main() loads the
+// address of foo() before this one, it has to subtract
+// a 4096 page.
+#define SIXTY_FOUR_BYTES_NOP                                                   \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");                                                                  \
+  asm("nop");
+
+static int bar() {
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  SIXTY_FOUR_BYTES_NOP;
+  return 5;
+}
+int main() {
+  int (*f)(void) = foo;
+  puts("HI");
+  return f();
+}