This is an archive of the discontinued LLVM Phabricator instance.

[mlir] Store the flag for dynamic operand storage in the low bits
ClosedPublic

Authored by rriddle on May 5 2021, 7:12 PM.

Details

Summary

It is currently stored in the high bits, which is disallowed on certain
platforms (e.g. android). This revision switches the representation to use
the low bits instead, fixing crashes/breakages on those platforms.

Diff Detail

Event Timeline

rriddle created this revision.May 5 2021, 7:12 PM
rriddle requested review of this revision.May 5 2021, 7:12 PM
Jing accepted this revision.May 5 2021, 7:58 PM
This revision is now accepted and ready to land.May 5 2021, 7:58 PM
mehdi_amini accepted this revision.May 5 2021, 8:19 PM
mehdi_amini added inline comments.
mlir/include/mlir/IR/OperationSupport.h
483

Can you just use initializer on the members or it isn't possible with bitfields?

rriddle added inline comments.May 6 2021, 11:48 AM
mlir/include/mlir/IR/OperationSupport.h
483

Yeah, it isn't possible for bitfields until C++20.

This revision was landed with ongoing or failed builds.May 6 2021, 12:46 PM
This revision was automatically updated to reflect the committed changes.

Hi, @rriddle , I got many testing errors after this patch on Systems Z (Big-endian machine)(Triple = "s390x-ibm-linux", CPU = "z14").
It seems I can avoid the errors by changing the bit order (TrailingOperandStorage() : numOperands(0), capacity(0), reserved(0) {}) , but I'm not sure why.
Do you have any suggestion?