[PowerPC][LLD] Make sure that the correct Thunks are used.

[stefanp]

Summary

This fixes an issue where mixed TOC / NOTOC calls can call the incorrect
thunks if a previous thunk already exists. The issue appears when a TOC
funciton calls a NOTOC callee and then a different NOTOC function calls the same
NOTOC callee. In this case the linker would sometimes incorrectly call the
same thunk for both cases.

[MaskRay]

lld/test/ELF/ppc64-pcrel-cross-link.s

18

Use -LABEL for the function label line

22

Use -NEXT: where applicable.

90

Name assembly files *.s and object files *.o

141

Delete trailing empty lines

[stefanp]

Cleanup of test case.

Added *.s to assembly files.
Added -LABEL and -NEXT to checks.
Removed empty line at end of test.

[MaskRay]

Thanks!

lld/ELF/Thunks.cpp

if (!isInt<26>(computeOffset())) {
       mayUseShortThunk = false;
       return false;
     }
     return true;
   }
   uint32_t size() override { return getMayUseShortThunk() ? 8 : 32; }
   void writeTo(uint8_t *buf) override;
   void addSymbols(ThunkSection &isec) override;
+  bool isCompatibleWith(const InputSection &isec,
+                        const Relocation &rel) const override;
 
 private:
   // Transitioning from long to short can create layout oscillations in
   // certain corner cases which would prevent the layout from converging.
   // This is similar to the handling for ARMThunk.
   bool mayUseShortThunk = true;
   int64_t computeOffset() const {
     return destination.getVA() - (getThunkTargetSym()->getVA() + 4);
   }
 };
 
 // PPC64 R12 Setup Stub
 // When a caller that does not maintain a toc-pointer performs a local call to
 // a callee which requires a toc-pointer then we need this stub to place the
 // callee's global entry point into r12 without a save of R2.
 class PPC64R12SetupStub final : public Thunk {
 public:
   PPC64R12SetupStub(Symbol &dest) : Thunk(dest, 0) { alignment = 16; }
   uint32_t size() override { return 32; }
   void writeTo(uint8_t *buf) override;
   void addSymbols(ThunkSection &isec) override;
+  bool isCompatibleWith(const InputSection &isec,
+                        const Relocation &rel) const override;
 };
 
 // PPC64 PC-relative PLT Stub
 // When a caller that does not maintain a toc-pointer performs an extern call
 // then this stub is needed for:
 // 1) Loading the target functions address from the procedure linkage table into
 //    r12 for use by the target functions global entry point, and into the count
 //    register with pc-relative instructions.

 }
 
 void PPC64R2SaveStub::addSymbols(ThunkSection &isec) {
   Defined *s = addSymbol(saver.save("__toc_save_" + destination.getName()),
                          STT_FUNC, 0, isec);
   s->needsTocRestore = true;
 }
 
+bool PPC64R2SaveStub::isCompatibleWith(const InputSection &isec,
+                                       const Relocation &rel) const {
+  return rel.type == R_PPC64_REL24 || rel.type == R_PPC64_REL14;
+}
+
 void PPC64R12SetupStub::writeTo(uint8_t *buf) {
   int64_t offset = destination.getVA() - getThunkTargetSym()->getVA();
   if (!isInt<34>(offset))
     reportRangeError(buf, offset, 34, destination, "R12 setup stub offset");
 
   int nextInstOffset;
   if (!config->Power10Stub) {
     uint32_t off = destination.getVA(addend) - getThunkTargetSym()->getVA() - 8;
void PPC64R12SetupStub::writeTo(uint8_t *buf) {
   write32(buf + nextInstOffset + 4, BCTR);  // bctr
 }
 
 void PPC64R12SetupStub::addSymbols(ThunkSection &isec) {
   addSymbol(saver.save("__gep_setup_" + destination.getName()), STT_FUNC, 0,
             isec);
 }
 
+bool PPC64R12SetupStub::isCompatibleWith(const InputSection &isec,
+                                         const Relocation &rel) const {
+  return rel.type == R_PPC64_REL24_NOTOC;
+}
+
 void PPC64PCRelPLTStub::writeTo(uint8_t *buf) {
   int nextInstOffset = 0;
   int64_t offset = destination.getGotPltVA() - getThunkTargetSym()->getVA();
 
   if (config->Power10Stub) {
     if (!isInt<34>(offset))
       reportRangeError(buf, offset, 34, destination,
                        "PC-relative PLT stub offset");

lld/test/ELF/ppc64-pcrel-cross-link.s

+# REQUIRES: ppc
+# RUN: split-file %s %t
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le %t/callees -o %t-callees.o
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le %t/callertoc -o %t-callertoc.o
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le %t/callernotoc -o %t-callernotoc.o
+# RUN: ld.lld -T %t/lds %t-callees.o %t-callernotoc.o %t-callertoc.o -o %t-r12setup
+# RUN: ld.lld -T %t/ldsswap %t-callees.o %t-callernotoc.o %t-callertoc.o -o %t-r2save
+
+# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=pwr10 %t-r12setup | \
+# RUN:   FileCheck %s --check-prefix=NOSWAP
+# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=pwr10 %t-r2save | \
+# RUN:   FileCheck %s --check-prefix=SWAP
+
+## This test checks that it is possible to mix TOC and NOTOC functions and have
+## the correct thunks for all of the calls.
+
+# NOSWAP: 01001000 <func>:
+# NOSWAP:   blr
+# NOSWAP: 01002000 <callee_toc>:
+# NOSWAP:   bl 0x1001000
+# NOSWAP:   blr
+# NOSWAP: 01002018 <callee_notoc>:
+# NOSWAP:   bl 0x1001000
+# NOSWAP:   blr
+# NOSWAP: 10030000 <caller_notoc>:
+# NOSWAP:   bl 0x10030010
+# NOSWAP:   bl 0x10030030
+# NOSWAP:   blr
+# NOSWAP: 10030010 <__gep_setup_callee_toc>:
+# NOSWAP:   bctr
+# NOSWAP: 10030030 <__long_branch_pcrel_callee_notoc>:
+# NOSWAP:   bctr
+# NOSWAP: 10040000 <caller_toc>:
+# NOSWAP:   bl 0x10040020
+# NOSWAP:   nop
+# NOSAWP:   bl 0x10040040
+# NOSWAP:   ld 2, 24(1)
+# NOSWAP:   blr
+# NOSWAP: 10040020 <__long_branch_callee_toc>:
+# NOSWAP:   bctr
+# NOSWAP: 10040040 <__toc_save_callee_notoc>:
+# NOSWAP:   std 2, 24(1)
+# NOSWAP:   bctr
+
+# SWAP: 01001000 <func>:
+# SWAP:   blr
+# SWAP: 01002000 <callee_toc>:
+# SWAP:   bl 0x1001000
+# SWAP:   blr
+# SWAP: 01002018 <callee_notoc>:
+# SWAP:   bl 0x1001000
+# SWAP:   blr
+# SWAP: 10030000 <caller_toc>:
+# SWAP:   bl 0x10030020
+# SWAP:   nop
+# SWAP:   bl 0x10030040
+# SWAP:   ld 2, 24(1)
+# SWAP:   blr
+# SWAP: 10030020 <__long_branch_callee_toc>:
+# SWAP:   bctr
+# SWAP: 10030040 <__toc_save_callee_notoc>:
+# SWAP:   std 2, 24(1)
+# SWAP:   bctr
+# SWAP: 10040000 <caller_notoc>:
+# SWAP:   bl 0x10040010
+# SWAP:   bl 0x10040030
+# SWAP:   blr
+# SWAP: 10040010 <__gep_setup_callee_toc>:
+# SWAP:   bctr
+# SWAP: 10040030 <__long_branch_pcrel_callee_notoc>:
+# SWAP:   bctr
+
+#--- lds
+SECTIONS {
+  .text_func         0x1001000 : { *(.text_func) }
+  .text_callee       0x1002000 : { *(.text_callee) }
+  .text_caller_notoc 0x10030000 : { *(.text_caller_notoc) }
+  .text_caller_toc   0x10040000 : { *(.text_caller_toc) }
+}
+
+#--- ldsswap
+SECTIONS {
+  .text_func         0x1001000 : { *(.text_func) }
+  .text_callee       0x1002000 : { *(.text_callee) }
+  .text_caller_toc   0x10030000 : { *(.text_caller_toc) }
+  .text_caller_notoc 0x10040000 : { *(.text_caller_notoc) }
+}
+
+#--- callees
+.section .text_func, "ax", %progbits
+func:
+  blr
+
+.globl callee_toc
+.section .text_callee, "ax", %progbits
+callee_toc:
+.Lfunc_gep1:
+  addis 2, 12, .TOC.-.Lfunc_gep1@ha
+  addi 2, 2, .TOC.-.Lfunc_gep1@l
+.Lfunc_lep1:
+  .localentry callee_toc, .Lfunc_lep1-.Lfunc_gep1
+  bl func
+  addis 4, 2, global@toc@ha
+  lwz 4, global@toc@l(4)
+  blr
+
+.globl callee_notoc
+callee_notoc:
+  .localentry callee_notoc, 1
+  bl func
+  plwz 4, global@pcrel(0), 1
+  blr
+
+## .globl global
+global:
+  .long 0
+  .size global, 4
+
+#--- callernotoc
+.section .text_caller_notoc, "ax", %progbits
+caller_notoc:
+  .localentry caller, 1
+  bl callee_toc@notoc
+  bl callee_notoc@notoc
+  blr
+
+#--- callertoc
+.section .text_caller_toc, "ax", %progbits
+caller_toc:
+.Lfunc_gep2:
+  addis 2, 12, .TOC.-.Lfunc_gep2@ha
+  addi 2, 2, .TOC.-.Lfunc_gep2@l
+.Lfunc_lep2:
+  .localentry caller_toc, .Lfunc_lep2-.Lfunc_gep2
+  bl callee_toc
+  nop
+  bl callee_notoc
+  nop
+  blr
+