Page MenuHomePhabricator

[mlir] Fix support for lowering non-32-bit affine reductions.

Authored by ftynse on Apr 6 2021, 3:55 AM.



The existing implementation was always creating 32-bit constants for
floating-point and integer reductions regardless of the actual type, which
resulted in invalid IR being generated for any types other than f32 and i32
when lowering affine.parallel to SCF. Use the actual type instead.

Diff Detail

Event Timeline

ftynse created this revision.Apr 6 2021, 3:55 AM
ftynse requested review of this revision.Apr 6 2021, 3:55 AM
chelini accepted this revision.Apr 6 2021, 4:58 AM

Thanks, looks good to me.

This revision is now accepted and ready to land.Apr 6 2021, 4:58 AM