[ARM] Clarify a comment regarding AArch64. NFC.

[compnerd]

llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp

32

ARM64 is a different target, but the COFF writer can be shared across the two right? What makes it special? A comment to that effect would be useful. I think that we might want to try to push this upwards to avoid the parameter all together if the two paths cannot be merged.

[mstorsjo]

llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp

32

You mean this class? Almost everything in each of them is different between the two, so I don't really see what benefits there would be to stuffing both into one class with conditionals around everything.

[rnk]

llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp

30

I think you can go further and remove the parameter here and in the factory function createARMWinCOFFObjectWriter. We only ever pass false to it. This just appears to be copy-pasta from the MachO version. The ARMELFObjectWriter doesn't have this constructor parameter.

32

Even if there is overlap between aarch64 and arm, the shared code would have to live in MC, which means it would have to live in MCWinCOFFObjectWriter anyway. I think we can do this simplification.

[mstorsjo]

Updated to remove the parameter and the related asserts.

[rnk]

lgtm

llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp

 #include <cassert>
 
 using namespace llvm;
 
 namespace {
 
 class ARMWinCOFFObjectWriter : public MCWinCOFFObjectTargetWriter {
 public:
   ARMWinCOFFObjectWriter(bool Is64Bit)
     : MCWinCOFFObjectTargetWriter(COFF::IMAGE_FILE_MACHINE_ARMNT) {
-    assert(!Is64Bit && "AArch64 support not yet implemented");
+    assert(!Is64Bit && "AArch64 is an entirely different target");
   }
 
   ~ARMWinCOFFObjectWriter() override = default;
 
   unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
                         const MCFixup &Fixup, bool IsCrossSection,
                         const MCAsmBackend &MAB) const override;
 
   bool recordRelocation(const MCFixup &) const override;
 };
 
 } // end anonymous namespace
 
 unsigned ARMWinCOFFObjectWriter::getRelocType(MCContext &Ctx,
                                               const MCValue &Target,
                                               const MCFixup &Fixup,
                                               bool IsCrossSection,
                                               const MCAsmBackend &MAB) const {
   assert(getMachine() == COFF::IMAGE_FILE_MACHINE_ARMNT &&
-         "AArch64 support not yet implemented");
+         "AArch64 is an entirely different target");
 
   MCSymbolRefExpr::VariantKind Modifier =
     Target.isAbsolute() ? MCSymbolRefExpr::VK_None : Target.getSymA()->getKind();
 
   unsigned FixupKind = Fixup.getKind();
   if (IsCrossSection) {
     if (FixupKind != FK_Data_4) {
       Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression");